D-Type Flip Flop

/*---------------------------------------
D-Type Flip Flop
Positive edge trigger
Active LOW CLR and PR

Pin Assignment for Altera DE2 Dev Board
clk     27MHz
d   SW[0]
pr  SW[2]
clr SW[1]
q   LEDR[0]
---------------------------------------*/
module dflipflop (
    input clk, d, pr, clr,
    output reg q );

always@(posedge clk)    // triggered on positive edge
begin
    if(pr==0) q<= 1;    // active low preset
    else if(clr==0) q <= 0; // active low clr
    else q <= d;
end

endmodule