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- firmware.elf: file format elf32-littlearm
- Disassembly of section .isr_vector:
- 08000000 <g_pfnVectors>:
- 8000000: 20005000 andcs r5, r0, r0
- 8000004: 0800014d stmdaeq r0, {r0, r2, r3, r6, r8}
- 8000008: 08000195 stmdaeq r0, {r0, r2, r4, r7, r8}
- 800000c: 08000195 stmdaeq r0, {r0, r2, r4, r7, r8}
- 8000010: 08000195 stmdaeq r0, {r0, r2, r4, r7, r8}
- 8000014: 08000195 stmdaeq r0, {r0, r2, r4, r7, r8}
- 8000018: 08000195 stmdaeq r0, {r0, r2, r4, r7, r8}
- ...
- 800002c: 08000195 stmdaeq r0, {r0, r2, r4, r7, r8}
- 8000030: 08000195 stmdaeq r0, {r0, r2, r4, r7, r8}
- 8000034: 00000000 andeq r0, r0, r0
- 8000038: 08000195 stmdaeq r0, {r0, r2, r4, r7, r8}
- 800003c: 08000195 stmdaeq r0, {r0, r2, r4, r7, r8}
- 8000040: 08000195 stmdaeq r0, {r0, r2, r4, r7, r8}
- 8000044: 08000195 stmdaeq r0, {r0, r2, r4, r7, r8}
- 8000048: 08000195 stmdaeq r0, {r0, r2, r4, r7, r8}
- 800004c: 08000195 stmdaeq r0, {r0, r2, r4, r7, r8}
- 8000050: 08000195 stmdaeq r0, {r0, r2, r4, r7, r8}
- 8000054: 08000195 stmdaeq r0, {r0, r2, r4, r7, r8}
- 8000058: 08000195 stmdaeq r0, {r0, r2, r4, r7, r8}
- 800005c: 08000195 stmdaeq r0, {r0, r2, r4, r7, r8}
- 8000060: 08000195 stmdaeq r0, {r0, r2, r4, r7, r8}
- 8000064: 08000195 stmdaeq r0, {r0, r2, r4, r7, r8}
- 8000068: 08000195 stmdaeq r0, {r0, r2, r4, r7, r8}
- 800006c: 08000195 stmdaeq r0, {r0, r2, r4, r7, r8}
- 8000070: 08000195 stmdaeq r0, {r0, r2, r4, r7, r8}
- 8000074: 08000195 stmdaeq r0, {r0, r2, r4, r7, r8}
- 8000078: 08000195 stmdaeq r0, {r0, r2, r4, r7, r8}
- 800007c: 08000195 stmdaeq r0, {r0, r2, r4, r7, r8}
- 8000080: 08000195 stmdaeq r0, {r0, r2, r4, r7, r8}
- 8000084: 08000195 stmdaeq r0, {r0, r2, r4, r7, r8}
- 8000088: 08000195 stmdaeq r0, {r0, r2, r4, r7, r8}
- 800008c: 08000195 stmdaeq r0, {r0, r2, r4, r7, r8}
- 8000090: 08000195 stmdaeq r0, {r0, r2, r4, r7, r8}
- 8000094: 08000195 stmdaeq r0, {r0, r2, r4, r7, r8}
- 8000098: 08000195 stmdaeq r0, {r0, r2, r4, r7, r8}
- 800009c: 08000195 stmdaeq r0, {r0, r2, r4, r7, r8}
- 80000a0: 08000195 stmdaeq r0, {r0, r2, r4, r7, r8}
- 80000a4: 08000195 stmdaeq r0, {r0, r2, r4, r7, r8}
- 80000a8: 08000195 stmdaeq r0, {r0, r2, r4, r7, r8}
- 80000ac: 08000195 stmdaeq r0, {r0, r2, r4, r7, r8}
- 80000b0: 08000195 stmdaeq r0, {r0, r2, r4, r7, r8}
- 80000b4: 08000195 stmdaeq r0, {r0, r2, r4, r7, r8}
- 80000b8: 08000195 stmdaeq r0, {r0, r2, r4, r7, r8}
- 80000bc: 08000195 stmdaeq r0, {r0, r2, r4, r7, r8}
- 80000c0: 08000195 stmdaeq r0, {r0, r2, r4, r7, r8}
- 80000c4: 08000195 stmdaeq r0, {r0, r2, r4, r7, r8}
- 80000c8: 08000195 stmdaeq r0, {r0, r2, r4, r7, r8}
- 80000cc: 08000195 stmdaeq r0, {r0, r2, r4, r7, r8}
- 80000d0: 08000195 stmdaeq r0, {r0, r2, r4, r7, r8}
- 80000d4: 08000195 stmdaeq r0, {r0, r2, r4, r7, r8}
- 80000d8: 08000195 stmdaeq r0, {r0, r2, r4, r7, r8}
- 80000dc: 08000195 stmdaeq r0, {r0, r2, r4, r7, r8}
- 80000e0: 08000195 stmdaeq r0, {r0, r2, r4, r7, r8}
- 80000e4: 08000195 stmdaeq r0, {r0, r2, r4, r7, r8}
- 80000e8: 08000195 stmdaeq r0, {r0, r2, r4, r7, r8}
- ...
- 8000108: f108f85f ; <UNDEFINED> instruction: 0xf108f85f
- Disassembly of section .text:
- 0800010c <__do_global_dtors_aux>:
- 800010c: b510 push {r4, lr}
- 800010e: 4c05 ldr r4, [pc, #20] ; (8000124 <__do_global_dtors_aux+0x18>)
- 8000110: 7823 ldrb r3, [r4, #0]
- 8000112: b933 cbnz r3, 8000122 <__do_global_dtors_aux+0x16>
- 8000114: 4b04 ldr r3, [pc, #16] ; (8000128 <__do_global_dtors_aux+0x1c>)
- 8000116: b113 cbz r3, 800011e <__do_global_dtors_aux+0x12>
- 8000118: 4804 ldr r0, [pc, #16] ; (800012c <__do_global_dtors_aux+0x20>)
- 800011a: f3af 8000 nop.w
- 800011e: 2301 movs r3, #1
- 8000120: 7023 strb r3, [r4, #0]
- 8000122: bd10 pop {r4, pc}
- 8000124: 20000008 andcs r0, r0, r8
- 8000128: 00000000 andeq r0, r0, r0
- 800012c: 080004b8 stmdaeq r0, {r3, r4, r5, r7, sl}
- 08000130 <frame_dummy>:
- 8000130: b508 push {r3, lr}
- 8000132: 4b03 ldr r3, [pc, #12] ; (8000140 <frame_dummy+0x10>)
- 8000134: b11b cbz r3, 800013e <frame_dummy+0xe>
- 8000136: 4903 ldr r1, [pc, #12] ; (8000144 <frame_dummy+0x14>)
- 8000138: 4803 ldr r0, [pc, #12] ; (8000148 <frame_dummy+0x18>)
- 800013a: f3af 8000 nop.w
- 800013e: bd08 pop {r3, pc}
- 8000140: 00000000 andeq r0, r0, r0
- 8000144: 2000000c andcs r0, r0, ip
- 8000148: 080004b8 stmdaeq r0, {r3, r4, r5, r7, sl}
- 0800014c <Reset_Handler>:
- 800014c: 2100 movs r1, #0
- 800014e: e003 b.n 8000158 <LoopCopyDataInit>
- 08000150 <CopyDataInit>:
- 8000150: 4b0b ldr r3, [pc, #44] ; (8000180 <LoopFillZerobss+0x14>)
- 8000152: 585b ldr r3, [r3, r1]
- 8000154: 5043 str r3, [r0, r1]
- 8000156: 3104 adds r1, #4
- 08000158 <LoopCopyDataInit>:
- 8000158: 480a ldr r0, [pc, #40] ; (8000184 <LoopFillZerobss+0x18>)
- 800015a: 4b0b ldr r3, [pc, #44] ; (8000188 <LoopFillZerobss+0x1c>)
- 800015c: 1842 adds r2, r0, r1
- 800015e: 429a cmp r2, r3
- 8000160: d3f6 bcc.n 8000150 <CopyDataInit>
- 8000162: 4a0a ldr r2, [pc, #40] ; (800018c <LoopFillZerobss+0x20>)
- 8000164: e002 b.n 800016c <LoopFillZerobss>
- 08000166 <FillZerobss>:
- 8000166: 2300 movs r3, #0
- 8000168: f842 3b04 str.w r3, [r2], #4
- 0800016c <LoopFillZerobss>:
- 800016c: 4b08 ldr r3, [pc, #32] ; (8000190 <LoopFillZerobss+0x24>)
- 800016e: 429a cmp r2, r3
- 8000170: d3f9 bcc.n 8000166 <FillZerobss>
- 8000172: f000 f811 bl 8000198 <SystemInit>
- 8000176: f000 f97b bl 8000470 <__libc_init_array>
- 800017a: f000 f963 bl 8000444 <main>
- 800017e: 4770 bx lr
- 8000180: 08000648 stmdaeq r0, {r3, r6, r9, sl}
- 8000184: 20000000 andcs r0, r0, r0
- 8000188: 20000008 andcs r0, r0, r8
- 800018c: 20000008 andcs r0, r0, r8
- 8000190: 20000024 andcs r0, r0, r4, lsr #32
- 08000194 <ADC1_2_IRQHandler>:
- 8000194: e7fe b.n 8000194 <ADC1_2_IRQHandler>
- ...
- 08000198 <SystemInit>:
- 8000198: 4b0f ldr r3, [pc, #60] ; (80001d8 <SystemInit+0x40>)
- 800019a: 681a ldr r2, [r3, #0]
- 800019c: f042 0201 orr.w r2, r2, #1
- 80001a0: 601a str r2, [r3, #0]
- 80001a2: 6859 ldr r1, [r3, #4]
- 80001a4: 4a0d ldr r2, [pc, #52] ; (80001dc <SystemInit+0x44>)
- 80001a6: 400a ands r2, r1
- 80001a8: 605a str r2, [r3, #4]
- 80001aa: 681a ldr r2, [r3, #0]
- 80001ac: f022 7284 bic.w r2, r2, #17301504 ; 0x1080000
- 80001b0: f422 3280 bic.w r2, r2, #65536 ; 0x10000
- 80001b4: 601a str r2, [r3, #0]
- 80001b6: 681a ldr r2, [r3, #0]
- 80001b8: f422 2280 bic.w r2, r2, #262144 ; 0x40000
- 80001bc: 601a str r2, [r3, #0]
- 80001be: 685a ldr r2, [r3, #4]
- 80001c0: f422 02fe bic.w r2, r2, #8323072 ; 0x7f0000
- 80001c4: 605a str r2, [r3, #4]
- 80001c6: f44f 021f mov.w r2, #10420224 ; 0x9f0000
- 80001ca: 609a str r2, [r3, #8]
- 80001cc: f04f 6200 mov.w r2, #134217728 ; 0x8000000
- 80001d0: 4b03 ldr r3, [pc, #12] ; (80001e0 <SystemInit+0x48>)
- 80001d2: 609a str r2, [r3, #8]
- 80001d4: 4770 bx lr
- 80001d6: bf00 nop
- 80001d8: 40021000 andmi r1, r2, r0
- 80001dc: f8ff0000 ; <UNDEFINED> instruction: 0xf8ff0000
- 80001e0: e000ed00 and lr, r0, r0, lsl #26
- 080001e4 <clockInit>:
- 80001e4: 4b27 ldr r3, [pc, #156] ; (8000284 <clockInit+0xa0>)
- 80001e6: b082 sub sp, #8
- 80001e8: 681a ldr r2, [r3, #0]
- 80001ea: f442 3280 orr.w r2, r2, #65536 ; 0x10000
- 80001ee: 601a str r2, [r3, #0]
- 80001f0: 2200 movs r2, #0
- 80001f2: 9201 str r2, [sp, #4]
- 80001f4: 681a ldr r2, [r3, #0]
- 80001f6: 0391 lsls r1, r2, #14
- 80001f8: d40d bmi.n 8000216 <clockInit+0x32>
- 80001fa: 9a01 ldr r2, [sp, #4]
- 80001fc: f5b2 5f80 cmp.w r2, #4096 ; 0x1000
- 8000200: dd06 ble.n 8000210 <clockInit+0x2c>
- 8000202: 2001 movs r0, #1
- 8000204: 681a ldr r2, [r3, #0]
- 8000206: f422 3280 bic.w r2, r2, #65536 ; 0x10000
- 800020a: 601a str r2, [r3, #0]
- 800020c: b002 add sp, #8
- 800020e: 4770 bx lr
- 8000210: 9a01 ldr r2, [sp, #4]
- 8000212: 3201 adds r2, #1
- 8000214: e7ed b.n 80001f2 <clockInit+0xe>
- 8000216: 685a ldr r2, [r3, #4]
- 8000218: f442 12e8 orr.w r2, r2, #1900544 ; 0x1d0000
- 800021c: 605a str r2, [r3, #4]
- 800021e: 681a ldr r2, [r3, #0]
- 8000220: f042 7280 orr.w r2, r2, #16777216 ; 0x1000000
- 8000224: 601a str r2, [r3, #0]
- 8000226: 2200 movs r2, #0
- 8000228: 9201 str r2, [sp, #4]
- 800022a: 681a ldr r2, [r3, #0]
- 800022c: 0192 lsls r2, r2, #6
- 800022e: d410 bmi.n 8000252 <clockInit+0x6e>
- 8000230: 9a01 ldr r2, [sp, #4]
- 8000232: f5b2 5f80 cmp.w r2, #4096 ; 0x1000
- 8000236: dd09 ble.n 800024c <clockInit+0x68>
- 8000238: 681a ldr r2, [r3, #0]
- 800023a: 2002 movs r0, #2
- 800023c: f422 3280 bic.w r2, r2, #65536 ; 0x10000
- 8000240: 601a str r2, [r3, #0]
- 8000242: 681a ldr r2, [r3, #0]
- 8000244: f022 7280 bic.w r2, r2, #16777216 ; 0x1000000
- 8000248: 601a str r2, [r3, #0]
- 800024a: e7df b.n 800020c <clockInit+0x28>
- 800024c: 9a01 ldr r2, [sp, #4]
- 800024e: 3201 adds r2, #1
- 8000250: e7ea b.n 8000228 <clockInit+0x44>
- 8000252: 490d ldr r1, [pc, #52] ; (8000288 <clockInit+0xa4>)
- 8000254: 680a ldr r2, [r1, #0]
- 8000256: f042 0202 orr.w r2, r2, #2
- 800025a: 600a str r2, [r1, #0]
- 800025c: 685a ldr r2, [r3, #4]
- 800025e: f442 6280 orr.w r2, r2, #1024 ; 0x400
- 8000262: 605a str r2, [r3, #4]
- 8000264: 685a ldr r2, [r3, #4]
- 8000266: f042 0202 orr.w r2, r2, #2
- 800026a: 605a str r2, [r3, #4]
- 800026c: 685a ldr r2, [r3, #4]
- 800026e: f002 020c and.w r2, r2, #12
- 8000272: 2a08 cmp r2, #8
- 8000274: d1fa bne.n 800026c <clockInit+0x88>
- 8000276: 681a ldr r2, [r3, #0]
- 8000278: 2000 movs r0, #0
- 800027a: f022 0201 bic.w r2, r2, #1
- 800027e: 601a str r2, [r3, #0]
- 8000280: e7c4 b.n 800020c <clockInit+0x28>
- 8000282: bf00 nop
- 8000284: 40021000 andmi r1, r2, r0
- 8000288: 40022000 andmi r2, r2, r0
- 0800028c <portClockInit>:
- 800028c: 4b06 ldr r3, [pc, #24] ; (80002a8 <portClockInit+0x1c>)
- 800028e: 699a ldr r2, [r3, #24]
- 8000290: f042 0204 orr.w r2, r2, #4
- 8000294: 619a str r2, [r3, #24]
- 8000296: 699a ldr r2, [r3, #24]
- 8000298: f042 0208 orr.w r2, r2, #8
- 800029c: 619a str r2, [r3, #24]
- 800029e: 699a ldr r2, [r3, #24]
- 80002a0: f042 0210 orr.w r2, r2, #16
- 80002a4: 619a str r2, [r3, #24]
- 80002a6: 4770 bx lr
- 80002a8: 40021000 andmi r1, r2, r0
- 080002ac <disableGlobalInterrupt>:
- 80002ac: b671 cpsid f
- 80002ae: 4770 bx lr
- 080002b0 <addressBusInit>:
- 80002b0: 4a19 ldr r2, [pc, #100] ; (8000318 <addressBusInit+0x68>)
- 80002b2: 6853 ldr r3, [r2, #4]
- 80002b4: f423 4370 bic.w r3, r3, #61440 ; 0xf000
- 80002b8: 6053 str r3, [r2, #4]
- 80002ba: 6853 ldr r3, [r2, #4]
- 80002bc: f423 2370 bic.w r3, r3, #983040 ; 0xf0000
- 80002c0: 6053 str r3, [r2, #4]
- 80002c2: 4b16 ldr r3, [pc, #88] ; (800031c <addressBusInit+0x6c>)
- 80002c4: 6819 ldr r1, [r3, #0]
- 80002c6: f021 010f bic.w r1, r1, #15
- 80002ca: 6019 str r1, [r3, #0]
- 80002cc: 6819 ldr r1, [r3, #0]
- 80002ce: f021 01f0 bic.w r1, r1, #240 ; 0xf0
- 80002d2: 6019 str r1, [r3, #0]
- 80002d4: 6819 ldr r1, [r3, #0]
- 80002d6: f421 6170 bic.w r1, r1, #3840 ; 0xf00
- 80002da: 6019 str r1, [r3, #0]
- 80002dc: 6819 ldr r1, [r3, #0]
- 80002de: f421 4170 bic.w r1, r1, #61440 ; 0xf000
- 80002e2: 6019 str r1, [r3, #0]
- 80002e4: 6851 ldr r1, [r2, #4]
- 80002e6: f441 5140 orr.w r1, r1, #12288 ; 0x3000
- 80002ea: 6051 str r1, [r2, #4]
- 80002ec: 6851 ldr r1, [r2, #4]
- 80002ee: f441 3140 orr.w r1, r1, #196608 ; 0x30000
- 80002f2: 6051 str r1, [r2, #4]
- 80002f4: 681a ldr r2, [r3, #0]
- 80002f6: f042 0204 orr.w r2, r2, #4
- 80002fa: 601a str r2, [r3, #0]
- 80002fc: 681a ldr r2, [r3, #0]
- 80002fe: f042 0240 orr.w r2, r2, #64 ; 0x40
- 8000302: 601a str r2, [r3, #0]
- 8000304: 681a ldr r2, [r3, #0]
- 8000306: f442 6280 orr.w r2, r2, #1024 ; 0x400
- 800030a: 601a str r2, [r3, #0]
- 800030c: 681a ldr r2, [r3, #0]
- 800030e: f442 4280 orr.w r2, r2, #16384 ; 0x4000
- 8000312: 601a str r2, [r3, #0]
- 8000314: 4770 bx lr
- 8000316: bf00 nop
- 8000318: 40010c00 andmi r0, r1, r0, lsl #24
- 800031c: 40010800 andmi r0, r1, r0, lsl #16
- 08000320 <dataBusInit>:
- 8000320: 4b2a ldr r3, [pc, #168] ; (80003cc <dataBusInit+0xac>)
- 8000322: 685a ldr r2, [r3, #4]
- 8000324: f022 020f bic.w r2, r2, #15
- 8000328: 605a str r2, [r3, #4]
- 800032a: 685a ldr r2, [r3, #4]
- 800032c: f022 02f0 bic.w r2, r2, #240 ; 0xf0
- 8000330: 605a str r2, [r3, #4]
- 8000332: 685a ldr r2, [r3, #4]
- 8000334: f422 6270 bic.w r2, r2, #3840 ; 0xf00
- 8000338: 605a str r2, [r3, #4]
- 800033a: 685a ldr r2, [r3, #4]
- 800033c: f422 4270 bic.w r2, r2, #61440 ; 0xf000
- 8000340: 605a str r2, [r3, #4]
- 8000342: 685a ldr r2, [r3, #4]
- 8000344: f422 2270 bic.w r2, r2, #983040 ; 0xf0000
- 8000348: 605a str r2, [r3, #4]
- 800034a: 685a ldr r2, [r3, #4]
- 800034c: f422 0270 bic.w r2, r2, #15728640 ; 0xf00000
- 8000350: 605a str r2, [r3, #4]
- 8000352: 685a ldr r2, [r3, #4]
- 8000354: f022 6270 bic.w r2, r2, #251658240 ; 0xf000000
- 8000358: 605a str r2, [r3, #4]
- 800035a: 685a ldr r2, [r3, #4]
- 800035c: f022 4270 bic.w r2, r2, #4026531840 ; 0xf0000000
- 8000360: 605a str r2, [r3, #4]
- 8000362: 681a ldr r2, [r3, #0]
- 8000364: f022 020f bic.w r2, r2, #15
- 8000368: 601a str r2, [r3, #0]
- 800036a: 681a ldr r2, [r3, #0]
- 800036c: f022 02f0 bic.w r2, r2, #240 ; 0xf0
- 8000370: 601a str r2, [r3, #0]
- 8000372: 685a ldr r2, [r3, #4]
- 8000374: f042 0203 orr.w r2, r2, #3
- 8000378: 605a str r2, [r3, #4]
- 800037a: 685a ldr r2, [r3, #4]
- 800037c: f042 0230 orr.w r2, r2, #48 ; 0x30
- 8000380: 605a str r2, [r3, #4]
- 8000382: 685a ldr r2, [r3, #4]
- 8000384: f442 7240 orr.w r2, r2, #768 ; 0x300
- 8000388: 605a str r2, [r3, #4]
- 800038a: 685a ldr r2, [r3, #4]
- 800038c: f442 5240 orr.w r2, r2, #12288 ; 0x3000
- 8000390: 605a str r2, [r3, #4]
- 8000392: 685a ldr r2, [r3, #4]
- 8000394: f442 3240 orr.w r2, r2, #196608 ; 0x30000
- 8000398: 605a str r2, [r3, #4]
- 800039a: 685a ldr r2, [r3, #4]
- 800039c: f442 1240 orr.w r2, r2, #3145728 ; 0x300000
- 80003a0: 605a str r2, [r3, #4]
- 80003a2: 685a ldr r2, [r3, #4]
- 80003a4: f042 7240 orr.w r2, r2, #50331648 ; 0x3000000
- 80003a8: 605a str r2, [r3, #4]
- 80003aa: 685a ldr r2, [r3, #4]
- 80003ac: f042 5240 orr.w r2, r2, #805306368 ; 0x30000000
- 80003b0: 605a str r2, [r3, #4]
- 80003b2: 681a ldr r2, [r3, #0]
- 80003b4: f042 0203 orr.w r2, r2, #3
- 80003b8: 601a str r2, [r3, #0]
- 80003ba: 681a ldr r2, [r3, #0]
- 80003bc: f042 0230 orr.w r2, r2, #48 ; 0x30
- 80003c0: 601a str r2, [r3, #0]
- 80003c2: 2201 movs r2, #1
- 80003c4: 611a str r2, [r3, #16]
- 80003c6: 2202 movs r2, #2
- 80003c8: 611a str r2, [r3, #16]
- 80003ca: 4770 bx lr
- 80003cc: 40010c00 andmi r0, r1, r0, lsl #24
- 080003d0 <systemPinsInit>:
- 80003d0: 4b0b ldr r3, [pc, #44] ; (8000400 <systemPinsInit+0x30>)
- 80003d2: 685a ldr r2, [r3, #4]
- 80003d4: f022 6270 bic.w r2, r2, #251658240 ; 0xf000000
- 80003d8: 605a str r2, [r3, #4]
- 80003da: 685a ldr r2, [r3, #4]
- 80003dc: f022 4270 bic.w r2, r2, #4026531840 ; 0xf0000000
- 80003e0: 605a str r2, [r3, #4]
- 80003e2: 685a ldr r2, [r3, #4]
- 80003e4: f042 6200 orr.w r2, r2, #134217728 ; 0x8000000
- 80003e8: 605a str r2, [r3, #4]
- 80003ea: 685a ldr r2, [r3, #4]
- 80003ec: f042 4200 orr.w r2, r2, #2147483648 ; 0x80000000
- 80003f0: 605a str r2, [r3, #4]
- 80003f2: f44f 0280 mov.w r2, #4194304 ; 0x400000
- 80003f6: 611a str r2, [r3, #16]
- 80003f8: f44f 0200 mov.w r2, #8388608 ; 0x800000
- 80003fc: 611a str r2, [r3, #16]
- 80003fe: 4770 bx lr
- 8000400: 40010c00 andmi r0, r1, r0, lsl #24
- 08000404 <debugLedInit>:
- 8000404: 4b0e ldr r3, [pc, #56] ; (8000440 <debugLedInit+0x3c>)
- 8000406: 681a ldr r2, [r3, #0]
- 8000408: f022 020f bic.w r2, r2, #15
- 800040c: 601a str r2, [r3, #0]
- 800040e: 681a ldr r2, [r3, #0]
- 8000410: f042 0203 orr.w r2, r2, #3
- 8000414: 601a str r2, [r3, #0]
- 8000416: f44f 3280 mov.w r2, #65536 ; 0x10000
- 800041a: 611a str r2, [r3, #16]
- 800041c: f8d3 2804 ldr.w r2, [r3, #2052] ; 0x804
- 8000420: f422 0270 bic.w r2, r2, #15728640 ; 0xf00000
- 8000424: f8c3 2804 str.w r2, [r3, #2052] ; 0x804
- 8000428: f8d3 2804 ldr.w r2, [r3, #2052] ; 0x804
- 800042c: f442 1240 orr.w r2, r2, #3145728 ; 0x300000
- 8000430: f8c3 2804 str.w r2, [r3, #2052] ; 0x804
- 8000434: f44f 5200 mov.w r2, #8192 ; 0x2000
- 8000438: f8c3 2810 str.w r2, [r3, #2064] ; 0x810
- 800043c: 4770 bx lr
- 800043e: bf00 nop
- 8000440: 40010800 andmi r0, r1, r0, lsl #16
- 08000444 <main>:
- 8000444: b508 push {r3, lr}
- 8000446: f7ff fecd bl 80001e4 <clockInit>
- 800044a: f7ff ff1f bl 800028c <portClockInit>
- 800044e: f7ff ff2d bl 80002ac <disableGlobalInterrupt>
- 8000452: f7ff ff2d bl 80002b0 <addressBusInit>
- 8000456: f7ff ff63 bl 8000320 <dataBusInit>
- 800045a: f7ff ffb9 bl 80003d0 <systemPinsInit>
- 800045e: f7ff ffd1 bl 8000404 <debugLedInit>
- 8000462: f44f 70fa mov.w r0, #500 ; 0x1f4
- 8000466: f000 f8af bl 80005c8 <delayMs>
- 800046a: f000 f857 bl 800051c <mainLoop>
- ...
- 08000470 <__libc_init_array>:
- 8000470: b570 push {r4, r5, r6, lr}
- 8000472: 2500 movs r5, #0
- 8000474: 4e0c ldr r6, [pc, #48] ; (80004a8 <__libc_init_array+0x38>)
- 8000476: 4c0d ldr r4, [pc, #52] ; (80004ac <__libc_init_array+0x3c>)
- 8000478: 1ba4 subs r4, r4, r6
- 800047a: 10a4 asrs r4, r4, #2
- 800047c: 42a5 cmp r5, r4
- 800047e: d109 bne.n 8000494 <__libc_init_array+0x24>
- 8000480: f000 f81a bl 80004b8 <_init>
- 8000484: 2500 movs r5, #0
- 8000486: 4e0a ldr r6, [pc, #40] ; (80004b0 <__libc_init_array+0x40>)
- 8000488: 4c0a ldr r4, [pc, #40] ; (80004b4 <__libc_init_array+0x44>)
- 800048a: 1ba4 subs r4, r4, r6
- 800048c: 10a4 asrs r4, r4, #2
- 800048e: 42a5 cmp r5, r4
- 8000490: d105 bne.n 800049e <__libc_init_array+0x2e>
- 8000492: bd70 pop {r4, r5, r6, pc}
- 8000494: f856 3025 ldr.w r3, [r6, r5, lsl #2]
- 8000498: 4798 blx r3
- 800049a: 3501 adds r5, #1
- 800049c: e7ee b.n 800047c <__libc_init_array+0xc>
- 800049e: f856 3025 ldr.w r3, [r6, r5, lsl #2]
- 80004a2: 4798 blx r3
- 80004a4: 3501 adds r5, #1
- 80004a6: e7f2 b.n 800048e <__libc_init_array+0x1e>
- 80004a8: 08000640 stmdaeq r0, {r6, r9, sl}
- 80004ac: 08000640 stmdaeq r0, {r6, r9, sl}
- 80004b0: 08000640 stmdaeq r0, {r6, r9, sl}
- 80004b4: 08000644 stmdaeq r0, {r2, r6, r9, sl}
- 080004b8 <_init>:
- 80004b8: b5f8 push {r3, r4, r5, r6, r7, lr}
- 80004ba: bf00 nop
- 80004bc: bcf8 pop {r3, r4, r5, r6, r7}
- 80004be: bc08 pop {r3}
- 80004c0: 469e mov lr, r3
- 80004c2: 4770 bx lr
- 080004c4 <_fini>:
- 80004c4: b5f8 push {r3, r4, r5, r6, r7, lr}
- 80004c6: bf00 nop
- 80004c8: bcf8 pop {r3, r4, r5, r6, r7}
- 80004ca: bc08 pop {r3}
- 80004cc: 469e mov lr, r3
- 80004ce: 4770 bx lr
- Disassembly of section .ramfunc:
- 080004d0 <readAddressBus>:
- 80004d0: f44f 13c0 mov.w r3, #1572864 ; 0x180000
- 80004d4: 490d ldr r1, [pc, #52] ; (800050c <readAddressBus+0x3c>)
- 80004d6: 4a0e ldr r2, [pc, #56] ; (8000510 <readAddressBus+0x40>)
- 80004d8: 480e ldr r0, [pc, #56] ; (8000514 <readAddressBus+0x44>)
- 80004da: 610b str r3, [r1, #16]
- 80004dc: 6893 ldr r3, [r2, #8]
- 80004de: 6108 str r0, [r1, #16]
- 80004e0: 6890 ldr r0, [r2, #8]
- 80004e2: f3c3 2303 ubfx r3, r3, #8, #4
- 80004e6: 0900 lsrs r0, r0, #4
- 80004e8: f000 00f0 and.w r0, r0, #240 ; 0xf0
- 80004ec: 4318 orrs r0, r3
- 80004ee: 4b0a ldr r3, [pc, #40] ; (8000518 <readAddressBus+0x48>)
- 80004f0: 610b str r3, [r1, #16]
- 80004f2: 6893 ldr r3, [r2, #8]
- 80004f4: f403 6370 and.w r3, r3, #3840 ; 0xf00
- 80004f8: 4318 orrs r0, r3
- 80004fa: 2318 movs r3, #24
- 80004fc: 610b str r3, [r1, #16]
- 80004fe: 6893 ldr r3, [r2, #8]
- 8000500: 011b lsls r3, r3, #4
- 8000502: f403 4370 and.w r3, r3, #61440 ; 0xf000
- 8000506: 4318 orrs r0, r3
- 8000508: 4770 bx lr
- 800050a: bf00 nop
- 800050c: 40010c00 andmi r0, r1, r0, lsl #24
- 8000510: 40010800 andmi r0, r1, r0, lsl #16
- 8000514: 00100008 andseq r0, r0, r8
- 8000518: 00080010 andeq r0, r8, r0, lsl r0
- 0800051c <mainLoop>:
- 800051c: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
- 8000520: 2100 movs r1, #0
- 8000522: f44f 15c0 mov.w r5, #1572864 ; 0x180000
- 8000526: f04f 0c18 mov.w ip, #24
- 800052a: f44f 3480 mov.w r4, #65536 ; 0x10000
- 800052e: f04f 0e01 mov.w lr, #1
- 8000532: 4a20 ldr r2, [pc, #128] ; (80005b4 <mainLoop+0x98>)
- 8000534: 4820 ldr r0, [pc, #128] ; (80005b8 <mainLoop+0x9c>)
- 8000536: 4e21 ldr r6, [pc, #132] ; (80005bc <mainLoop+0xa0>)
- 8000538: 4f21 ldr r7, [pc, #132] ; (80005c0 <mainLoop+0xa4>)
- 800053a: f8df 8088 ldr.w r8, [pc, #136] ; 80005c4 <mainLoop+0xa8>
- 800053e: 6893 ldr r3, [r2, #8]
- 8000540: f013 0fc0 tst.w r3, #192 ; 0xc0
- 8000544: d005 beq.n 8000552 <mainLoop+0x36>
- 8000546: 2900 cmp r1, #0
- 8000548: d0f9 beq.n 800053e <mainLoop+0x22>
- 800054a: f8c2 e010 str.w lr, [r2, #16]
- 800054e: 2100 movs r1, #0
- 8000550: e7f5 b.n 800053e <mainLoop+0x22>
- 8000552: 6115 str r5, [r2, #16]
- 8000554: 6883 ldr r3, [r0, #8]
- 8000556: 6116 str r6, [r2, #16]
- 8000558: f3c3 2a03 ubfx sl, r3, #8, #4
- 800055c: 6883 ldr r3, [r0, #8]
- 800055e: 6117 str r7, [r2, #16]
- 8000560: ea4f 1913 mov.w r9, r3, lsr #4
- 8000564: 6883 ldr r3, [r0, #8]
- 8000566: f009 09f0 and.w r9, r9, #240 ; 0xf0
- 800056a: f8c2 c010 str.w ip, [r2, #16]
- 800056e: f403 6370 and.w r3, r3, #3840 ; 0xf00
- 8000572: ea49 090a orr.w r9, r9, sl
- 8000576: ea43 0909 orr.w r9, r3, r9
- 800057a: 6883 ldr r3, [r0, #8]
- 800057c: 011b lsls r3, r3, #4
- 800057e: f403 4370 and.w r3, r3, #61440 ; 0xf000
- 8000582: ea43 0309 orr.w r3, r3, r9
- 8000586: f483 4900 eor.w r9, r3, #32768 ; 0x8000
- 800058a: f1b9 0f04 cmp.w r9, #4
- 800058e: bf8f iteee hi
- 8000590: f04f 0988 movhi.w r9, #136 ; 0x88
- 8000594: 4443 addls r3, r8
- 8000596: f5a3 4300 subls.w r3, r3, #32768 ; 0x8000
- 800059a: f893 9000 ldrbls.w r9, [r3]
- 800059e: 6893 ldr r3, [r2, #8]
- 80005a0: b29b uxth r3, r3
- 80005a2: ea43 2309 orr.w r3, r3, r9, lsl #8
- 80005a6: 60d3 str r3, [r2, #12]
- 80005a8: 2900 cmp r1, #0
- 80005aa: d1c8 bne.n 800053e <mainLoop+0x22>
- 80005ac: 6114 str r4, [r2, #16]
- 80005ae: 2101 movs r1, #1
- 80005b0: e7c5 b.n 800053e <mainLoop+0x22>
- 80005b2: bf00 nop
- 80005b4: 40010c00 andmi r0, r1, r0, lsl #24
- 80005b8: 40010800 andmi r0, r1, r0, lsl #16
- 80005bc: 00100008 andseq r0, r0, r8
- 80005c0: 00080010 andeq r0, r8, r0, lsl r0
- 80005c4: 20000000 andcs r0, r0, r0
- 080005c8 <delayMs>:
- 80005c8: f44f 53fa mov.w r3, #8000 ; 0x1f40
- 80005cc: 4358 muls r0, r3
- 80005ce: 3801 subs r0, #1
- 80005d0: d1fd bne.n 80005ce <delayMs+0x6>
- 80005d2: 4770 bx lr
- 080005d4 <delayCycles>:
- 80005d4: 0880 lsrs r0, r0, #2
- 80005d6: 3801 subs r0, #1
- 80005d8: bf00 nop
- 80005da: d1fc bne.n 80005d6 <delayCycles+0x2>
- 80005dc: 4770 bx lr
- 080005de <setDebugLed>:
- 80005de: b940 cbnz r0, 80005f2 <setDebugLed+0x14>
- 80005e0: 4b08 ldr r3, [pc, #32] ; (8000604 <setDebugLed+0x26>)
- 80005e2: b119 cbz r1, 80005ec <setDebugLed+0xe>
- 80005e4: f04f 5200 mov.w r2, #536870912 ; 0x20000000
- 80005e8: 611a str r2, [r3, #16]
- 80005ea: 4770 bx lr
- 80005ec: f44f 5200 mov.w r2, #8192 ; 0x2000
- 80005f0: e7fa b.n 80005e8 <setDebugLed+0xa>
- 80005f2: 2801 cmp r0, #1
- 80005f4: d1f9 bne.n 80005ea <setDebugLed+0xc>
- 80005f6: 4b04 ldr r3, [pc, #16] ; (8000608 <setDebugLed+0x2a>)
- 80005f8: b109 cbz r1, 80005fe <setDebugLed+0x20>
- 80005fa: 6118 str r0, [r3, #16]
- 80005fc: 4770 bx lr
- 80005fe: f44f 3280 mov.w r2, #65536 ; 0x10000
- 8000602: e7f1 b.n 80005e8 <setDebugLed+0xa>
- 8000604: 40011000 andmi r1, r1, r0
- 8000608: 40010800 andmi r0, r1, r0, lsl #16
- 0800060c <blink>:
- 800060c: b508 push {r3, lr}
- 800060e: f44f 70fa mov.w r0, #500 ; 0x1f4
- 8000612: f7ff ffd9 bl 80005c8 <delayMs>
- 8000616: 2100 movs r1, #0
- 8000618: 4608 mov r0, r1
- 800061a: f7ff ffe0 bl 80005de <setDebugLed>
- 800061e: 2101 movs r1, #1
- 8000620: 4608 mov r0, r1
- 8000622: f7ff ffdc bl 80005de <setDebugLed>
- 8000626: f44f 70fa mov.w r0, #500 ; 0x1f4
- 800062a: f7ff ffcd bl 80005c8 <delayMs>
- 800062e: 2101 movs r1, #1
- 8000630: 2000 movs r0, #0
- 8000632: f7ff ffd4 bl 80005de <setDebugLed>
- 8000636: 2100 movs r1, #0
- 8000638: 2001 movs r0, #1
- 800063a: f7ff ffd0 bl 80005de <setDebugLed>
- 800063e: e7e6 b.n 800060e <blink+0x2>
- Disassembly of section .init_array:
- 08000640 <__frame_dummy_init_array_entry>:
- 8000640: 08000131 stmdaeq r0, {r0, r4, r5, r8}
- Disassembly of section .fini_array:
- 08000644 <__do_global_dtors_aux_fini_array_entry>:
- 8000644: 0800010d stmdaeq r0, {r0, r2, r3, r8}
- Disassembly of section .data:
- 20000000 <mem>:
- 20000000: 01ff0055 mvnseq r0, r5, asr r0
- 20000004: 00000020 andeq r0, r0, r0, lsr #32
- Disassembly of section .bss:
- 20000008 <__bss_start__>:
- 20000008: 00000000 andeq r0, r0, r0
- 2000000c <object.8659>:
- ...
- Disassembly of section ._user_heap_stack:
- 20000024 <._user_heap_stack>:
- ...
- Disassembly of section .ARM.attributes:
- 00000000 <.ARM.attributes>:
- 0: 00002841 andeq r2, r0, r1, asr #16
- 4: 61656100 cmnvs r5, r0, lsl #2
- 8: 01006962 tsteq r0, r2, ror #18
- c: 0000001e andeq r0, r0, lr, lsl r0
- 10: 4d2d3705 stcmi 7, cr3, [sp, #-20]! ; 0xffffffec
- 14: 070a0600 streq r0, [sl, -r0, lsl #12]
- 18: 1202094d andne r0, r2, #1261568 ; 0x134000
- 1c: 15011404 strne r1, [r1, #-1028] ; 0xfffffbfc
- 20: 18031701 stmdane r3, {r0, r8, r9, sl, ip}
- 24: 22011a01 andcs r1, r1, #4096 ; 0x1000
- 28: Address 0x0000000000000028 is out of bounds.
- Disassembly of section .comment:
- 00000000 <.comment>:
- 0: 3a434347 bcc 10d0d24 <_Min_Stack_Size+0x10d0924>
- 4: 4e472820 cdpmi 8, 4, cr2, cr7, cr0, {1}
- 8: 6f542055 svcvs 0x00542055
- c: 20736c6f rsbscs r6, r3, pc, ror #24
- 10: 20726f66 rsbscs r6, r2, r6, ror #30
- 14: 206d7241 rsbcs r7, sp, r1, asr #4
- 18: 65626d45 strbvs r6, [r2, #-3397]! ; 0xfffff2bb
- 1c: 64656464 strbtvs r6, [r5], #-1124 ; 0xfffffb9c
- 20: 6f725020 svcvs 0x00725020
- 24: 73736563 cmnvc r3, #415236096 ; 0x18c00000
- 28: 2073726f rsbscs r7, r3, pc, ror #4
- 2c: 30322d37 eorscc r2, r2, r7, lsr sp
- 30: 712d3731 ; <UNDEFINED> instruction: 0x712d3731
- 34: 616d2d34 cmnvs sp, r4, lsr sp
- 38: 29726f6a ldmdbcs r2!, {r1, r3, r5, r6, r8, r9, sl, fp, sp, lr}^
- 3c: 322e3720 eorcc r3, lr, #32, 14 ; 0x800000
- 40: 3220312e eorcc r3, r0, #-2147483637 ; 0x8000000b
- 44: 30373130 eorscc r3, r7, r0, lsr r1
- 48: 20343039 eorscs r3, r4, r9, lsr r0
- 4c: 6c657228 sfmvs f7, 2, [r5], #-160 ; 0xffffff60
- 50: 65736165 ldrbvs r6, [r3, #-357]! ; 0xfffffe9b
- 54: 415b2029 cmpmi fp, r9, lsr #32
- 58: 652f4d52 strvs r4, [pc, #-3410]! ; fffff30e <BootRAM+0xef6faaf>
- 5c: 6465626d strbtvs r6, [r5], #-621 ; 0xfffffd93
- 60: 2d646564 cfstr64cs mvdx6, [r4, #-400]! ; 0xfffffe70
- 64: 72622d37 rsbvc r2, r2, #3520 ; 0xdc0
- 68: 68636e61 stmdavs r3!, {r0, r5, r6, r9, sl, fp, sp, lr}^
- 6c: 76657220 strbtvc r7, [r5], -r0, lsr #4
- 70: 6f697369 svcvs 0x00697369
- 74: 3532206e ldrcc r2, [r2, #-110]! ; 0xffffff92
- 78: 34303235 ldrtcc r3, [r0], #-565 ; 0xfffffdcb
- 7c: Address 0x000000000000007c is out of bounds.
- Disassembly of section .debug_frame:
- 00000000 <.debug_frame>:
- 0: 0000000c andeq r0, r0, ip
- 4: ffffffff ; <UNDEFINED> instruction: 0xffffffff
- 8: 7c020001 stcvc 0, cr0, [r2], {1}
- c: 000d0c0e andeq r0, sp, lr, lsl #24
- 10: 00000018 andeq r0, r0, r8, lsl r0
- 14: 00000000 andeq r0, r0, r0
- 18: 08000470 stmdaeq r0, {r4, r5, r6, sl}
- 1c: 00000048 andeq r0, r0, r8, asr #32
- 20: 84100e41 ldrhi r0, [r0], #-3649 ; 0xfffff1bf
- 24: 86038504 strhi r8, [r3], -r4, lsl #10
- 28: 00018e02 andeq r8, r1, r2, lsl #28
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