stack:  .usect "vars",4
systack: .usect "vars",4

    .data
x   .int 0x1,0x2,0x3,0x4
y   .int 0x5,0x6,0x7,0x8
z   .int 0x4,0x3,0x2,0x1
ay  .int 0x1
    .bss w, 2


    .text
    .def start
start

    BCLR CPL
    BCLR C54CM
    ;BSET FRCT
    AMOV #(stack+4),XSP
    AMOV #(systack+4),XSSP

    MOV #0xDEAD,stack
    MOV #0xDEAD,stack+1
    MOV #0xDEAD,stack+2
    MOV #0xDEAD,stack+3

    MOV #0xDEAD,systack
    MOV #0xDEAD,systack+1
    MOV #0xDEAD,systack+2
    MOV #0xDEAD,systack+3


    MOV #4,BK03
    MOV #4,BK47
    BSET AR0LC
    BSET AR2LC
    BSET AR4LC
    AMOV #000000h,XAR0 ; do adresowania x
    AMOV #000000h,XAR2 ; y
    AMOV #000000h,XAR4 ; z
    MOV #x,BSA01
    MOV #y,BSA23
    MOV #z,BSA45
    MOV #0000h,AR0
    MOV #0003h,AR2
    MOV #0000h,AR4


    CALL comp

loop    b loop

comp:
    nop
    MOV #0h,AC0
    MOV #3,BRC0 ; WYKONANIE INSTRUKCJI JEST BRCx+1 (ref.mnemoinstr)
    RPTB stmacend-1 ; take addr. before NOP
    MACM *AR0+,*AR2-,AC0
stmacend
    nop
    MOV AC0,*(#w) ; MOV result
    MOV #0,AC0 ; CLEAR ACC
    MOV #3,BRC0

    RPTB (ndmacend-1)
    MACM *AR0+,*AR4+,AC0
ndmacend
    nop
    MOV AC0,*(#w+1)

   CALL _delay
   RET

_delay
    MOV #9,BRC0
    RPTB delayend-1
    nop
delayend
    RET