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- //code for alu
- module alu(result,A,B,control);
- output reg [0:31] result;
- input [0:31] A;
- input [0:31]B;
- input [0:5]control;
- always @(*)
- begin
- case(control)
- //F0 f1 ena enb inva inc fun
- 6'b011000:result=A;
- 6'b010100:result=B;
- 6'b011010:result=~A;
- 6'b101100:result=~B;
- 6'b111100:result=A+B;
- 6'b111101:result=A+B+1;
- 6'b111001:result=A+1;
- 6'b110101:result=B+1;
- 6'b111111:result=B-A;
- 6'b110110:result=-A;
- 6'b001100:result=A&B;
- 6'b011100:result=A|B;
- 6'b010000:result=0;
- 6'b110001:result=1;
- 6'b110010:result=-1;
- default:result=0;
- endcase
- end
- endmodule
- //code for shifter
- module shifter(C,sll,sr,Alu_Out,clk);
- output reg [0:31]C;
- input clk;
- input sll,sr;
- input [0:31]Alu_Out;
- integer i;
- always @(posedge clk)
- begin
- if(sll==1'b1 && sr==1'b0)
- begin
- for(i=0;i<24;i=i+1)
- begin
- C[i]<=Alu_Out[i+8];
- end
- for(i=31;i>23;i=i-1)
- begin
- C[i]<=0;
- end
- end
- if(sll==1'b0 && sr==1'b1)
- begin
- C[0]<=Alu_Out[0];
- for(i=0;i<31;i=i+1)
- begin
- C[i+1]<=Alu_Out[i];
- end
- end
- end
- endmodule
- module shifter(C,sll,sr,Alu_Out,clk,A,B,control);
- output reg [0:31]C;
- input clk;
- input sll,sr;
- input [0:31] A;
- input [0:31]B;
- input [0:5]control;
- input [0:31]Alu_Out;
- alu first_call(Alu_out,A,B,control);
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