NAU88C22 pll set

float32_t nau_mclksel[] = {1.0f, 1.5f, 2.0f, 3.0f, 4.0f, 6.0f, 8.0f, 12.0f};

uint8_t nau88c22_set_fs_pll(float fs_hz, uint8_t pck_prescaller){

    if(fs_hz < 11999)return 1;
    if(fs_hz > 48001)return 2;

    float32_t frq_fs = fs_hz; // Hz
    float32_t frq_imclk = 256.0f * frq_fs;
    float32_t nau_mckl_in = (float32_t)(sysclk_get_cpu_hz() / pck_prescaller);

    if(nau_mckl_in > 33000000.0f)return 3;
    if(nau_mckl_in < 9000000.0f)return 4;

    uint8_t mclkseldiv = 0;
    uint8_t pll49mout = 0;

    float32_t nau_pll_f2 = 0.0f;
    float32_t nau_pll_f1 = 0.0f;

    for(uint8_t i=0; i<8; i++){
        nau_pll_f2 = 4.0f * nau_mclksel[i] * frq_imclk;
        if( (nau_pll_f2 >= 80000000.0) && (nau_pll_f2 < 110000000.0f) ){
            mclkseldiv = i;
            break;
        };
    };

    if(mclkseldiv == 0){
        for(uint8_t i=0; i<8; i++){
            nau_pll_f2 = 2.0f * nau_mclksel[i] * frq_imclk;
            if( (nau_pll_f2 >= 80000000.0) && (nau_pll_f2 < 110000000.0f) ){
                mclkseldiv = i;
                break;
            };
        };
    };

    uint8_t nau_pres_mckl = 3;
    uint8_t nau_r1_ready = 0;
    uint8_t nau_nxy = 0;
    float32_t nau_pll = 0.0f;
    uint32_t nau_int_pll = 0;

    nau_pll_f1 = nau_mckl_in;

    float32_t nau_pll_r = nau_pll_f2 / nau_pll_f1;

    if( (nau_pll_r > 6.0f) && (nau_pll_r < 13.0f)){
        nau_pres_mckl = 1;
    }else{
        nau_pll_r = nau_pll_f2 / (nau_pll_f1 * 2);
        nau_pres_mckl = 2;
    };

    if( (nau_pll_r > 6.0f) && (nau_pll_r < 13.0f)){
        nau_nxy = (uint8_t)floorf(nau_pll_r);
        nau_pll = nau_pll_r - (float32_t)(nau_nxy);
        nau_pll *= 16777216.0f;
        nau_int_pll = (uint32_t)nau_pll;
        nau_r1_ready = 1;
    };

    uint8_t pll_k1 = (nau_int_pll >> 18) & 0x3F;
    uint16_t pll_k2 = (nau_int_pll >> 9) & 0x1FF;
    uint16_t pll_k3 = (nau_int_pll >> 0) & 0x1FF;

    if(nau_r1_ready == 1){
        nau8812_clr_bit(POWER_MANAGMENT_1, (1<<PLLEN));
        nau8812_write(CLOCK_CONTROL_1, (1<<CLKM)|(mclkseldiv<<MCLKSEL)|(0xD));
        nau8812_write(PLLN_N, ( (nau_pres_mckl-1) << PLLMCLK) | (nau_nxy) );
        nau8812_write(PLL_K_1, pll_k1);
        nau8812_write(PLL_K_2, pll_k2);
        nau8812_write(PLL_K_3, pll_k3);
    }else{
        return 5;
    }

    nau8812_set_bit(POWER_MANAGMENT_1, (1<<PLLEN));
    return 0;
}