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BPi M2 Berry benchmarks

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Aug 5th, 2017
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  1. root@bpi-iot-ros-ai:~# 7za b
  2.  
  3. 7-Zip (A) 9.20 Copyright (c) 1999-2010 Igor Pavlov 2010-11-18
  4. p7zip Version 9.20 (locale=en_US.UTF-8,Utf16=on,HugeFiles=on,4 CPUs)
  5.  
  6. RAM size: 998 MB, # CPU hardware threads: 4
  7. RAM usage: 850 MB, # Benchmark threads: 4
  8.  
  9. Dict Compressing | Decompressing
  10. Speed Usage R/U Rating | Speed Usage R/U Rating
  11. KB/s % MIPS MIPS | KB/s % MIPS MIPS
  12.  
  13. 22: 1336 299 434 1300 | 36258 397 824 3271
  14. 23: 1314 301 444 1339 | 35334 393 823 3233
  15. 24: 1337 313 458 1437 | 35029 395 821 3249
  16. 25: 1291 317 465 1475 | 33194 383 815 3121
  17. ----------------------------------------------------------------
  18. Avr: 308 451 1388 392 821 3219
  19. Tot: 350 636 2303
  20. root@bpi-iot-ros-ai:~# sysbench --test=cpu --cpu-max-prime=20000 run --num-threads=$(grep -c '^processor' /proc/cpuinfo)
  21. sysbench 0.4.12: multi-threaded system evaluation benchmark
  22.  
  23. Running the test with following options:
  24. Number of threads: 4
  25.  
  26. Doing CPU performance benchmark
  27.  
  28. Threads started!
  29. Done.
  30.  
  31. Maximum prime number checked in CPU test: 20000
  32.  
  33.  
  34. Test execution summary:
  35. total time: 118.4670s
  36. total number of events: 10000
  37. total time taken by event execution: 473.8089
  38. per-request statistics:
  39. min: 46.72ms
  40. avg: 47.38ms
  41. max: 226.98ms
  42. approx. 95 percentile: 47.70ms
  43.  
  44. Threads fairness:
  45. events (avg/stddev): 2500.0000/4.24
  46. execution time (avg/stddev): 118.4522/0.01
  47.  
  48. root@bpi-iot-ros-ai:~# minerd --benchmark 2>&1 | grep Total
  49. [2017-08-05 15:01:57] Total: 2.06 khash/s
  50. [2017-08-05 15:02:02] Total: 2.06 khash/s
  51. [2017-08-05 15:02:07] Total: 2.06 khash/s
  52. [2017-08-05 15:02:12] Total: 2.05 khash/s
  53. [2017-08-05 15:02:17] Total: 2.06 khash/s
  54. [2017-08-05 15:02:22] Total: 2.05 khash/s
  55. [2017-08-05 15:02:27] Total: 2.05 khash/s
  56. [2017-08-05 15:02:32] Total: 2.05 khash/s
  57. [2017-08-05 15:02:37] Total: 2.06 khash/s
  58. [2017-08-05 15:02:42] Total: 2.05 khash/s
  59. [2017-08-05 15:02:47] Total: 2.06 khash/s
  60. [2017-08-05 15:02:52] Total: 2.05 khash/s
  61. [2017-08-05 15:02:57] Total: 2.06 khash/s
  62. [2017-08-05 15:03:02] Total: 2.05 khash/s
  63. [2017-08-05 15:03:07] Total: 2.06 khash/s
  64. ^C
  65.  
  66. root@bpi-iot-ros-ai:~# /usr/local/src/tinymembench/tinymembench
  67. tinymembench v0.4.9 (simple benchmark for memory throughput and latency)
  68.  
  69. ==========================================================================
  70. == Memory bandwidth tests ==
  71. == ==
  72. == Note 1: 1MB = 1000000 bytes ==
  73. == Note 2: Results for 'copy' tests show how many bytes can be ==
  74. == copied per second (adding together read and writen ==
  75. == bytes would have provided twice higher numbers) ==
  76. == Note 3: 2-pass copy means that we are using a small temporary buffer ==
  77. == to first fetch data into it, and only then write it to the ==
  78. == destination (source -> L1 cache, L1 cache -> destination) ==
  79. == Note 4: If sample standard deviation exceeds 0.1%, it is shown in ==
  80. == brackets ==
  81. ==========================================================================
  82.  
  83. C copy backwards : 268.7 MB/s (0.1%)
  84. C copy backwards (32 byte blocks) : 1024.2 MB/s
  85. C copy backwards (64 byte blocks) : 1029.1 MB/s (1.4%)
  86. C copy : 1029.3 MB/s (0.4%)
  87. C copy prefetched (32 bytes step) : 1112.9 MB/s (0.4%)
  88. C copy prefetched (64 bytes step) : 1106.1 MB/s (0.2%)
  89. C 2-pass copy : 787.3 MB/s (0.2%)
  90. C 2-pass copy prefetched (32 bytes step) : 880.5 MB/s
  91. C 2-pass copy prefetched (64 bytes step) : 902.0 MB/s
  92. C fill : 4126.0 MB/s (0.9%)
  93. C fill (shuffle within 16 byte blocks) : 4113.3 MB/s (0.9%)
  94. C fill (shuffle within 32 byte blocks) : 376.9 MB/s (3.6%)
  95. C fill (shuffle within 64 byte blocks) : 356.4 MB/s (1.7%)
  96. ---
  97. standard memcpy : 1110.6 MB/s (0.3%)
  98. standard memset : 3571.6 MB/s (0.2%)
  99. ---
  100. NEON read : 1300.5 MB/s
  101. NEON read prefetched (32 bytes step) : 1474.6 MB/s
  102. NEON read prefetched (64 bytes step) : 1476.7 MB/s
  103. NEON read 2 data streams : 367.2 MB/s
  104. NEON read 2 data streams prefetched (32 bytes step) : 706.9 MB/s
  105. NEON read 2 data streams prefetched (64 bytes step) : 752.3 MB/s
  106. NEON copy : 1049.4 MB/s (0.3%)
  107. NEON copy prefetched (32 bytes step) : 1034.0 MB/s (0.3%)
  108. NEON copy prefetched (64 bytes step) : 1124.4 MB/s (0.8%)
  109. NEON unrolled copy : 1040.3 MB/s (0.4%)
  110. NEON unrolled copy prefetched (32 bytes step) : 1055.4 MB/s (0.3%)
  111. NEON unrolled copy prefetched (64 bytes step) : 1093.3 MB/s (0.3%)
  112. NEON copy backwards : 1041.2 MB/s (0.3%)
  113. NEON copy backwards prefetched (32 bytes step) : 1028.5 MB/s (0.5%)
  114. NEON copy backwards prefetched (64 bytes step) : 1088.7 MB/s (0.3%)
  115. NEON 2-pass copy : 884.0 MB/s (1.2%)
  116. NEON 2-pass copy prefetched (32 bytes step) : 952.6 MB/s
  117. NEON 2-pass copy prefetched (64 bytes step) : 990.1 MB/s (0.2%)
  118. NEON unrolled 2-pass copy : 773.3 MB/s (0.2%)
  119. NEON unrolled 2-pass copy prefetched (32 bytes step) : 751.4 MB/s (0.5%)
  120. NEON unrolled 2-pass copy prefetched (64 bytes step) : 784.5 MB/s
  121. NEON fill : 3908.3 MB/s
  122. NEON fill backwards : 3918.2 MB/s (0.5%)
  123. VFP copy : 1043.8 MB/s
  124. VFP 2-pass copy : 777.2 MB/s
  125. ARM fill (STRD) : 3009.9 MB/s
  126. ARM fill (STM with 8 registers) : 3927.3 MB/s (0.5%)
  127. ARM fill (STM with 4 registers) : 3570.3 MB/s
  128. ARM copy prefetched (incr pld) : 1073.5 MB/s (0.2%)
  129. ARM copy prefetched (wrap pld) : 1081.0 MB/s (2.3%)
  130. ARM 2-pass copy prefetched (incr pld) : 876.7 MB/s (0.3%)
  131. ARM 2-pass copy prefetched (wrap pld) : 829.5 MB/s
  132.  
  133. ==========================================================================
  134. == Framebuffer read tests. ==
  135. == ==
  136. == Many ARM devices use a part of the system memory as the framebuffer, ==
  137. == typically mapped as uncached but with write-combining enabled. ==
  138. == Writes to such framebuffers are quite fast, but reads are much ==
  139. == slower and very sensitive to the alignment and the selection of ==
  140. == CPU instructions which are used for accessing memory. ==
  141. == ==
  142. == Many x86 systems allocate the framebuffer in the GPU memory, ==
  143. == accessible for the CPU via a relatively slow PCI-E bus. Moreover, ==
  144. == PCI-E is asymmetric and handles reads a lot worse than writes. ==
  145. == ==
  146. == If uncached framebuffer reads are reasonably fast (at least 100 MB/s ==
  147. == or preferably >300 MB/s), then using the shadow framebuffer layer ==
  148. == is not necessary in Xorg DDX drivers, resulting in a nice overall ==
  149. == performance improvement. For example, the xf86-video-fbturbo DDX ==
  150. == uses this trick. ==
  151. ==========================================================================
  152.  
  153. NEON read (from framebuffer) : 50.1 MB/s
  154. NEON copy (from framebuffer) : 49.4 MB/s
  155. NEON 2-pass copy (from framebuffer) : 49.3 MB/s
  156. NEON unrolled copy (from framebuffer) : 50.0 MB/s
  157. NEON 2-pass unrolled copy (from framebuffer) : 49.0 MB/s
  158. VFP copy (from framebuffer) : 343.2 MB/s (0.2%)
  159. VFP 2-pass copy (from framebuffer) : 304.6 MB/s
  160. ARM copy (from framebuffer) : 187.5 MB/s (0.2%)
  161. ARM 2-pass copy (from framebuffer) : 174.5 MB/s
  162.  
  163. ==========================================================================
  164. == Memory latency test ==
  165. == ==
  166. == Average time is measured for random memory accesses in the buffers ==
  167. == of different sizes. The larger is the buffer, the more significant ==
  168. == are relative contributions of TLB, L1/L2 cache misses and SDRAM ==
  169. == accesses. For extremely large buffer sizes we are expecting to see ==
  170. == page table walk with several requests to SDRAM for almost every ==
  171. == memory access (though 64MiB is not nearly large enough to experience ==
  172. == this effect to its fullest). ==
  173. == ==
  174. == Note 1: All the numbers are representing extra time, which needs to ==
  175. == be added to L1 cache latency. The cycle timings for L1 cache ==
  176. == latency can be usually found in the processor documentation. ==
  177. == Note 2: Dual random read means that we are simultaneously performing ==
  178. == two independent memory accesses at a time. In the case if ==
  179. == the memory subsystem can't handle multiple outstanding ==
  180. == requests, dual random read has the same timings as two ==
  181. == single reads performed one after another. ==
  182. ==========================================================================
  183.  
  184. block size : single random read / dual random read
  185. 1024 : 0.0 ns / 0.0 ns
  186. 2048 : 0.0 ns / 0.0 ns
  187. 4096 : 0.0 ns / 0.0 ns
  188. 8192 : 0.0 ns / 0.0 ns
  189. 16384 : 0.0 ns / 0.0 ns
  190. 32768 : 0.0 ns / 0.1 ns
  191. 65536 : 5.4 ns / 9.7 ns
  192. 131072 : 9.4 ns / 14.0 ns
  193. 262144 : 11.8 ns / 17.5 ns
  194. 524288 : 21.1 ns / 29.2 ns
  195. 1048576 : 98.0 ns / 142.2 ns
  196. 2097152 : 135.5 ns / 179.6 ns
  197. 4194304 : 156.8 ns / 191.3 ns
  198. 8388608 : 168.2 ns / 198.7 ns
  199. 16777216 : 177.1 ns / 208.3 ns
  200. 33554432 : 186.7 ns / 222.8 ns
  201. 67108864 : 201.1 ns / 248.5 ns
  202.  
  203. root@bpi-iot-ros-ai:~# cat /sys/devices/1c62000.dramfreq/devfreq/dramfreq/cur_freq
  204. 576000
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