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bcm2711-rpi-cm4s-devicetree.source

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Jul 17th, 2024
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  1. /dts-v1/;
  2.  
  3. /memreserve/ 0x0000000000000000 0x0000000000001000;
  4. / {
  5. compatible = "raspberrypi,4-compute-module-s\0brcm,bcm2711";
  6. model = "Raspberry Pi Compute Module 4S";
  7. #address-cells = <0x02>;
  8. #size-cells = <0x01>;
  9. interrupt-parent = <0x01>;
  10.  
  11. aliases {
  12. serial0 = "/soc/serial@7e201000";
  13. serial1 = "/soc/serial@7e215040";
  14. emmc2bus = "/emmc2bus";
  15. ethernet0 = "/scb/ethernet@7d580000";
  16. pcie0 = "/scb/pcie@7d500000";
  17. blconfig = "/reserved-memory/nvram@0";
  18. blpubkey = "/reserved-memory/nvram@1";
  19. aux = "/soc/aux@7e215000";
  20. sound = "/soc/sound";
  21. soc = "/soc";
  22. dma = "/soc/dma-controller@7e007000";
  23. watchdog = "/soc/watchdog@7e100000";
  24. random = "/soc/rng@7e104000";
  25. mailbox = "/soc/mailbox@7e00b880";
  26. gpio = "/soc/gpio@7e200000";
  27. uart0 = "/soc/serial@7e201000";
  28. uart1 = "/soc/serial@7e215040";
  29. sdhost = "/soc/mmc@7e202000";
  30. mmc = "/soc/mmc@7e300000";
  31. mmc1 = "/soc/mmcnr@7e300000";
  32. mmc0 = "/emmc2bus/mmc@7e340000";
  33. i2s = "/soc/i2s@7e203000";
  34. i2c0 = "/soc/i2c0mux/i2c@0";
  35. i2c1 = "/soc/i2c@7e804000";
  36. i2c10 = "/soc/i2c0mux/i2c@1";
  37. i2c = "/soc/i2c@7e804000";
  38. spi0 = "/soc/spi@7e204000";
  39. spi1 = "/soc/spi@7e215080";
  40. spi2 = "/soc/spi@7e2150c0";
  41. usb = "/soc/usb@7e980000";
  42. leds = "/leds";
  43. fb = "/soc/fb";
  44. thermal = "/soc/avs-monitor@7d5d2000/thermal";
  45. axiperf = "/soc/axiperf";
  46. uart2 = "/soc/serial@7e201400";
  47. uart3 = "/soc/serial@7e201600";
  48. uart4 = "/soc/serial@7e201800";
  49. uart5 = "/soc/serial@7e201a00";
  50. serial2 = "/soc/serial@7e201400";
  51. serial3 = "/soc/serial@7e201600";
  52. serial4 = "/soc/serial@7e201800";
  53. serial5 = "/soc/serial@7e201a00";
  54. mmc2 = "/soc/mmc@7e202000";
  55. i2c3 = "/soc/i2c@7e205600";
  56. i2c4 = "/soc/i2c@7e205800";
  57. i2c5 = "/soc/i2c@7e205a00";
  58. i2c6 = "/soc/i2c@7e205c00";
  59. spi3 = "/soc/spi@7e204600";
  60. spi4 = "/soc/spi@7e204800";
  61. spi5 = "/soc/spi@7e204a00";
  62. spi6 = "/soc/spi@7e204c00";
  63. phandle = <0x45>;
  64. };
  65.  
  66. chosen {
  67. stdout-path = "serial0:115200n8";
  68. bootargs = "coherent_pool=1M snd_bcm2835.enable_headphones=0";
  69. phandle = <0x48>;
  70. };
  71.  
  72. reserved-memory {
  73. #address-cells = <0x02>;
  74. #size-cells = <0x01>;
  75. ranges;
  76. phandle = <0x52>;
  77.  
  78. linux,cma {
  79. compatible = "shared-dma-pool";
  80. size = <0x4000000>;
  81. reusable;
  82. linux,cma-default;
  83. alloc-ranges = <0x00 0x00 0x30000000>;
  84. phandle = <0x53>;
  85. };
  86.  
  87. nvram@0 {
  88. compatible = "raspberrypi,bootloader-config\0nvmem-rmem";
  89. #address-cells = <0x01>;
  90. #size-cells = <0x01>;
  91. reg = <0x00 0x00 0x00>;
  92. no-map;
  93. status = "disabled";
  94. phandle = <0x54>;
  95. };
  96.  
  97. nvram@1 {
  98. compatible = "raspberrypi,bootloader-public-key\0nvmem-rmem";
  99. #address-cells = <0x01>;
  100. #size-cells = <0x01>;
  101. reg = <0x00 0x00 0x00>;
  102. no-map;
  103. status = "disabled";
  104. phandle = <0x55>;
  105. };
  106. };
  107.  
  108. thermal-zones {
  109.  
  110. cpu-thermal {
  111. polling-delay-passive = <0x00>;
  112. polling-delay = <0x3e8>;
  113. coefficients = <0xfffffe19 0x641b8>;
  114. thermal-sensors = <0x02>;
  115. phandle = <0x56>;
  116.  
  117. trips {
  118. phandle = <0x57>;
  119.  
  120. cpu-crit {
  121. temperature = <0x1adb0>;
  122. hysteresis = <0x00>;
  123. type = "critical";
  124. };
  125. };
  126.  
  127. cooling-maps {
  128. phandle = <0x58>;
  129. };
  130. };
  131. };
  132.  
  133. soc {
  134. compatible = "simple-bus";
  135. #address-cells = <0x01>;
  136. #size-cells = <0x01>;
  137. ranges = <0x7e000000 0x00 0xfe000000 0x1800000 0x7c000000 0x00 0xfc000000 0x2000000 0x40000000 0x00 0xff800000 0x800000>;
  138. dma-ranges = <0xc0000000 0x00 0x00 0x40000000 0x7c000000 0x00 0xfc000000 0x3800000>;
  139. phandle = <0x59>;
  140.  
  141. timer@7e003000 {
  142. compatible = "brcm,bcm2835-system-timer";
  143. reg = <0x7e003000 0x1000>;
  144. interrupts = <0x00 0x40 0x04 0x00 0x41 0x04 0x00 0x42 0x04 0x00 0x43 0x04>;
  145. clock-frequency = <0xf4240>;
  146. status = "disabled";
  147. phandle = <0x5a>;
  148. };
  149.  
  150. txp@7e004000 {
  151. compatible = "brcm,bcm2835-txp";
  152. reg = <0x7e004000 0x20>;
  153. interrupts = <0x00 0x4b 0x04>;
  154. status = "disabled";
  155. phandle = <0x5b>;
  156. };
  157.  
  158. cprman@7e101000 {
  159. compatible = "brcm,bcm2711-cprman";
  160. #clock-cells = <0x01>;
  161. reg = <0x7e101000 0x2000>;
  162. clocks = <0x03 0x04 0x00 0x04 0x01 0x04 0x02 0x05 0x00 0x05 0x01 0x05 0x02>;
  163. firmware = <0x06>;
  164. phandle = <0x08>;
  165. };
  166.  
  167. mailbox@7e00b880 {
  168. compatible = "brcm,bcm2835-mbox";
  169. reg = <0x7e00b880 0x40>;
  170. interrupts = <0x00 0x21 0x04>;
  171. #mbox-cells = <0x00>;
  172. phandle = <0x31>;
  173. };
  174.  
  175. gpio@7e200000 {
  176. compatible = "brcm,bcm2711-gpio";
  177. reg = <0x7e200000 0xb4>;
  178. interrupts = <0x00 0x71 0x04 0x00 0x72 0x04>;
  179. gpio-controller;
  180. #gpio-cells = <0x02>;
  181. interrupt-controller;
  182. #interrupt-cells = <0x02>;
  183. gpio-ranges = <0x07 0x00 0x00 0x3a>;
  184. gpio-line-names = "ID_SDA\0ID_SCL\0GPIO2\0GPIO3\0GPIO4\0GPIO5\0GPIO6\0GPIO7\0GPIO8\0GPIO9\0GPIO10\0GPIO11\0GPIO12\0GPIO13\0GPIO14\0GPIO15\0GPIO16\0GPIO17\0GPIO18\0GPIO19\0GPIO20\0GPIO21\0GPIO22\0GPIO23\0GPIO24\0GPIO25\0GPIO26\0GPIO27\0GPIO28\0GPIO29\0GPIO30\0GPIO31\0GPIO32\0GPIO33\0GPIO34\0GPIO35\0GPIO36\0GPIO37\0GPIO38\0GPIO39\0PWM0_MISO\0PWM1_MOSI\0GPIO42\0GPIO43\0GPIO44\0GPIO45";
  185. phandle = <0x07>;
  186.  
  187. dpi-gpio0 {
  188. brcm,pins = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b>;
  189. brcm,function = <0x06>;
  190. phandle = <0x5c>;
  191. };
  192.  
  193. emmc-gpio22 {
  194. brcm,pins = <0x16 0x17 0x18 0x19 0x1a 0x1b>;
  195. brcm,function = <0x07>;
  196. phandle = <0x5d>;
  197. };
  198.  
  199. emmc-gpio34 {
  200. brcm,pins = <0x22 0x23 0x24 0x25 0x26 0x27>;
  201. brcm,function = <0x07>;
  202. brcm,pull = <0x00 0x02 0x02 0x02 0x02 0x02>;
  203. phandle = <0x5e>;
  204. };
  205.  
  206. emmc-gpio48 {
  207. brcm,pins = <0x30 0x31 0x32 0x33 0x34 0x35>;
  208. brcm,function = <0x07>;
  209. phandle = <0x10>;
  210. };
  211.  
  212. gpclk0-gpio4 {
  213. brcm,pins = <0x04>;
  214. brcm,function = <0x04>;
  215. phandle = <0x5f>;
  216. };
  217.  
  218. gpclk1-gpio5 {
  219. brcm,pins = <0x05>;
  220. brcm,function = <0x04>;
  221. phandle = <0x60>;
  222. };
  223.  
  224. gpclk1-gpio42 {
  225. brcm,pins = <0x2a>;
  226. brcm,function = <0x04>;
  227. phandle = <0x61>;
  228. };
  229.  
  230. gpclk1-gpio44 {
  231. brcm,pins = <0x2c>;
  232. brcm,function = <0x04>;
  233. phandle = <0x62>;
  234. };
  235.  
  236. gpclk2-gpio6 {
  237. brcm,pins = <0x06>;
  238. brcm,function = <0x04>;
  239. phandle = <0x63>;
  240. };
  241.  
  242. gpclk2-gpio43 {
  243. brcm,pins = <0x2b>;
  244. brcm,function = <0x04>;
  245. brcm,pull = <0x00>;
  246. phandle = <0x64>;
  247. };
  248.  
  249. i2c0if-gpio0 {
  250. brcm,pins = <0x00 0x01>;
  251. brcm,function = <0x04>;
  252. phandle = <0x2f>;
  253. };
  254.  
  255. i2c0if-gpio28 {
  256. brcm,pins = <0x1c 0x1d>;
  257. brcm,function = <0x04>;
  258. phandle = <0x30>;
  259. };
  260.  
  261. i2c0if-gpio44 {
  262. brcm,pins = <0x2c 0x2d>;
  263. brcm,function = <0x05>;
  264. phandle = <0x65>;
  265. };
  266.  
  267. i2c1-gpio2 {
  268. brcm,pins = <0x02 0x03>;
  269. brcm,function = <0x04>;
  270. phandle = <0x66>;
  271. };
  272.  
  273. i2c1-gpio44 {
  274. brcm,pins = <0x2c 0x2d>;
  275. brcm,function = <0x06>;
  276. phandle = <0x67>;
  277. };
  278.  
  279. jtag-gpio22 {
  280. brcm,pins = <0x16 0x17 0x18 0x19 0x1a 0x1b>;
  281. brcm,function = <0x03>;
  282. phandle = <0x68>;
  283. };
  284.  
  285. pcm-gpio18 {
  286. brcm,pins = <0x12 0x13 0x14 0x15>;
  287. brcm,function = <0x04>;
  288. phandle = <0x69>;
  289. };
  290.  
  291. pcm-gpio28 {
  292. brcm,pins = <0x1c 0x1d 0x1e 0x1f>;
  293. brcm,function = <0x06>;
  294. phandle = <0x6a>;
  295. };
  296.  
  297. sdhost-gpio48 {
  298. brcm,pins = <0x30 0x31 0x32 0x33 0x34 0x35>;
  299. brcm,function = <0x04>;
  300. phandle = <0x6b>;
  301. };
  302.  
  303. spi0-gpio7 {
  304. brcm,pins = <0x07 0x08 0x09 0x0a 0x0b>;
  305. brcm,function = <0x04>;
  306. phandle = <0x6c>;
  307. };
  308.  
  309. spi0-gpio35 {
  310. brcm,pins = <0x23 0x24 0x25 0x26 0x27>;
  311. brcm,function = <0x04>;
  312. phandle = <0x6d>;
  313. };
  314.  
  315. spi1-gpio16 {
  316. brcm,pins = <0x10 0x11 0x12 0x13 0x14 0x15>;
  317. brcm,function = <0x03>;
  318. phandle = <0x6e>;
  319. };
  320.  
  321. spi2-gpio40 {
  322. brcm,pins = <0x28 0x29 0x2a 0x2b 0x2c 0x2d>;
  323. brcm,function = <0x03>;
  324. phandle = <0x6f>;
  325. };
  326.  
  327. uart0-gpio14 {
  328. brcm,pins = <0x0e 0x0f>;
  329. brcm,function = <0x04>;
  330. phandle = <0x70>;
  331. };
  332.  
  333. uart0-ctsrts-gpio16 {
  334. brcm,pins = <0x10 0x11>;
  335. brcm,function = <0x07>;
  336. phandle = <0x71>;
  337. };
  338.  
  339. uart0-ctsrts-gpio30 {
  340. brcm,pins = <0x1e 0x1f>;
  341. brcm,function = <0x07>;
  342. brcm,pull = <0x02 0x00>;
  343. phandle = <0x72>;
  344. };
  345.  
  346. uart0-gpio32 {
  347. brcm,pins = <0x20 0x21>;
  348. brcm,function = <0x07>;
  349. brcm,pull = <0x00 0x02>;
  350. phandle = <0x73>;
  351. };
  352.  
  353. uart0-gpio36 {
  354. brcm,pins = <0x24 0x25>;
  355. brcm,function = <0x06>;
  356. phandle = <0x74>;
  357. };
  358.  
  359. uart0-ctsrts-gpio38 {
  360. brcm,pins = <0x26 0x27>;
  361. brcm,function = <0x06>;
  362. phandle = <0x75>;
  363. };
  364.  
  365. uart1-gpio14 {
  366. brcm,pins = <0x0e 0x0f>;
  367. brcm,function = <0x02>;
  368. phandle = <0x76>;
  369. };
  370.  
  371. uart1-ctsrts-gpio16 {
  372. brcm,pins = <0x10 0x11>;
  373. brcm,function = <0x02>;
  374. phandle = <0x77>;
  375. };
  376.  
  377. uart1-gpio32 {
  378. brcm,pins = <0x20 0x21>;
  379. brcm,function = <0x02>;
  380. phandle = <0x78>;
  381. };
  382.  
  383. uart1-ctsrts-gpio30 {
  384. brcm,pins = <0x1e 0x1f>;
  385. brcm,function = <0x02>;
  386. phandle = <0x79>;
  387. };
  388.  
  389. uart1-gpio40 {
  390. brcm,pins = <0x28 0x29>;
  391. brcm,function = <0x02>;
  392. phandle = <0x7a>;
  393. };
  394.  
  395. uart1-ctsrts-gpio42 {
  396. brcm,pins = <0x2a 0x2b>;
  397. brcm,function = <0x02>;
  398. phandle = <0x7b>;
  399. };
  400.  
  401. gpclk0-gpio49 {
  402. phandle = <0x7c>;
  403.  
  404. pin-gpclk {
  405. pins = "gpio49";
  406. function = "alt1";
  407. bias-disable;
  408. };
  409. };
  410.  
  411. gpclk1-gpio50 {
  412. phandle = <0x7d>;
  413.  
  414. pin-gpclk {
  415. pins = "gpio50";
  416. function = "alt1";
  417. bias-disable;
  418. };
  419. };
  420.  
  421. gpclk2-gpio51 {
  422. phandle = <0x7e>;
  423.  
  424. pin-gpclk {
  425. pins = "gpio51";
  426. function = "alt1";
  427. bias-disable;
  428. };
  429. };
  430.  
  431. i2c0if-gpio46 {
  432. phandle = <0x7f>;
  433.  
  434. pin-sda {
  435. function = "alt0";
  436. pins = "gpio46";
  437. bias-pull-up;
  438. };
  439.  
  440. pin-scl {
  441. function = "alt0";
  442. pins = "gpio47";
  443. bias-disable;
  444. };
  445. };
  446.  
  447. i2c1-gpio46 {
  448. phandle = <0x80>;
  449.  
  450. pin-sda {
  451. function = "alt1";
  452. pins = "gpio46";
  453. bias-pull-up;
  454. };
  455.  
  456. pin-scl {
  457. function = "alt1";
  458. pins = "gpio47";
  459. bias-disable;
  460. };
  461. };
  462.  
  463. i2c3-gpio2 {
  464. phandle = <0x81>;
  465.  
  466. pin-sda {
  467. function = "alt5";
  468. pins = "gpio2";
  469. bias-pull-up;
  470. };
  471.  
  472. pin-scl {
  473. function = "alt5";
  474. pins = "gpio3";
  475. bias-disable;
  476. };
  477. };
  478.  
  479. i2c3-gpio4 {
  480. phandle = <0x82>;
  481.  
  482. pin-sda {
  483. function = "alt5";
  484. pins = "gpio4";
  485. bias-pull-up;
  486. };
  487.  
  488. pin-scl {
  489. function = "alt5";
  490. pins = "gpio5";
  491. bias-disable;
  492. };
  493. };
  494.  
  495. i2c4-gpio6 {
  496. phandle = <0x83>;
  497.  
  498. pin-sda {
  499. function = "alt5";
  500. pins = "gpio6";
  501. bias-pull-up;
  502. };
  503.  
  504. pin-scl {
  505. function = "alt5";
  506. pins = "gpio7";
  507. bias-disable;
  508. };
  509. };
  510.  
  511. i2c4-gpio8 {
  512. phandle = <0x84>;
  513.  
  514. pin-sda {
  515. function = "alt5";
  516. pins = "gpio8";
  517. bias-pull-up;
  518. };
  519.  
  520. pin-scl {
  521. function = "alt5";
  522. pins = "gpio9";
  523. bias-disable;
  524. };
  525. };
  526.  
  527. i2c5-gpio10 {
  528. phandle = <0x85>;
  529.  
  530. pin-sda {
  531. function = "alt5";
  532. pins = "gpio10";
  533. bias-pull-up;
  534. };
  535.  
  536. pin-scl {
  537. function = "alt5";
  538. pins = "gpio11";
  539. bias-disable;
  540. };
  541. };
  542.  
  543. i2c5-gpio12 {
  544. phandle = <0x86>;
  545.  
  546. pin-sda {
  547. function = "alt5";
  548. pins = "gpio12";
  549. bias-pull-up;
  550. };
  551.  
  552. pin-scl {
  553. function = "alt5";
  554. pins = "gpio13";
  555. bias-disable;
  556. };
  557. };
  558.  
  559. i2c6-gpio0 {
  560. phandle = <0x87>;
  561.  
  562. pin-sda {
  563. function = "alt5";
  564. pins = "gpio0";
  565. bias-pull-up;
  566. };
  567.  
  568. pin-scl {
  569. function = "alt5";
  570. pins = "gpio1";
  571. bias-disable;
  572. };
  573. };
  574.  
  575. i2c6-gpio22 {
  576. phandle = <0x88>;
  577.  
  578. pin-sda {
  579. function = "alt5";
  580. pins = "gpio22";
  581. bias-pull-up;
  582. };
  583.  
  584. pin-scl {
  585. function = "alt5";
  586. pins = "gpio23";
  587. bias-disable;
  588. };
  589. };
  590.  
  591. i2c-slave-gpio8 {
  592. phandle = <0x89>;
  593.  
  594. pins-i2c-slave {
  595. pins = "gpio8\0gpio9\0gpio10\0gpio11";
  596. function = "alt3";
  597. };
  598. };
  599.  
  600. jtag-gpio48 {
  601. phandle = <0x8a>;
  602.  
  603. pins-jtag {
  604. pins = "gpio48\0gpio49\0gpio50\0gpio51\0gpio52\0gpio53";
  605. function = "alt4";
  606. };
  607. };
  608.  
  609. mii-gpio28 {
  610. phandle = <0x8b>;
  611.  
  612. pins-mii {
  613. pins = "gpio28\0gpio29\0gpio30\0gpio31";
  614. function = "alt4";
  615. };
  616. };
  617.  
  618. mii-gpio36 {
  619. phandle = <0x8c>;
  620.  
  621. pins-mii {
  622. pins = "gpio36\0gpio37\0gpio38\0gpio39";
  623. function = "alt5";
  624. };
  625. };
  626.  
  627. pcm-gpio50 {
  628. phandle = <0x8d>;
  629.  
  630. pins-pcm {
  631. pins = "gpio50\0gpio51\0gpio52\0gpio53";
  632. function = "alt2";
  633. };
  634. };
  635.  
  636. pwm0-0-gpio12 {
  637. phandle = <0x8e>;
  638.  
  639. pin-pwm {
  640. pins = "gpio12";
  641. function = "alt0";
  642. bias-disable;
  643. };
  644. };
  645.  
  646. pwm0-0-gpio18 {
  647. phandle = <0x8f>;
  648.  
  649. pin-pwm {
  650. pins = "gpio18";
  651. function = "alt5";
  652. bias-disable;
  653. };
  654. };
  655.  
  656. pwm1-0-gpio40 {
  657. phandle = <0x25>;
  658.  
  659. pin-pwm {
  660. pins = "gpio40";
  661. function = "alt0";
  662. bias-disable;
  663. };
  664. };
  665.  
  666. pwm0-1-gpio13 {
  667. phandle = <0x90>;
  668.  
  669. pin-pwm {
  670. pins = "gpio13";
  671. function = "alt0";
  672. bias-disable;
  673. };
  674. };
  675.  
  676. pwm0-1-gpio19 {
  677. phandle = <0x91>;
  678.  
  679. pin-pwm {
  680. pins = "gpio19";
  681. function = "alt5";
  682. bias-disable;
  683. };
  684. };
  685.  
  686. pwm1-1-gpio41 {
  687. phandle = <0x26>;
  688.  
  689. pin-pwm {
  690. pins = "gpio41";
  691. function = "alt0";
  692. bias-disable;
  693. };
  694. };
  695.  
  696. pwm0-1-gpio45 {
  697. phandle = <0x92>;
  698.  
  699. pin-pwm {
  700. pins = "gpio45";
  701. function = "alt0";
  702. bias-disable;
  703. };
  704. };
  705.  
  706. pwm0-0-gpio52 {
  707. phandle = <0x93>;
  708.  
  709. pin-pwm {
  710. pins = "gpio52";
  711. function = "alt1";
  712. bias-disable;
  713. };
  714. };
  715.  
  716. pwm0-1-gpio53 {
  717. phandle = <0x94>;
  718.  
  719. pin-pwm {
  720. pins = "gpio53";
  721. function = "alt1";
  722. bias-disable;
  723. };
  724. };
  725.  
  726. rgmii-gpio35 {
  727. phandle = <0x95>;
  728.  
  729. pin-start-stop {
  730. pins = "gpio35";
  731. function = "alt4";
  732. };
  733.  
  734. pin-rx-ok {
  735. pins = "gpio36";
  736. function = "alt4";
  737. };
  738. };
  739.  
  740. rgmii-irq-gpio34 {
  741. phandle = <0x96>;
  742.  
  743. pin-irq {
  744. pins = "gpio34";
  745. function = "alt5";
  746. };
  747. };
  748.  
  749. rgmii-irq-gpio39 {
  750. phandle = <0x97>;
  751.  
  752. pin-irq {
  753. pins = "gpio39";
  754. function = "alt4";
  755. };
  756. };
  757.  
  758. rgmii-mdio-gpio28 {
  759. phandle = <0x98>;
  760.  
  761. pins-mdio {
  762. pins = "gpio28\0gpio29";
  763. function = "alt5";
  764. };
  765. };
  766.  
  767. rgmii-mdio-gpio37 {
  768. phandle = <0x99>;
  769.  
  770. pins-mdio {
  771. pins = "gpio37\0gpio38";
  772. function = "alt4";
  773. };
  774. };
  775.  
  776. spi0-gpio46 {
  777. phandle = <0x9a>;
  778.  
  779. pins-spi {
  780. pins = "gpio46\0gpio47\0gpio48\0gpio49";
  781. function = "alt2";
  782. };
  783. };
  784.  
  785. spi2-gpio46 {
  786. phandle = <0x9b>;
  787.  
  788. pins-spi {
  789. pins = "gpio46\0gpio47\0gpio48\0gpio49\0gpio50";
  790. function = "alt5";
  791. };
  792. };
  793.  
  794. spi3-gpio0 {
  795. phandle = <0x9c>;
  796.  
  797. pins-spi {
  798. pins = "gpio0\0gpio1\0gpio2\0gpio3";
  799. function = "alt3";
  800. };
  801. };
  802.  
  803. spi4-gpio4 {
  804. phandle = <0x9d>;
  805.  
  806. pins-spi {
  807. pins = "gpio4\0gpio5\0gpio6\0gpio7";
  808. function = "alt3";
  809. };
  810. };
  811.  
  812. spi5-gpio12 {
  813. phandle = <0x9e>;
  814.  
  815. pins-spi {
  816. pins = "gpio12\0gpio13\0gpio14\0gpio15";
  817. function = "alt3";
  818. };
  819. };
  820.  
  821. spi6-gpio18 {
  822. phandle = <0x9f>;
  823.  
  824. pins-spi {
  825. pins = "gpio18\0gpio19\0gpio20\0gpio21";
  826. function = "alt3";
  827. };
  828. };
  829.  
  830. uart2-gpio0 {
  831. phandle = <0xa0>;
  832.  
  833. pin-tx {
  834. pins = "gpio0";
  835. function = "alt4";
  836. bias-disable;
  837. };
  838.  
  839. pin-rx {
  840. pins = "gpio1";
  841. function = "alt4";
  842. bias-pull-up;
  843. };
  844. };
  845.  
  846. uart2-ctsrts-gpio2 {
  847. phandle = <0xa1>;
  848.  
  849. pin-cts {
  850. pins = "gpio2";
  851. function = "alt4";
  852. bias-pull-up;
  853. };
  854.  
  855. pin-rts {
  856. pins = "gpio3";
  857. function = "alt4";
  858. bias-disable;
  859. };
  860. };
  861.  
  862. uart3-gpio4 {
  863. phandle = <0xa2>;
  864.  
  865. pin-tx {
  866. pins = "gpio4";
  867. function = "alt4";
  868. bias-disable;
  869. };
  870.  
  871. pin-rx {
  872. pins = "gpio5";
  873. function = "alt4";
  874. bias-pull-up;
  875. };
  876. };
  877.  
  878. uart3-ctsrts-gpio6 {
  879. phandle = <0xa3>;
  880.  
  881. pin-cts {
  882. pins = "gpio6";
  883. function = "alt4";
  884. bias-pull-up;
  885. };
  886.  
  887. pin-rts {
  888. pins = "gpio7";
  889. function = "alt4";
  890. bias-disable;
  891. };
  892. };
  893.  
  894. uart4-gpio8 {
  895. phandle = <0xa4>;
  896.  
  897. pin-tx {
  898. pins = "gpio8";
  899. function = "alt4";
  900. bias-disable;
  901. };
  902.  
  903. pin-rx {
  904. pins = "gpio9";
  905. function = "alt4";
  906. bias-pull-up;
  907. };
  908. };
  909.  
  910. uart4-ctsrts-gpio10 {
  911. phandle = <0xa5>;
  912.  
  913. pin-cts {
  914. pins = "gpio10";
  915. function = "alt4";
  916. bias-pull-up;
  917. };
  918.  
  919. pin-rts {
  920. pins = "gpio11";
  921. function = "alt4";
  922. bias-disable;
  923. };
  924. };
  925.  
  926. uart5-gpio12 {
  927. phandle = <0xa6>;
  928.  
  929. pin-tx {
  930. pins = "gpio12";
  931. function = "alt4";
  932. bias-disable;
  933. };
  934.  
  935. pin-rx {
  936. pins = "gpio13";
  937. function = "alt4";
  938. bias-pull-up;
  939. };
  940. };
  941.  
  942. uart5-ctsrts-gpio14 {
  943. phandle = <0xa7>;
  944.  
  945. pin-cts {
  946. pins = "gpio14";
  947. function = "alt4";
  948. bias-pull-up;
  949. };
  950.  
  951. pin-rts {
  952. pins = "gpio15";
  953. function = "alt4";
  954. bias-disable;
  955. };
  956. };
  957.  
  958. dpi_18bit_cpadhi_gpio0 {
  959. brcm,pins = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x14 0x15 0x16 0x17 0x18 0x19>;
  960. brcm,function = <0x06>;
  961. brcm,pull = <0x00>;
  962. phandle = <0xa8>;
  963. };
  964.  
  965. dpi_18bit_cpadhi_gpio2 {
  966. brcm,pins = <0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x14 0x15 0x16 0x17 0x18 0x19>;
  967. brcm,function = <0x06>;
  968. phandle = <0xa9>;
  969. };
  970.  
  971. dpi_18bit_gpio0 {
  972. brcm,pins = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15>;
  973. brcm,function = <0x06>;
  974. phandle = <0xaa>;
  975. };
  976.  
  977. dpi_18bit_gpio2 {
  978. brcm,pins = <0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15>;
  979. brcm,function = <0x06>;
  980. phandle = <0xab>;
  981. };
  982.  
  983. dpi_16bit_gpio0 {
  984. brcm,pins = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13>;
  985. brcm,function = <0x06>;
  986. phandle = <0xac>;
  987. };
  988.  
  989. dpi_16bit_gpio2 {
  990. brcm,pins = <0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13>;
  991. brcm,function = <0x06>;
  992. phandle = <0xad>;
  993. };
  994.  
  995. dpi_16bit_cpadhi_gpio0 {
  996. brcm,pins = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x14 0x15 0x16 0x17 0x18>;
  997. brcm,function = <0x06>;
  998. phandle = <0xae>;
  999. };
  1000.  
  1001. dpi_16bit_cpadhi_gpio2 {
  1002. brcm,pins = <0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x14 0x15 0x16 0x17 0x18>;
  1003. brcm,function = <0x06>;
  1004. phandle = <0xaf>;
  1005. };
  1006.  
  1007. gpioout {
  1008. brcm,pins = <0x06>;
  1009. brcm,function = <0x01>;
  1010. phandle = <0xb0>;
  1011. };
  1012.  
  1013. alt0 {
  1014. brcm,pins = <0x04 0x05 0x07 0x08 0x09 0x0a 0x0b>;
  1015. brcm,function = <0x04>;
  1016. phandle = <0xb1>;
  1017. };
  1018.  
  1019. spi0_pins {
  1020. brcm,pins = <0x09 0x0a 0x0b>;
  1021. brcm,function = <0x04>;
  1022. phandle = <0x0c>;
  1023. };
  1024.  
  1025. spi0_cs_pins {
  1026. brcm,pins = <0x08 0x07>;
  1027. brcm,function = <0x01>;
  1028. phandle = <0x0d>;
  1029. };
  1030.  
  1031. spi3_pins {
  1032. brcm,pins = <0x01 0x02 0x03>;
  1033. brcm,function = <0x07>;
  1034. phandle = <0x19>;
  1035. };
  1036.  
  1037. spi3_cs_pins {
  1038. brcm,pins = <0x00 0x18>;
  1039. brcm,function = <0x01>;
  1040. phandle = <0x1a>;
  1041. };
  1042.  
  1043. spi4_pins {
  1044. brcm,pins = <0x05 0x06 0x07>;
  1045. brcm,function = <0x07>;
  1046. phandle = <0x1b>;
  1047. };
  1048.  
  1049. spi4_cs_pins {
  1050. brcm,pins = <0x04 0x19>;
  1051. brcm,function = <0x01>;
  1052. phandle = <0x1c>;
  1053. };
  1054.  
  1055. spi5_pins {
  1056. brcm,pins = <0x0d 0x0e 0x0f>;
  1057. brcm,function = <0x07>;
  1058. phandle = <0x1d>;
  1059. };
  1060.  
  1061. spi5_cs_pins {
  1062. brcm,pins = <0x0c 0x1a>;
  1063. brcm,function = <0x01>;
  1064. phandle = <0x1e>;
  1065. };
  1066.  
  1067. spi6_pins {
  1068. brcm,pins = <0x13 0x14 0x15>;
  1069. brcm,function = <0x07>;
  1070. phandle = <0x1f>;
  1071. };
  1072.  
  1073. spi6_cs_pins {
  1074. brcm,pins = <0x12 0x1b>;
  1075. brcm,function = <0x01>;
  1076. phandle = <0x20>;
  1077. };
  1078.  
  1079. i2c0 {
  1080. brcm,pins = <0x00 0x01>;
  1081. brcm,function = <0x04>;
  1082. brcm,pull = <0x02>;
  1083. phandle = <0xb2>;
  1084. };
  1085.  
  1086. i2c1 {
  1087. brcm,pins = <0x02 0x03>;
  1088. brcm,function = <0x04>;
  1089. brcm,pull = <0x02>;
  1090. phandle = <0x12>;
  1091. };
  1092.  
  1093. i2c3 {
  1094. brcm,pins = <0x04 0x05>;
  1095. brcm,function = <0x02>;
  1096. brcm,pull = <0x02>;
  1097. phandle = <0x21>;
  1098. };
  1099.  
  1100. i2c4 {
  1101. brcm,pins = <0x08 0x09>;
  1102. brcm,function = <0x02>;
  1103. brcm,pull = <0x02>;
  1104. phandle = <0x22>;
  1105. };
  1106.  
  1107. i2c5 {
  1108. brcm,pins = <0x0c 0x0d>;
  1109. brcm,function = <0x02>;
  1110. brcm,pull = <0x02>;
  1111. phandle = <0x23>;
  1112. };
  1113.  
  1114. i2c6 {
  1115. brcm,pins = <0x16 0x17>;
  1116. brcm,function = <0x02>;
  1117. brcm,pull = <0x02>;
  1118. phandle = <0x24>;
  1119. };
  1120.  
  1121. i2s {
  1122. brcm,pins = <0x12 0x13 0x14 0x15>;
  1123. brcm,function = <0x04>;
  1124. phandle = <0x0b>;
  1125. };
  1126.  
  1127. sdio_pins {
  1128. brcm,pins = <0x22 0x23 0x24 0x25 0x26 0x27>;
  1129. brcm,function = <0x07>;
  1130. brcm,pull = <0x00 0x02 0x02 0x02 0x02 0x02>;
  1131. phandle = <0xb3>;
  1132. };
  1133.  
  1134. uart2_pins {
  1135. brcm,pins = <0x00 0x01>;
  1136. brcm,function = <0x03>;
  1137. brcm,pull = <0x00 0x02>;
  1138. phandle = <0x15>;
  1139. };
  1140.  
  1141. uart3_pins {
  1142. brcm,pins = <0x04 0x05>;
  1143. brcm,function = <0x03>;
  1144. brcm,pull = <0x00 0x02>;
  1145. phandle = <0x16>;
  1146. };
  1147.  
  1148. uart4_pins {
  1149. brcm,pins = <0x08 0x09>;
  1150. brcm,function = <0x03>;
  1151. brcm,pull = <0x00 0x02>;
  1152. phandle = <0x17>;
  1153. };
  1154.  
  1155. uart5_pins {
  1156. brcm,pins = <0x0c 0x0d>;
  1157. brcm,function = <0x03>;
  1158. brcm,pull = <0x00 0x02>;
  1159. phandle = <0x18>;
  1160. };
  1161.  
  1162. uart0_pins {
  1163. brcm,pins;
  1164. brcm,function;
  1165. brcm,pull;
  1166. phandle = <0x09>;
  1167. };
  1168.  
  1169. audio_pins {
  1170. brcm,pins;
  1171. brcm,function;
  1172. phandle = <0x32>;
  1173. };
  1174. };
  1175.  
  1176. serial@7e201000 {
  1177. compatible = "arm,pl011\0arm,primecell";
  1178. reg = <0x7e201000 0x200>;
  1179. interrupts = <0x00 0x79 0x04>;
  1180. clocks = <0x08 0x13 0x08 0x14>;
  1181. clock-names = "uartclk\0apb_pclk";
  1182. arm,primecell-periphid = <0x241011>;
  1183. cts-event-workaround;
  1184. skip-init;
  1185. pinctrl-names = "default";
  1186. pinctrl-0 = <0x09>;
  1187. status = "okay";
  1188. phandle = <0x39>;
  1189. };
  1190.  
  1191. mmc@7e202000 {
  1192. compatible = "brcm,bcm2835-sdhost";
  1193. reg = <0x7e202000 0x100>;
  1194. interrupts = <0x00 0x78 0x04>;
  1195. clocks = <0x08 0x14>;
  1196. status = "disabled";
  1197. dmas = <0x0a 0x2000000d>;
  1198. dma-names = "rx-tx";
  1199. bus-width = <0x04>;
  1200. brcm,overclock-50 = <0x00>;
  1201. brcm,pio-limit = <0x01>;
  1202. firmware = <0x06>;
  1203. phandle = <0x41>;
  1204. };
  1205.  
  1206. i2s@7e203000 {
  1207. compatible = "brcm,bcm2835-i2s";
  1208. reg = <0x7e203000 0x24>;
  1209. clocks = <0x08 0x1f>;
  1210. status = "disabled";
  1211. #sound-dai-cells = <0x00>;
  1212. dmas = <0x0a 0x02 0x0a 0x03>;
  1213. dma-names = "tx\0rx";
  1214. pinctrl-names = "default";
  1215. pinctrl-0 = <0x0b>;
  1216. phandle = <0x3b>;
  1217. };
  1218.  
  1219. spi@7e204000 {
  1220. compatible = "brcm,bcm2835-spi";
  1221. reg = <0x7e204000 0x200>;
  1222. interrupts = <0x00 0x76 0x04>;
  1223. clocks = <0x08 0x14>;
  1224. #address-cells = <0x01>;
  1225. #size-cells = <0x00>;
  1226. status = "disabled";
  1227. dmas = <0x0a 0x06 0x0a 0x07>;
  1228. dma-names = "tx\0rx";
  1229. pinctrl-names = "default";
  1230. pinctrl-0 = <0x0c 0x0d>;
  1231. cs-gpios = <0x07 0x08 0x01 0x07 0x07 0x01>;
  1232. phandle = <0x3c>;
  1233.  
  1234. spidev@0 {
  1235. compatible = "spidev";
  1236. reg = <0x00>;
  1237. #address-cells = <0x01>;
  1238. #size-cells = <0x00>;
  1239. spi-max-frequency = <0x7735940>;
  1240. phandle = <0xb4>;
  1241. };
  1242.  
  1243. spidev@1 {
  1244. compatible = "spidev";
  1245. reg = <0x01>;
  1246. #address-cells = <0x01>;
  1247. #size-cells = <0x00>;
  1248. spi-max-frequency = <0x7735940>;
  1249. phandle = <0xb5>;
  1250. };
  1251. };
  1252.  
  1253. i2c@7e205000 {
  1254. compatible = "brcm,bcm2711-i2c\0brcm,bcm2835-i2c";
  1255. reg = <0x7e205000 0x200>;
  1256. interrupts = <0x00 0x75 0x04>;
  1257. clocks = <0x08 0x14>;
  1258. #address-cells = <0x01>;
  1259. #size-cells = <0x00>;
  1260. status = "disabled";
  1261. clock-frequency = <0x186a0>;
  1262. phandle = <0x2e>;
  1263. };
  1264.  
  1265. dpi@7e208000 {
  1266. compatible = "brcm,bcm2835-dpi";
  1267. reg = <0x7e208000 0x8c>;
  1268. clocks = <0x08 0x14 0x08 0x2c>;
  1269. clock-names = "core\0pixel";
  1270. status = "disabled";
  1271. phandle = <0xb6>;
  1272. };
  1273.  
  1274. dsi@7e209000 {
  1275. compatible = "brcm,bcm2835-dsi0";
  1276. reg = <0x7e209000 0x78>;
  1277. interrupts = <0x00 0x64 0x04>;
  1278. #address-cells = <0x01>;
  1279. #size-cells = <0x00>;
  1280. #clock-cells = <0x01>;
  1281. clocks = <0x08 0x22 0x08 0x2f 0x08 0x31>;
  1282. clock-names = "phy\0escape\0pixel";
  1283. clock-output-names = "dsi0_byte\0dsi0_ddr2\0dsi0_ddr";
  1284. status = "disabled";
  1285. power-domains = <0x0e 0x11>;
  1286. phandle = <0x04>;
  1287. };
  1288.  
  1289. aux@7e215000 {
  1290. compatible = "brcm,bcm2835-aux";
  1291. #clock-cells = <0x01>;
  1292. reg = <0x7e215000 0x08>;
  1293. clocks = <0x08 0x14>;
  1294. phandle = <0x0f>;
  1295. };
  1296.  
  1297. serial@7e215040 {
  1298. compatible = "brcm,bcm2835-aux-uart";
  1299. reg = <0x7e215040 0x40>;
  1300. interrupts = <0x00 0x5d 0x04>;
  1301. clocks = <0x0f 0x00>;
  1302. status = "disabled";
  1303. skip-init;
  1304. phandle = <0x3a>;
  1305. };
  1306.  
  1307. spi@7e215080 {
  1308. compatible = "brcm,bcm2835-aux-spi";
  1309. reg = <0x7e215080 0x40>;
  1310. interrupts = <0x00 0x5d 0x04>;
  1311. clocks = <0x0f 0x01>;
  1312. #address-cells = <0x01>;
  1313. #size-cells = <0x00>;
  1314. status = "disabled";
  1315. phandle = <0xb7>;
  1316. };
  1317.  
  1318. spi@7e2150c0 {
  1319. compatible = "brcm,bcm2835-aux-spi";
  1320. reg = <0x7e2150c0 0x40>;
  1321. interrupts = <0x00 0x5d 0x04>;
  1322. clocks = <0x0f 0x02>;
  1323. #address-cells = <0x01>;
  1324. #size-cells = <0x00>;
  1325. status = "disabled";
  1326. phandle = <0xb8>;
  1327. };
  1328.  
  1329. pwm@7e20c000 {
  1330. compatible = "brcm,bcm2835-pwm";
  1331. reg = <0x7e20c000 0x28>;
  1332. clocks = <0x08 0x1e>;
  1333. assigned-clocks = <0x08 0x1e>;
  1334. assigned-clock-rates = <0x2faf080>;
  1335. #pwm-cells = <0x03>;
  1336. status = "disabled";
  1337. phandle = <0xb9>;
  1338. };
  1339.  
  1340. mmc@7e300000 {
  1341. compatible = "brcm,bcm2835-mmc\0brcm,bcm2835-sdhci";
  1342. reg = <0x7e300000 0x100>;
  1343. interrupts = <0x00 0x7e 0x04>;
  1344. clocks = <0x08 0x1c>;
  1345. status = "disabled";
  1346. dmas = <0x0a 0x0b>;
  1347. dma-names = "rx-tx";
  1348. brcm,overclock-50 = <0x00>;
  1349. pinctrl-names = "default";
  1350. pinctrl-0 = <0x10>;
  1351. bus-width = <0x04>;
  1352. phandle = <0x42>;
  1353. };
  1354.  
  1355. hvs@7e400000 {
  1356. compatible = "brcm,bcm2711-hvs";
  1357. reg = <0x7e400000 0x8000>;
  1358. interrupts = <0x00 0x61 0x04>;
  1359. status = "disabled";
  1360. clocks = <0x11 0x04>;
  1361. phandle = <0xba>;
  1362. };
  1363.  
  1364. dsi@7e700000 {
  1365. compatible = "brcm,bcm2711-dsi1";
  1366. reg = <0x7e700000 0x8c>;
  1367. interrupts = <0x00 0x6c 0x04>;
  1368. #address-cells = <0x01>;
  1369. #size-cells = <0x00>;
  1370. #clock-cells = <0x01>;
  1371. clocks = <0x08 0x23 0x08 0x30 0x08 0x32>;
  1372. clock-names = "phy\0escape\0pixel";
  1373. clock-output-names = "dsi1_byte\0dsi1_ddr2\0dsi1_ddr";
  1374. status = "disabled";
  1375. power-domains = <0x0e 0x12>;
  1376. phandle = <0x05>;
  1377. };
  1378.  
  1379. i2c@7e804000 {
  1380. compatible = "brcm,bcm2711-i2c\0brcm,bcm2835-i2c";
  1381. reg = <0x7e804000 0x1000>;
  1382. interrupts = <0x00 0x75 0x04>;
  1383. clocks = <0x08 0x14>;
  1384. #address-cells = <0x01>;
  1385. #size-cells = <0x00>;
  1386. status = "disabled";
  1387. pinctrl-names = "default";
  1388. pinctrl-0 = <0x12>;
  1389. clock-frequency = <0x186a0>;
  1390. phandle = <0x3e>;
  1391. };
  1392.  
  1393. usb@7e980000 {
  1394. compatible = "brcm,bcm2835-usb";
  1395. reg = <0x7e980000 0x10000 0x7e00b200 0x200>;
  1396. interrupts = <0x00 0x49 0x04 0x00 0x28 0x04>;
  1397. #address-cells = <0x01>;
  1398. #size-cells = <0x00>;
  1399. clocks = <0x13>;
  1400. clock-names = "otg";
  1401. phys = <0x14>;
  1402. phy-names = "usb2-phy";
  1403. interrupt-names = "usb\0soft";
  1404. power-domains = <0x0e 0x06>;
  1405. status = "okay";
  1406. dr_mode = "otg";
  1407. g-np-tx-fifo-size = <0x20>;
  1408. g-rx-fifo-size = <0x22e>;
  1409. g-tx-fifo-size = <0x200 0x200 0x200 0x200 0x200 0x100 0x100>;
  1410. phandle = <0xbb>;
  1411. };
  1412.  
  1413. interrupt-controller@40000000 {
  1414. compatible = "brcm,bcm2836-l1-intc";
  1415. reg = <0x40000000 0x100>;
  1416. phandle = <0xbc>;
  1417. };
  1418.  
  1419. interrupt-controller@40041000 {
  1420. interrupt-controller;
  1421. #interrupt-cells = <0x03>;
  1422. compatible = "arm,gic-400";
  1423. reg = <0x40041000 0x1000 0x40042000 0x2000 0x40044000 0x2000 0x40046000 0x2000>;
  1424. interrupts = <0x01 0x09 0xf04>;
  1425. phandle = <0x01>;
  1426. };
  1427.  
  1428. avs-monitor@7d5d2000 {
  1429. compatible = "brcm,bcm2711-avs-monitor\0syscon\0simple-mfd";
  1430. reg = <0x7d5d2000 0xf00>;
  1431. phandle = <0xbd>;
  1432.  
  1433. thermal {
  1434. compatible = "brcm,bcm2711-thermal";
  1435. #thermal-sensor-cells = <0x00>;
  1436. phandle = <0x02>;
  1437. };
  1438. };
  1439.  
  1440. dma-controller@7e007000 {
  1441. compatible = "brcm,bcm2835-dma";
  1442. reg = <0x7e007000 0xb00>;
  1443. interrupts = <0x00 0x50 0x04 0x00 0x51 0x04 0x00 0x52 0x04 0x00 0x53 0x04 0x00 0x54 0x04 0x00 0x55 0x04 0x00 0x56 0x04 0x00 0x57 0x04 0x00 0x57 0x04 0x00 0x58 0x04 0x00 0x58 0x04>;
  1444. interrupt-names = "dma0\0dma1\0dma2\0dma3\0dma4\0dma5\0dma6\0dma7\0dma8\0dma9\0dma10";
  1445. #dma-cells = <0x01>;
  1446. brcm,dma-channel-mask = <0x7f5>;
  1447. phandle = <0x0a>;
  1448. };
  1449.  
  1450. watchdog@7e100000 {
  1451. compatible = "brcm,bcm2711-pm\0brcm,bcm2835-pm-wdt";
  1452. #power-domain-cells = <0x01>;
  1453. #reset-cells = <0x01>;
  1454. reg = <0x7e100000 0x114 0x7e00a000 0x24 0x7ec11000 0x20>;
  1455. reg-names = "pm\0asb\0rpivid_asb";
  1456. clocks = <0x08 0x15 0x08 0x1d 0x08 0x17 0x08 0x16>;
  1457. clock-names = "v3d\0peri_image\0h264\0isp";
  1458. system-power-controller;
  1459. phandle = <0x3f>;
  1460. };
  1461.  
  1462. rng@7e104000 {
  1463. compatible = "brcm,bcm2711-rng200";
  1464. reg = <0x7e104000 0x28>;
  1465. status = "okay";
  1466. phandle = <0x40>;
  1467. };
  1468.  
  1469. serial@7e201400 {
  1470. compatible = "arm,pl011\0arm,primecell";
  1471. reg = <0x7e201400 0x200>;
  1472. interrupts = <0x00 0x79 0x04>;
  1473. clocks = <0x08 0x13 0x08 0x14>;
  1474. clock-names = "uartclk\0apb_pclk";
  1475. arm,primecell-periphid = <0x241011>;
  1476. status = "disabled";
  1477. pinctrl-0 = <0x15>;
  1478. pinctrl-names = "default";
  1479. phandle = <0xbe>;
  1480. };
  1481.  
  1482. serial@7e201600 {
  1483. compatible = "arm,pl011\0arm,primecell";
  1484. reg = <0x7e201600 0x200>;
  1485. interrupts = <0x00 0x79 0x04>;
  1486. clocks = <0x08 0x13 0x08 0x14>;
  1487. clock-names = "uartclk\0apb_pclk";
  1488. arm,primecell-periphid = <0x241011>;
  1489. status = "disabled";
  1490. pinctrl-0 = <0x16>;
  1491. pinctrl-names = "default";
  1492. phandle = <0xbf>;
  1493. };
  1494.  
  1495. serial@7e201800 {
  1496. compatible = "arm,pl011\0arm,primecell";
  1497. reg = <0x7e201800 0x200>;
  1498. interrupts = <0x00 0x79 0x04>;
  1499. clocks = <0x08 0x13 0x08 0x14>;
  1500. clock-names = "uartclk\0apb_pclk";
  1501. arm,primecell-periphid = <0x241011>;
  1502. status = "disabled";
  1503. pinctrl-0 = <0x17>;
  1504. pinctrl-names = "default";
  1505. phandle = <0xc0>;
  1506. };
  1507.  
  1508. serial@7e201a00 {
  1509. compatible = "arm,pl011\0arm,primecell";
  1510. reg = <0x7e201a00 0x200>;
  1511. interrupts = <0x00 0x79 0x04>;
  1512. clocks = <0x08 0x13 0x08 0x14>;
  1513. clock-names = "uartclk\0apb_pclk";
  1514. arm,primecell-periphid = <0x241011>;
  1515. status = "disabled";
  1516. pinctrl-0 = <0x18>;
  1517. pinctrl-names = "default";
  1518. phandle = <0xc1>;
  1519. };
  1520.  
  1521. spi@7e204600 {
  1522. compatible = "brcm,bcm2835-spi";
  1523. reg = <0x7e204600 0x200>;
  1524. interrupts = <0x00 0x76 0x04>;
  1525. clocks = <0x08 0x14>;
  1526. #address-cells = <0x01>;
  1527. #size-cells = <0x00>;
  1528. status = "disabled";
  1529. pinctrl-0 = <0x19 0x1a>;
  1530. pinctrl-names = "default";
  1531. phandle = <0xc2>;
  1532. };
  1533.  
  1534. spi@7e204800 {
  1535. compatible = "brcm,bcm2835-spi";
  1536. reg = <0x7e204800 0x200>;
  1537. interrupts = <0x00 0x76 0x04>;
  1538. clocks = <0x08 0x14>;
  1539. #address-cells = <0x01>;
  1540. #size-cells = <0x00>;
  1541. status = "disabled";
  1542. pinctrl-0 = <0x1b 0x1c>;
  1543. pinctrl-names = "default";
  1544. phandle = <0xc3>;
  1545. };
  1546.  
  1547. spi@7e204a00 {
  1548. compatible = "brcm,bcm2835-spi";
  1549. reg = <0x7e204a00 0x200>;
  1550. interrupts = <0x00 0x76 0x04>;
  1551. clocks = <0x08 0x14>;
  1552. #address-cells = <0x01>;
  1553. #size-cells = <0x00>;
  1554. status = "disabled";
  1555. pinctrl-0 = <0x1d 0x1e>;
  1556. pinctrl-names = "default";
  1557. phandle = <0xc4>;
  1558. };
  1559.  
  1560. spi@7e204c00 {
  1561. compatible = "brcm,bcm2835-spi";
  1562. reg = <0x7e204c00 0x200>;
  1563. interrupts = <0x00 0x76 0x04>;
  1564. clocks = <0x08 0x14>;
  1565. #address-cells = <0x01>;
  1566. #size-cells = <0x00>;
  1567. status = "disabled";
  1568. pinctrl-0 = <0x1f 0x20>;
  1569. pinctrl-names = "default";
  1570. phandle = <0xc5>;
  1571. };
  1572.  
  1573. i2c@7e205600 {
  1574. compatible = "brcm,bcm2711-i2c\0brcm,bcm2835-i2c";
  1575. reg = <0x7e205600 0x200>;
  1576. interrupts = <0x00 0x75 0x04>;
  1577. clocks = <0x08 0x14>;
  1578. #address-cells = <0x01>;
  1579. #size-cells = <0x00>;
  1580. status = "disabled";
  1581. pinctrl-0 = <0x21>;
  1582. pinctrl-names = "default";
  1583. phandle = <0xc6>;
  1584. };
  1585.  
  1586. i2c@7e205800 {
  1587. compatible = "brcm,bcm2711-i2c\0brcm,bcm2835-i2c";
  1588. reg = <0x7e205800 0x200>;
  1589. interrupts = <0x00 0x75 0x04>;
  1590. clocks = <0x08 0x14>;
  1591. #address-cells = <0x01>;
  1592. #size-cells = <0x00>;
  1593. status = "disabled";
  1594. pinctrl-0 = <0x22>;
  1595. pinctrl-names = "default";
  1596. phandle = <0xc7>;
  1597. };
  1598.  
  1599. i2c@7e205a00 {
  1600. compatible = "brcm,bcm2711-i2c\0brcm,bcm2835-i2c";
  1601. reg = <0x7e205a00 0x200>;
  1602. interrupts = <0x00 0x75 0x04>;
  1603. clocks = <0x08 0x14>;
  1604. #address-cells = <0x01>;
  1605. #size-cells = <0x00>;
  1606. status = "disabled";
  1607. pinctrl-0 = <0x23>;
  1608. pinctrl-names = "default";
  1609. phandle = <0xc8>;
  1610. };
  1611.  
  1612. i2c@7e205c00 {
  1613. compatible = "brcm,bcm2711-i2c\0brcm,bcm2835-i2c";
  1614. reg = <0x7e205c00 0x200>;
  1615. interrupts = <0x00 0x75 0x04>;
  1616. clocks = <0x08 0x14>;
  1617. #address-cells = <0x01>;
  1618. #size-cells = <0x00>;
  1619. status = "disabled";
  1620. pinctrl-0 = <0x24>;
  1621. pinctrl-names = "default";
  1622. phandle = <0xc9>;
  1623. };
  1624.  
  1625. pixelvalve@7e206000 {
  1626. compatible = "brcm,bcm2711-pixelvalve0";
  1627. reg = <0x7e206000 0x100>;
  1628. interrupts = <0x00 0x6d 0x04>;
  1629. status = "disabled";
  1630. phandle = <0xca>;
  1631. };
  1632.  
  1633. pixelvalve@7e207000 {
  1634. compatible = "brcm,bcm2711-pixelvalve1";
  1635. reg = <0x7e207000 0x100>;
  1636. interrupts = <0x00 0x6e 0x04>;
  1637. status = "disabled";
  1638. phandle = <0xcb>;
  1639. };
  1640.  
  1641. pixelvalve@7e20a000 {
  1642. compatible = "brcm,bcm2711-pixelvalve2";
  1643. reg = <0x7e20a000 0x100>;
  1644. interrupts = <0x00 0x65 0x04>;
  1645. status = "disabled";
  1646. phandle = <0xcc>;
  1647. };
  1648.  
  1649. pwm@7e20c800 {
  1650. compatible = "brcm,bcm2835-pwm";
  1651. reg = <0x7e20c800 0x28>;
  1652. clocks = <0x08 0x1e>;
  1653. assigned-clocks = <0x08 0x1e>;
  1654. assigned-clock-rates = <0x2faf080>;
  1655. #pwm-cells = <0x03>;
  1656. status = "disabled";
  1657. pinctrl-names = "default";
  1658. pinctrl-0 = <0x25 0x26>;
  1659. phandle = <0xcd>;
  1660. };
  1661.  
  1662. pixelvalve@7e216000 {
  1663. compatible = "brcm,bcm2711-pixelvalve4";
  1664. reg = <0x7e216000 0x100>;
  1665. interrupts = <0x00 0x6e 0x04>;
  1666. status = "disabled";
  1667. phandle = <0xce>;
  1668. };
  1669.  
  1670. pixelvalve@7ec12000 {
  1671. compatible = "brcm,bcm2711-pixelvalve3";
  1672. reg = <0x7ec12000 0x100>;
  1673. interrupts = <0x00 0x6a 0x04>;
  1674. status = "disabled";
  1675. phandle = <0xcf>;
  1676. };
  1677.  
  1678. vec@7ec13000 {
  1679. compatible = "brcm,bcm2711-vec";
  1680. reg = <0x7ec13000 0x1000>;
  1681. clocks = <0x11 0x0f>;
  1682. interrupts = <0x00 0x7b 0x04>;
  1683. status = "disabled";
  1684. power-domains = <0x0e 0x07>;
  1685. phandle = <0xd0>;
  1686. };
  1687.  
  1688. clock@7ef00000 {
  1689. compatible = "brcm,brcm2711-dvp";
  1690. reg = <0x7ef00000 0x10>;
  1691. clocks = <0x27>;
  1692. #clock-cells = <0x01>;
  1693. #reset-cells = <0x01>;
  1694. status = "disabled";
  1695. phandle = <0x28>;
  1696. };
  1697.  
  1698. interrupt-controller@7ef00100 {
  1699. compatible = "brcm,bcm2711-l2-intc\0brcm,l2-intc";
  1700. reg = <0x7ef00100 0x30>;
  1701. interrupts = <0x00 0x60 0x01>;
  1702. interrupt-controller;
  1703. #interrupt-cells = <0x01>;
  1704. status = "disabled";
  1705. phandle = <0x29>;
  1706. };
  1707.  
  1708. hdmi@7ef00700 {
  1709. compatible = "brcm,bcm2711-hdmi0";
  1710. reg = <0x7ef00700 0x300 0x7ef00300 0x200 0x7ef00f00 0x80 0x7ef00f80 0x80 0x7ef01b00 0x200 0x7ef01f00 0x400 0x7ef00200 0x80 0x7ef04300 0x100 0x7ef20000 0x100 0x7ef00100 0x30>;
  1711. reg-names = "hdmi\0dvp\0phy\0rm\0packet\0metadata\0csc\0cec\0hd\0intr2";
  1712. clock-names = "hdmi\0bvb\0audio\0cec";
  1713. resets = <0x28 0x00>;
  1714. interrupt-parent = <0x29>;
  1715. interrupts = <0x00 0x01 0x02 0x03 0x04 0x05>;
  1716. interrupt-names = "cec-tx\0cec-rx\0cec-low\0wakeup\0hpd-connected\0hpd-removed";
  1717. ddc = <0x2a>;
  1718. dmas = <0x2b 0x41fa000a>;
  1719. dma-names = "audio-rx";
  1720. status = "disabled";
  1721. clocks = <0x11 0x0d 0x11 0x0e 0x28 0x00 0x2c>;
  1722. wifi-2.4ghz-coexistence;
  1723. phandle = <0x49>;
  1724. };
  1725.  
  1726. i2c@7ef04500 {
  1727. compatible = "brcm,bcm2711-hdmi-i2c";
  1728. reg = <0x7ef04500 0x100 0x7ef00b00 0x300>;
  1729. reg-names = "bsc\0auto-i2c";
  1730. clock-frequency = <0x17cdc>;
  1731. status = "disabled";
  1732. phandle = <0x2a>;
  1733. };
  1734.  
  1735. hdmi@7ef05700 {
  1736. compatible = "disabled";
  1737. reg = <0x7ef05700 0x300 0x7ef05300 0x200 0x7ef05f00 0x80 0x7ef05f80 0x80 0x7ef06b00 0x200 0x7ef06f00 0x400 0x7ef00280 0x80 0x7ef09300 0x100 0x7ef20000 0x100 0x7ef00100 0x30>;
  1738. reg-names = "hdmi\0dvp\0phy\0rm\0packet\0metadata\0csc\0cec\0hd\0intr2";
  1739. ddc = <0x2d>;
  1740. clock-names = "hdmi\0bvb\0audio\0cec";
  1741. resets = <0x28 0x01>;
  1742. interrupt-parent = <0x29>;
  1743. interrupts = <0x08 0x07 0x06 0x09 0x0a 0x0b>;
  1744. interrupt-names = "cec-tx\0cec-rx\0cec-low\0wakeup\0hpd-connected\0hpd-removed";
  1745. dmas = <0x2b 0x41fa0011>;
  1746. dma-names = "audio-rx";
  1747. status = "disabled";
  1748. clocks = <0x11 0x0d 0x11 0x0e 0x28 0x01 0x2c>;
  1749. wifi-2.4ghz-coexistence;
  1750. phandle = <0x4a>;
  1751. };
  1752.  
  1753. i2c@7ef09500 {
  1754. compatible = "disabled";
  1755. reg = <0x7ef09500 0x100 0x7ef05b00 0x300>;
  1756. reg-names = "bsc\0auto-i2c";
  1757. clock-frequency = <0x17cdc>;
  1758. status = "disabled";
  1759. phandle = <0x2d>;
  1760. };
  1761.  
  1762. mmcnr@7e300000 {
  1763. compatible = "brcm,bcm2835-mmc\0brcm,bcm2835-sdhci";
  1764. reg = <0x7e300000 0x100>;
  1765. interrupts = <0x00 0x7e 0x04>;
  1766. clocks = <0x08 0x1c>;
  1767. dmas = <0x0a 0x0b>;
  1768. dma-names = "rx-tx";
  1769. brcm,overclock-50 = <0x00>;
  1770. non-removable;
  1771. status = "disabled";
  1772. phandle = <0x43>;
  1773. };
  1774.  
  1775. firmwarekms@7e600000 {
  1776. compatible = "raspberrypi,rpi-firmware-kms-2711";
  1777. reg = <0x7e600000 0x100>;
  1778. interrupts = <0x00 0x70 0x04>;
  1779. brcm,firmware = <0x06>;
  1780. status = "disabled";
  1781. phandle = <0xd1>;
  1782. };
  1783.  
  1784. smi@7e600000 {
  1785. compatible = "brcm,bcm2835-smi";
  1786. reg = <0x7e600000 0x100>;
  1787. interrupts = <0x00 0x70 0x04>;
  1788. clocks = <0x08 0x2a>;
  1789. assigned-clocks = <0x08 0x2a>;
  1790. assigned-clock-rates = <0x7735940>;
  1791. dmas = <0x0a 0x04>;
  1792. dma-names = "rx-tx";
  1793. status = "disabled";
  1794. phandle = <0xd2>;
  1795. };
  1796.  
  1797. csi@7e800000 {
  1798. compatible = "brcm,bcm2835-unicam";
  1799. reg = <0x7e800000 0x800 0x7e802000 0x04>;
  1800. interrupts = <0x00 0x66 0x04>;
  1801. clocks = <0x08 0x2d 0x11 0x04>;
  1802. clock-names = "lp\0vpu";
  1803. power-domains = <0x0e 0x0c>;
  1804. #address-cells = <0x01>;
  1805. #size-cells = <0x00>;
  1806. #clock-cells = <0x01>;
  1807. status = "disabled";
  1808. brcm,num-data-lanes = <0x02>;
  1809. phandle = <0x47>;
  1810. };
  1811.  
  1812. csi@7e801000 {
  1813. compatible = "brcm,bcm2835-unicam";
  1814. reg = <0x7e801000 0x800 0x7e802004 0x04>;
  1815. interrupts = <0x00 0x67 0x04>;
  1816. clocks = <0x08 0x2e 0x11 0x04>;
  1817. clock-names = "lp\0vpu";
  1818. power-domains = <0x0e 0x0d>;
  1819. #address-cells = <0x01>;
  1820. #size-cells = <0x00>;
  1821. #clock-cells = <0x01>;
  1822. status = "disabled";
  1823. brcm,num-data-lanes = <0x04>;
  1824. phandle = <0x46>;
  1825. };
  1826.  
  1827. axiperf {
  1828. compatible = "brcm,bcm2711-axiperf";
  1829. reg = <0x7e009800 0x100 0x7ee08000 0x100>;
  1830. firmware = <0x06>;
  1831. status = "disabled";
  1832. phandle = <0x44>;
  1833. };
  1834.  
  1835. i2c0mux {
  1836. compatible = "i2c-mux-pinctrl";
  1837. #address-cells = <0x01>;
  1838. #size-cells = <0x00>;
  1839. i2c-parent = <0x2e>;
  1840. status = "disabled";
  1841. pinctrl-names = "i2c0\0i2c_csi_dsi";
  1842. pinctrl-0 = <0x2f>;
  1843. pinctrl-1 = <0x30>;
  1844. phandle = <0x3d>;
  1845.  
  1846. i2c@0 {
  1847. reg = <0x00>;
  1848. #address-cells = <0x01>;
  1849. #size-cells = <0x00>;
  1850. phandle = <0xd3>;
  1851. };
  1852.  
  1853. i2c@1 {
  1854. reg = <0x01>;
  1855. #address-cells = <0x01>;
  1856. #size-cells = <0x00>;
  1857. phandle = <0xd4>;
  1858. };
  1859. };
  1860.  
  1861. firmware {
  1862. compatible = "raspberrypi,bcm2835-firmware\0simple-mfd";
  1863. #address-cells = <0x01>;
  1864. #size-cells = <0x01>;
  1865. mboxes = <0x31>;
  1866. dma-ranges;
  1867. phandle = <0x06>;
  1868.  
  1869. clocks {
  1870. compatible = "raspberrypi,firmware-clocks";
  1871. #clock-cells = <0x01>;
  1872. phandle = <0x11>;
  1873. };
  1874.  
  1875. gpio {
  1876. compatible = "raspberrypi,firmware-gpio";
  1877. gpio-controller;
  1878. #gpio-cells = <0x02>;
  1879. status = "okay";
  1880. phandle = <0xd5>;
  1881. };
  1882.  
  1883. reset {
  1884. compatible = "raspberrypi,firmware-reset";
  1885. #reset-cells = <0x01>;
  1886. phandle = <0xd6>;
  1887. };
  1888.  
  1889. vcio {
  1890. compatible = "raspberrypi,vcio";
  1891. phandle = <0xd7>;
  1892. };
  1893.  
  1894. virtgpio {
  1895. compatible = "brcm,bcm2835-virtgpio";
  1896. gpio-controller;
  1897. #gpio-cells = <0x02>;
  1898. status = "okay";
  1899. phandle = <0x51>;
  1900. };
  1901. };
  1902.  
  1903. power {
  1904. compatible = "raspberrypi,bcm2835-power";
  1905. firmware = <0x06>;
  1906. #power-domain-cells = <0x01>;
  1907. phandle = <0x0e>;
  1908. };
  1909.  
  1910. mailbox@7e00b840 {
  1911. compatible = "brcm,bcm2711-vchiq";
  1912. reg = <0x7e00b840 0x3c>;
  1913. interrupts = <0x00 0x22 0x04>;
  1914. pinctrl-names = "default";
  1915. pinctrl-0 = <0x32>;
  1916. phandle = <0xd8>;
  1917. };
  1918.  
  1919. gpiomem {
  1920. compatible = "brcm,bcm2835-gpiomem";
  1921. reg = <0x7e200000 0x1000>;
  1922. };
  1923.  
  1924. fb {
  1925. compatible = "brcm,bcm2708-fb";
  1926. firmware = <0x06>;
  1927. status = "okay";
  1928. phandle = <0xd9>;
  1929. };
  1930.  
  1931. sound {
  1932. status = "disabled";
  1933. phandle = <0xda>;
  1934. };
  1935.  
  1936. nvmem {
  1937. compatible = "simple-bus";
  1938. #address-cells = <0x01>;
  1939. #size-cells = <0x01>;
  1940.  
  1941. nvmem_otp {
  1942. compatible = "raspberrypi,rpi-otp";
  1943. firmware = <0x06>;
  1944. reg = <0x00 0xa6>;
  1945. status = "okay";
  1946. phandle = <0xdb>;
  1947. };
  1948.  
  1949. nvmem_cust {
  1950. compatible = "raspberrypi,rpi-otp";
  1951. firmware = <0x06>;
  1952. reg = <0x01 0x08>;
  1953. status = "okay";
  1954. phandle = <0x4b>;
  1955. };
  1956.  
  1957. nvmem_priv {
  1958. compatible = "raspberrypi,rpi-otp";
  1959. firmware = <0x06>;
  1960. reg = <0x03 0x08>;
  1961. status = "okay";
  1962. phandle = <0x4c>;
  1963. };
  1964. };
  1965. };
  1966.  
  1967. clocks {
  1968.  
  1969. clk-osc {
  1970. compatible = "fixed-clock";
  1971. #clock-cells = <0x00>;
  1972. clock-output-names = "osc";
  1973. clock-frequency = <0x337f980>;
  1974. phandle = <0x03>;
  1975. };
  1976.  
  1977. clk-usb {
  1978. compatible = "fixed-clock";
  1979. #clock-cells = <0x00>;
  1980. clock-output-names = "otg";
  1981. clock-frequency = <0x1c9c3800>;
  1982. phandle = <0x13>;
  1983. };
  1984. };
  1985.  
  1986. phy {
  1987. compatible = "usb-nop-xceiv";
  1988. #phy-cells = <0x00>;
  1989. phandle = <0x14>;
  1990. };
  1991.  
  1992. gpu {
  1993. compatible = "brcm,bcm2711-vc5";
  1994. status = "disabled";
  1995. raspberrypi,firmware = <0x06>;
  1996. phandle = <0xdc>;
  1997. };
  1998.  
  1999. clk-27M {
  2000. #clock-cells = <0x00>;
  2001. compatible = "fixed-clock";
  2002. clock-frequency = <0x19bfcc0>;
  2003. clock-output-names = "27MHz-clock";
  2004. phandle = <0x2c>;
  2005. };
  2006.  
  2007. clk-108M {
  2008. #clock-cells = <0x00>;
  2009. compatible = "fixed-clock";
  2010. clock-frequency = <0x66ff300>;
  2011. clock-output-names = "108MHz-clock";
  2012. phandle = <0x27>;
  2013. };
  2014.  
  2015. emmc2bus {
  2016. compatible = "simple-bus";
  2017. #address-cells = <0x02>;
  2018. #size-cells = <0x01>;
  2019. ranges = <0x00 0x7e000000 0x00 0xfe000000 0x1800000>;
  2020. dma-ranges = <0x00 0xc0000000 0x00 0x00 0x40000000>;
  2021. phandle = <0xdd>;
  2022.  
  2023. mmc@7e340000 {
  2024. compatible = "brcm,bcm2711-emmc2";
  2025. reg = <0x00 0x7e340000 0x100>;
  2026. interrupts = <0x00 0x7e 0x04>;
  2027. clocks = <0x08 0x33>;
  2028. status = "okay";
  2029. bus-width = <0x08>;
  2030. broken-cd;
  2031. mmc-ddr-3_3v;
  2032. phandle = <0x4d>;
  2033. };
  2034. };
  2035.  
  2036. arm-pmu {
  2037. compatible = "arm,cortex-a72-pmu\0arm,armv8-pmuv3\0arm,cortex-a7-pmu";
  2038. interrupts = <0x00 0x10 0x04 0x00 0x11 0x04 0x00 0x12 0x04 0x00 0x13 0x04>;
  2039. interrupt-affinity = <0x33 0x34 0x35 0x36>;
  2040. };
  2041.  
  2042. timer {
  2043. compatible = "arm,armv8-timer";
  2044. interrupts = <0x01 0x0d 0xf08 0x01 0x0e 0xf08 0x01 0x0b 0xf08 0x01 0x0a 0xf08>;
  2045. arm,cpu-registers-not-fw-configured;
  2046. };
  2047.  
  2048. cpus {
  2049. #address-cells = <0x01>;
  2050. #size-cells = <0x00>;
  2051. enable-method = "brcm,bcm2836-smp";
  2052. phandle = <0xde>;
  2053.  
  2054. cpu@0 {
  2055. device_type = "cpu";
  2056. compatible = "arm,cortex-a72";
  2057. reg = <0x00>;
  2058. enable-method = "spin-table";
  2059. cpu-release-addr = <0x00 0xd8>;
  2060. d-cache-size = <0x8000>;
  2061. d-cache-line-size = <0x40>;
  2062. d-cache-sets = <0x100>;
  2063. i-cache-size = <0xc000>;
  2064. i-cache-line-size = <0x40>;
  2065. i-cache-sets = <0x100>;
  2066. next-level-cache = <0x37>;
  2067. phandle = <0x33>;
  2068. };
  2069.  
  2070. cpu@1 {
  2071. device_type = "cpu";
  2072. compatible = "arm,cortex-a72";
  2073. reg = <0x01>;
  2074. enable-method = "spin-table";
  2075. cpu-release-addr = <0x00 0xe0>;
  2076. d-cache-size = <0x8000>;
  2077. d-cache-line-size = <0x40>;
  2078. d-cache-sets = <0x100>;
  2079. i-cache-size = <0xc000>;
  2080. i-cache-line-size = <0x40>;
  2081. i-cache-sets = <0x100>;
  2082. next-level-cache = <0x37>;
  2083. phandle = <0x34>;
  2084. };
  2085.  
  2086. cpu@2 {
  2087. device_type = "cpu";
  2088. compatible = "arm,cortex-a72";
  2089. reg = <0x02>;
  2090. enable-method = "spin-table";
  2091. cpu-release-addr = <0x00 0xe8>;
  2092. d-cache-size = <0x8000>;
  2093. d-cache-line-size = <0x40>;
  2094. d-cache-sets = <0x100>;
  2095. i-cache-size = <0xc000>;
  2096. i-cache-line-size = <0x40>;
  2097. i-cache-sets = <0x100>;
  2098. next-level-cache = <0x37>;
  2099. phandle = <0x35>;
  2100. };
  2101.  
  2102. cpu@3 {
  2103. device_type = "cpu";
  2104. compatible = "arm,cortex-a72";
  2105. reg = <0x03>;
  2106. enable-method = "spin-table";
  2107. cpu-release-addr = <0x00 0xf0>;
  2108. d-cache-size = <0x8000>;
  2109. d-cache-line-size = <0x40>;
  2110. d-cache-sets = <0x100>;
  2111. i-cache-size = <0xc000>;
  2112. i-cache-line-size = <0x40>;
  2113. i-cache-sets = <0x100>;
  2114. next-level-cache = <0x37>;
  2115. phandle = <0x36>;
  2116. };
  2117.  
  2118. l2-cache0 {
  2119. compatible = "cache";
  2120. cache-unified;
  2121. cache-size = <0x100000>;
  2122. cache-line-size = <0x40>;
  2123. cache-sets = <0x400>;
  2124. cache-level = <0x02>;
  2125. phandle = <0x37>;
  2126. };
  2127. };
  2128.  
  2129. scb {
  2130. compatible = "simple-bus";
  2131. #address-cells = <0x02>;
  2132. #size-cells = <0x02>;
  2133. ranges = <0x00 0x7c000000 0x00 0xfc000000 0x00 0x3800000 0x00 0x40000000 0x00 0xff800000 0x00 0x800000 0x06 0x00 0x06 0x00 0x00 0x40000000 0x00 0x00 0x00 0x00 0x00 0xfc000000>;
  2134. dma-ranges = <0x04 0x7c000000 0x00 0xfc000000 0x00 0x3800000 0x00 0x00 0x00 0x00 0x04 0x00>;
  2135. phandle = <0xdf>;
  2136.  
  2137. pcie@7d500000 {
  2138. compatible = "brcm,bcm2711-pcie";
  2139. reg = <0x00 0x7d500000 0x00 0x9310>;
  2140. device_type = "pci";
  2141. #address-cells = <0x03>;
  2142. #interrupt-cells = <0x01>;
  2143. #size-cells = <0x02>;
  2144. interrupts = <0x00 0x93 0x04 0x00 0x94 0x04>;
  2145. interrupt-names = "pcie\0msi";
  2146. interrupt-map-mask = <0x00 0x00 0x00 0x07>;
  2147. interrupt-map = <0x00 0x00 0x00 0x01 0x01 0x00 0x8f 0x04 0x00 0x00 0x00 0x02 0x01 0x00 0x90 0x04 0x00 0x00 0x00 0x03 0x01 0x00 0x91 0x04 0x00 0x00 0x00 0x04 0x01 0x00 0x92 0x04>;
  2148. msi-controller;
  2149. msi-parent = <0x38>;
  2150. ranges = <0x2000000 0x00 0xc0000000 0x06 0x00 0x00 0x40000000>;
  2151. dma-ranges = <0x2000000 0x00 0x00 0x00 0x00 0x00 0xc0000000>;
  2152. brcm,enable-ssc;
  2153. status = "disabled";
  2154. phandle = <0x38>;
  2155. };
  2156.  
  2157. ethernet@7d580000 {
  2158. compatible = "brcm,bcm2711-genet-v5";
  2159. reg = <0x00 0x7d580000 0x00 0x10000>;
  2160. #address-cells = <0x01>;
  2161. #size-cells = <0x01>;
  2162. interrupts = <0x00 0x9d 0x04 0x00 0x9e 0x04>;
  2163. status = "disabled";
  2164. phandle = <0xe0>;
  2165.  
  2166. mdio@e14 {
  2167. compatible = "brcm,genet-mdio-v5";
  2168. reg = <0xe14 0x08>;
  2169. reg-names = "mdio";
  2170. #address-cells = <0x01>;
  2171. #size-cells = <0x00>;
  2172. phandle = <0xe1>;
  2173. };
  2174. };
  2175.  
  2176. dma@7e007b00 {
  2177. compatible = "brcm,bcm2711-dma";
  2178. reg = <0x00 0x7e007b00 0x00 0x400>;
  2179. interrupts = <0x00 0x59 0x04 0x00 0x5a 0x04 0x00 0x5b 0x04 0x00 0x5c 0x04>;
  2180. interrupt-names = "dma11\0dma12\0dma13\0dma14";
  2181. #dma-cells = <0x01>;
  2182. brcm,dma-channel-mask = <0x7000>;
  2183. phandle = <0x2b>;
  2184. };
  2185.  
  2186. xhci@7e9c0000 {
  2187. compatible = "generic-xhci";
  2188. status = "disabled";
  2189. reg = <0x00 0x7e9c0000 0x00 0x100000>;
  2190. interrupts = <0x00 0xb0 0x04>;
  2191. power-domains = <0x0e 0x06>;
  2192. phandle = <0xe2>;
  2193. };
  2194.  
  2195. codec@7eb10000 {
  2196. compatible = "raspberrypi,rpivid-vid-decoder";
  2197. reg = <0x00 0x7eb10000 0x00 0x1000 0x00 0x7eb00000 0x00 0x10000>;
  2198. reg-names = "intc\0hevc";
  2199. interrupts = <0x00 0x62 0x04>;
  2200. clocks = <0x11 0x0b>;
  2201. clock-names = "hevc";
  2202. };
  2203. };
  2204.  
  2205. cam1_regulator {
  2206. compatible = "regulator-fixed";
  2207. regulator-name = "cam1-reg";
  2208. enable-active-high;
  2209. status = "disabled";
  2210. gpio = <0x07 0x03 0x00>;
  2211. phandle = <0x50>;
  2212. };
  2213.  
  2214. cam1_clk {
  2215. compatible = "fixed-clock";
  2216. #clock-cells = <0x00>;
  2217. status = "disabled";
  2218. phandle = <0xe3>;
  2219. };
  2220.  
  2221. cam0_regulator {
  2222. compatible = "regulator-fixed";
  2223. regulator-name = "cam0-reg";
  2224. enable-active-high;
  2225. status = "disabled";
  2226. gpio = <0x07 0x1f 0x00>;
  2227. phandle = <0x4f>;
  2228. };
  2229.  
  2230. cam0_clk {
  2231. compatible = "fixed-clock";
  2232. #clock-cells = <0x00>;
  2233. status = "disabled";
  2234. phandle = <0xe4>;
  2235. };
  2236.  
  2237. cam_dummy_reg {
  2238. compatible = "regulator-fixed";
  2239. regulator-name = "cam-dummy-reg";
  2240. status = "okay";
  2241. phandle = <0xe5>;
  2242. };
  2243.  
  2244. __overrides__ {
  2245. cam0-pwdn-ctrl;
  2246. cam0-pwdn;
  2247. cam0-led-ctrl;
  2248. cam0-led;
  2249. cache_line_size;
  2250. uart0 = "\0\0\09status";
  2251. uart1 = "\0\0\0:status";
  2252. i2s = "\0\0\0;status";
  2253. spi = "\0\0\0<status";
  2254. i2c0 = "\0\0\0.status\0\0\0\0=status";
  2255. i2c1 = "\0\0\0>status";
  2256. i2c = "\0\0\0>status";
  2257. i2c_arm = "\0\0\0>status";
  2258. i2c_vc = "\0\0\0.status\0\0\0\0=status";
  2259. i2c0_baudrate = "\0\0\0.clock-frequency:0";
  2260. i2c1_baudrate = "\0\0\0>clock-frequency:0";
  2261. i2c_baudrate = "\0\0\0>clock-frequency:0";
  2262. i2c_arm_baudrate = "\0\0\0>clock-frequency:0";
  2263. i2c_vc_baudrate = "\0\0\0.clock-frequency:0";
  2264. watchdog = "\0\0\0?status";
  2265. random = "\0\0\0@status";
  2266. sd_overclock = "\0\0\0Abrcm,overclock-50:0";
  2267. sd_force_pio = "\0\0\0Abrcm,force-pio?";
  2268. sd_pio_limit = "\0\0\0Abrcm,pio-limit:0";
  2269. sd_debug = "\0\0\0Abrcm,debug";
  2270. sdio_overclock = "\0\0\0Bbrcm,overclock-50:0\0\0\0\0Cbrcm,overclock-50:0";
  2271. axiperf = "\0\0\0Dstatus";
  2272. drm_fb0_vc4 = "\0\0\0Edrm-fb0=\0/gpu";
  2273. drm_fb1_vc4 = "\0\0\0Edrm-fb1=\0/gpu";
  2274. drm_fb2_vc4 = "\0\0\0Edrm-fb2=\0/gpu";
  2275. cam1_sync = "\0\0\0Fsync-gpios:0=\0\0\0\0\a\0\0\0Fsync-gpios:4\0\0\0\0Fsync-gpios:8=\0\0\0\0";
  2276. cam1_sync_inverted = [00 00 00 46 73 79 6e 63 2d 67 70 69 6f 73 3a 30 3d 00 00 00 00 07 00 00 00 46 73 79 6e 63 2d 67 70 69 6f 73 3a 34 00 00 00 00 46 73 79 6e 63 2d 67 70 69 6f 73 3a 38 3d 00 00 00 00 01];
  2277. cam0_sync = "\0\0\0Gsync-gpios:0=\0\0\0\0\a\0\0\0Gsync-gpios:4\0\0\0\0Gsync-gpios:8=\0\0\0\0";
  2278. cam0_sync_inverted = [00 00 00 47 73 79 6e 63 2d 67 70 69 6f 73 3a 30 3d 00 00 00 00 07 00 00 00 47 73 79 6e 63 2d 67 70 69 6f 73 3a 34 00 00 00 00 47 73 79 6e 63 2d 67 70 69 6f 73 3a 38 3d 00 00 00 00 01];
  2279. strict_gpiod = "\0\0\0Hbootargs=pinctrl_bcm2835.persist_gpio_outputs=n";
  2280. arm_freq;
  2281. eee = "\0\0\0Hbootargs{on='',off='genet.eee=N'}";
  2282. hdmi = "\0\0\0Istatus\0\0\0\0Jstatus";
  2283. nvmem_cust_rw = "\0\0\0Krw?";
  2284. nvmem_priv_rw = "\0\0\0Lrw?";
  2285. pcie = "\0\0\08status";
  2286. sd = "\0\0\0Mstatus";
  2287. sd_poll_once = "\0\0\0Mnon-removable?";
  2288. spi_dma4 = <0x3c 0x646d6173 0x3a303d00 0x2b 0x3c 0x646d6173 0x3a383d00 0x2b>;
  2289. i2s_dma4 = <0x3b 0x646d6173 0x3a303d00 0x2b 0x3b 0x646d6173 0x3a383d00 0x2b>;
  2290. audio = "\0\0\0Hbootargs{on='snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_hdmi=0'}";
  2291. act_led_gpio = "\0\0\0Ngpios:4";
  2292. act_led_activelow = "\0\0\0Ngpios:8";
  2293. act_led_trigger = "\0\0\0Nlinux,default-trigger";
  2294. cam0_reg = "\0\0\0Ostatus";
  2295. cam0_reg_gpio = "\0\0\0Ogpio:4";
  2296. cam1_reg = "\0\0\0Pstatus";
  2297. cam1_reg_gpio = "\0\0\0Pgpio:4";
  2298. };
  2299.  
  2300. memory@0 {
  2301. device_type = "memory";
  2302. reg = <0x00 0x00 0x00>;
  2303. };
  2304.  
  2305. leds {
  2306. compatible = "gpio-leds";
  2307. phandle = <0xe6>;
  2308.  
  2309. led-act {
  2310. label = "ACT";
  2311. default-state = "off";
  2312. linux,default-trigger = "mmc0";
  2313. gpios = <0x51 0x00 0x00>;
  2314. phandle = <0x4e>;
  2315. };
  2316. };
  2317.  
  2318. fixedregulator_3v3 {
  2319. compatible = "regulator-fixed";
  2320. regulator-always-on;
  2321. regulator-max-microvolt = <0x325aa0>;
  2322. regulator-min-microvolt = <0x325aa0>;
  2323. regulator-name = "3v3";
  2324. phandle = <0xe7>;
  2325. };
  2326.  
  2327. fixedregulator_5v0 {
  2328. compatible = "regulator-fixed";
  2329. regulator-always-on;
  2330. regulator-max-microvolt = <0x4c4b40>;
  2331. regulator-min-microvolt = <0x4c4b40>;
  2332. regulator-name = "5v0";
  2333. phandle = <0xe8>;
  2334. };
  2335.  
  2336. zone_dma {
  2337. #address-cells = <0x01>;
  2338. #size-cells = <0x01>;
  2339. dma-ranges = <0x00 0x00 0x00 0x40000000>;
  2340. };
  2341.  
  2342. v3dbus {
  2343. compatible = "simple-bus";
  2344. #address-cells = <0x01>;
  2345. #size-cells = <0x02>;
  2346. ranges = <0x7c500000 0x00 0xfc500000 0x00 0x3300000 0x40000000 0x00 0xff800000 0x00 0x800000>;
  2347. dma-ranges = <0x00 0x00 0x00 0x04 0x00>;
  2348. phandle = <0xe9>;
  2349.  
  2350. v3d@7ec04000 {
  2351. compatible = "brcm,2711-v3d";
  2352. reg = <0x7ec00000 0x00 0x4000 0x7ec04000 0x00 0x4000>;
  2353. reg-names = "hub\0core0";
  2354. power-domains = <0x3f 0x01>;
  2355. resets = <0x3f 0x00>;
  2356. clocks = <0x11 0x05>;
  2357. clocks-names = "v3d";
  2358. interrupts = <0x00 0x4a 0x04>;
  2359. status = "disabled";
  2360. phandle = <0xea>;
  2361. };
  2362. };
  2363.  
  2364. __symbols__ {
  2365. aliases = "/aliases";
  2366. chosen = "/chosen";
  2367. rmem = "/reserved-memory";
  2368. cma = "/reserved-memory/linux,cma";
  2369. blconfig = "/reserved-memory/nvram@0";
  2370. blpubkey = "/reserved-memory/nvram@1";
  2371. cpu_thermal = "/thermal-zones/cpu-thermal";
  2372. thermal_trips = "/thermal-zones/cpu-thermal/trips";
  2373. cooling_maps = "/thermal-zones/cpu-thermal/cooling-maps";
  2374. soc = "/soc";
  2375. system_timer = "/soc/timer@7e003000";
  2376. txp = "/soc/txp@7e004000";
  2377. clocks = "/soc/cprman@7e101000";
  2378. mailbox = "/soc/mailbox@7e00b880";
  2379. gpio = "/soc/gpio@7e200000";
  2380. dpi_gpio0 = "/soc/gpio@7e200000/dpi-gpio0";
  2381. emmc_gpio22 = "/soc/gpio@7e200000/emmc-gpio22";
  2382. emmc_gpio34 = "/soc/gpio@7e200000/emmc-gpio34";
  2383. emmc_gpio48 = "/soc/gpio@7e200000/emmc-gpio48";
  2384. gpclk0_gpio4 = "/soc/gpio@7e200000/gpclk0-gpio4";
  2385. gpclk1_gpio5 = "/soc/gpio@7e200000/gpclk1-gpio5";
  2386. gpclk1_gpio42 = "/soc/gpio@7e200000/gpclk1-gpio42";
  2387. gpclk1_gpio44 = "/soc/gpio@7e200000/gpclk1-gpio44";
  2388. gpclk2_gpio6 = "/soc/gpio@7e200000/gpclk2-gpio6";
  2389. gpclk2_gpio43 = "/soc/gpio@7e200000/gpclk2-gpio43";
  2390. i2c0_gpio0 = "/soc/gpio@7e200000/i2c0if-gpio0";
  2391. i2c0_gpio28 = "/soc/gpio@7e200000/i2c0if-gpio28";
  2392. i2c0_gpio44 = "/soc/gpio@7e200000/i2c0if-gpio44";
  2393. i2c1_gpio2 = "/soc/gpio@7e200000/i2c1-gpio2";
  2394. i2c1_gpio44 = "/soc/gpio@7e200000/i2c1-gpio44";
  2395. jtag_gpio22 = "/soc/gpio@7e200000/jtag-gpio22";
  2396. pcm_gpio18 = "/soc/gpio@7e200000/pcm-gpio18";
  2397. pcm_gpio28 = "/soc/gpio@7e200000/pcm-gpio28";
  2398. sdhost_gpio48 = "/soc/gpio@7e200000/sdhost-gpio48";
  2399. spi0_gpio7 = "/soc/gpio@7e200000/spi0-gpio7";
  2400. spi0_gpio35 = "/soc/gpio@7e200000/spi0-gpio35";
  2401. spi1_gpio16 = "/soc/gpio@7e200000/spi1-gpio16";
  2402. spi2_gpio40 = "/soc/gpio@7e200000/spi2-gpio40";
  2403. uart0_gpio14 = "/soc/gpio@7e200000/uart0-gpio14";
  2404. uart0_ctsrts_gpio16 = "/soc/gpio@7e200000/uart0-ctsrts-gpio16";
  2405. uart0_ctsrts_gpio30 = "/soc/gpio@7e200000/uart0-ctsrts-gpio30";
  2406. uart0_gpio32 = "/soc/gpio@7e200000/uart0-gpio32";
  2407. uart0_gpio36 = "/soc/gpio@7e200000/uart0-gpio36";
  2408. uart0_ctsrts_gpio38 = "/soc/gpio@7e200000/uart0-ctsrts-gpio38";
  2409. uart1_gpio14 = "/soc/gpio@7e200000/uart1-gpio14";
  2410. uart1_ctsrts_gpio16 = "/soc/gpio@7e200000/uart1-ctsrts-gpio16";
  2411. uart1_gpio32 = "/soc/gpio@7e200000/uart1-gpio32";
  2412. uart1_ctsrts_gpio30 = "/soc/gpio@7e200000/uart1-ctsrts-gpio30";
  2413. uart1_gpio40 = "/soc/gpio@7e200000/uart1-gpio40";
  2414. uart1_ctsrts_gpio42 = "/soc/gpio@7e200000/uart1-ctsrts-gpio42";
  2415. gpclk0_gpio49 = "/soc/gpio@7e200000/gpclk0-gpio49";
  2416. gpclk1_gpio50 = "/soc/gpio@7e200000/gpclk1-gpio50";
  2417. gpclk2_gpio51 = "/soc/gpio@7e200000/gpclk2-gpio51";
  2418. i2c0_gpio46 = "/soc/gpio@7e200000/i2c0if-gpio46";
  2419. i2c1_gpio46 = "/soc/gpio@7e200000/i2c1-gpio46";
  2420. i2c3_gpio2 = "/soc/gpio@7e200000/i2c3-gpio2";
  2421. i2c3_gpio4 = "/soc/gpio@7e200000/i2c3-gpio4";
  2422. i2c4_gpio6 = "/soc/gpio@7e200000/i2c4-gpio6";
  2423. i2c4_gpio8 = "/soc/gpio@7e200000/i2c4-gpio8";
  2424. i2c5_gpio10 = "/soc/gpio@7e200000/i2c5-gpio10";
  2425. i2c5_gpio12 = "/soc/gpio@7e200000/i2c5-gpio12";
  2426. i2c6_gpio0 = "/soc/gpio@7e200000/i2c6-gpio0";
  2427. i2c6_gpio22 = "/soc/gpio@7e200000/i2c6-gpio22";
  2428. i2c_slave_gpio8 = "/soc/gpio@7e200000/i2c-slave-gpio8";
  2429. jtag_gpio48 = "/soc/gpio@7e200000/jtag-gpio48";
  2430. mii_gpio28 = "/soc/gpio@7e200000/mii-gpio28";
  2431. mii_gpio36 = "/soc/gpio@7e200000/mii-gpio36";
  2432. pcm_gpio50 = "/soc/gpio@7e200000/pcm-gpio50";
  2433. pwm0_0_gpio12 = "/soc/gpio@7e200000/pwm0-0-gpio12";
  2434. pwm0_0_gpio18 = "/soc/gpio@7e200000/pwm0-0-gpio18";
  2435. pwm1_0_gpio40 = "/soc/gpio@7e200000/pwm1-0-gpio40";
  2436. pwm0_1_gpio13 = "/soc/gpio@7e200000/pwm0-1-gpio13";
  2437. pwm0_1_gpio19 = "/soc/gpio@7e200000/pwm0-1-gpio19";
  2438. pwm1_1_gpio41 = "/soc/gpio@7e200000/pwm1-1-gpio41";
  2439. pwm0_1_gpio45 = "/soc/gpio@7e200000/pwm0-1-gpio45";
  2440. pwm0_0_gpio52 = "/soc/gpio@7e200000/pwm0-0-gpio52";
  2441. pwm0_1_gpio53 = "/soc/gpio@7e200000/pwm0-1-gpio53";
  2442. rgmii_gpio35 = "/soc/gpio@7e200000/rgmii-gpio35";
  2443. rgmii_irq_gpio34 = "/soc/gpio@7e200000/rgmii-irq-gpio34";
  2444. rgmii_irq_gpio39 = "/soc/gpio@7e200000/rgmii-irq-gpio39";
  2445. rgmii_mdio_gpio28 = "/soc/gpio@7e200000/rgmii-mdio-gpio28";
  2446. rgmii_mdio_gpio37 = "/soc/gpio@7e200000/rgmii-mdio-gpio37";
  2447. spi0_gpio46 = "/soc/gpio@7e200000/spi0-gpio46";
  2448. spi2_gpio46 = "/soc/gpio@7e200000/spi2-gpio46";
  2449. spi3_gpio0 = "/soc/gpio@7e200000/spi3-gpio0";
  2450. spi4_gpio4 = "/soc/gpio@7e200000/spi4-gpio4";
  2451. spi5_gpio12 = "/soc/gpio@7e200000/spi5-gpio12";
  2452. spi6_gpio18 = "/soc/gpio@7e200000/spi6-gpio18";
  2453. uart2_gpio0 = "/soc/gpio@7e200000/uart2-gpio0";
  2454. uart2_ctsrts_gpio2 = "/soc/gpio@7e200000/uart2-ctsrts-gpio2";
  2455. uart3_gpio4 = "/soc/gpio@7e200000/uart3-gpio4";
  2456. uart3_ctsrts_gpio6 = "/soc/gpio@7e200000/uart3-ctsrts-gpio6";
  2457. uart4_gpio8 = "/soc/gpio@7e200000/uart4-gpio8";
  2458. uart4_ctsrts_gpio10 = "/soc/gpio@7e200000/uart4-ctsrts-gpio10";
  2459. uart5_gpio12 = "/soc/gpio@7e200000/uart5-gpio12";
  2460. uart5_ctsrts_gpio14 = "/soc/gpio@7e200000/uart5-ctsrts-gpio14";
  2461. dpi_18bit_cpadhi_gpio0 = "/soc/gpio@7e200000/dpi_18bit_cpadhi_gpio0";
  2462. dpi_18bit_cpadhi_gpio2 = "/soc/gpio@7e200000/dpi_18bit_cpadhi_gpio2";
  2463. dpi_18bit_gpio0 = "/soc/gpio@7e200000/dpi_18bit_gpio0";
  2464. dpi_18bit_gpio2 = "/soc/gpio@7e200000/dpi_18bit_gpio2";
  2465. dpi_16bit_gpio0 = "/soc/gpio@7e200000/dpi_16bit_gpio0";
  2466. dpi_16bit_gpio2 = "/soc/gpio@7e200000/dpi_16bit_gpio2";
  2467. dpi_16bit_cpadhi_gpio0 = "/soc/gpio@7e200000/dpi_16bit_cpadhi_gpio0";
  2468. dpi_16bit_cpadhi_gpio2 = "/soc/gpio@7e200000/dpi_16bit_cpadhi_gpio2";
  2469. gpioout = "/soc/gpio@7e200000/gpioout";
  2470. alt0 = "/soc/gpio@7e200000/alt0";
  2471. spi0_pins = "/soc/gpio@7e200000/spi0_pins";
  2472. spi0_cs_pins = "/soc/gpio@7e200000/spi0_cs_pins";
  2473. spi3_pins = "/soc/gpio@7e200000/spi3_pins";
  2474. spi3_cs_pins = "/soc/gpio@7e200000/spi3_cs_pins";
  2475. spi4_pins = "/soc/gpio@7e200000/spi4_pins";
  2476. spi4_cs_pins = "/soc/gpio@7e200000/spi4_cs_pins";
  2477. spi5_pins = "/soc/gpio@7e200000/spi5_pins";
  2478. spi5_cs_pins = "/soc/gpio@7e200000/spi5_cs_pins";
  2479. spi6_pins = "/soc/gpio@7e200000/spi6_pins";
  2480. spi6_cs_pins = "/soc/gpio@7e200000/spi6_cs_pins";
  2481. i2c0_pins = "/soc/gpio@7e200000/i2c0";
  2482. i2c1_pins = "/soc/gpio@7e200000/i2c1";
  2483. i2c3_pins = "/soc/gpio@7e200000/i2c3";
  2484. i2c4_pins = "/soc/gpio@7e200000/i2c4";
  2485. i2c5_pins = "/soc/gpio@7e200000/i2c5";
  2486. i2c6_pins = "/soc/gpio@7e200000/i2c6";
  2487. i2s_pins = "/soc/gpio@7e200000/i2s";
  2488. sdio_pins = "/soc/gpio@7e200000/sdio_pins";
  2489. uart2_pins = "/soc/gpio@7e200000/uart2_pins";
  2490. uart3_pins = "/soc/gpio@7e200000/uart3_pins";
  2491. uart4_pins = "/soc/gpio@7e200000/uart4_pins";
  2492. uart5_pins = "/soc/gpio@7e200000/uart5_pins";
  2493. uart0_pins = "/soc/gpio@7e200000/uart0_pins";
  2494. audio_pins = "/soc/gpio@7e200000/audio_pins";
  2495. uart0 = "/soc/serial@7e201000";
  2496. sdhost = "/soc/mmc@7e202000";
  2497. i2s_clk_consumer = "/soc/i2s@7e203000";
  2498. i2s_clk_producer = "/soc/i2s@7e203000";
  2499. i2s = "/soc/i2s@7e203000";
  2500. spi0 = "/soc/spi@7e204000";
  2501. spi = "/soc/spi@7e204000";
  2502. spidev0 = "/soc/spi@7e204000/spidev@0";
  2503. spidev1 = "/soc/spi@7e204000/spidev@1";
  2504. i2c0if = "/soc/i2c@7e205000";
  2505. dpi = "/soc/dpi@7e208000";
  2506. dsi0 = "/soc/dsi@7e209000";
  2507. aux = "/soc/aux@7e215000";
  2508. uart1 = "/soc/serial@7e215040";
  2509. spi1 = "/soc/spi@7e215080";
  2510. spi2 = "/soc/spi@7e2150c0";
  2511. pwm = "/soc/pwm@7e20c000";
  2512. mmc = "/soc/mmc@7e300000";
  2513. sdhci = "/soc/mmc@7e300000";
  2514. hvs = "/soc/hvs@7e400000";
  2515. dsi1 = "/soc/dsi@7e700000";
  2516. i2c_arm = "/soc/i2c@7e804000";
  2517. i2c1 = "/soc/i2c@7e804000";
  2518. usb = "/soc/usb@7e980000";
  2519. local_intc = "/soc/interrupt-controller@40000000";
  2520. gicv2 = "/soc/interrupt-controller@40041000";
  2521. avs_monitor = "/soc/avs-monitor@7d5d2000";
  2522. thermal = "/soc/avs-monitor@7d5d2000/thermal";
  2523. dma = "/soc/dma-controller@7e007000";
  2524. watchdog = "/soc/watchdog@7e100000";
  2525. pm = "/soc/watchdog@7e100000";
  2526. random = "/soc/rng@7e104000";
  2527. uart2 = "/soc/serial@7e201400";
  2528. uart3 = "/soc/serial@7e201600";
  2529. uart4 = "/soc/serial@7e201800";
  2530. uart5 = "/soc/serial@7e201a00";
  2531. spi3 = "/soc/spi@7e204600";
  2532. spi4 = "/soc/spi@7e204800";
  2533. spi5 = "/soc/spi@7e204a00";
  2534. spi6 = "/soc/spi@7e204c00";
  2535. i2c3 = "/soc/i2c@7e205600";
  2536. i2c4 = "/soc/i2c@7e205800";
  2537. i2c5 = "/soc/i2c@7e205a00";
  2538. i2c6 = "/soc/i2c@7e205c00";
  2539. pixelvalve0 = "/soc/pixelvalve@7e206000";
  2540. pixelvalve1 = "/soc/pixelvalve@7e207000";
  2541. pixelvalve2 = "/soc/pixelvalve@7e20a000";
  2542. pwm1 = "/soc/pwm@7e20c800";
  2543. pixelvalve4 = "/soc/pixelvalve@7e216000";
  2544. pixelvalve3 = "/soc/pixelvalve@7ec12000";
  2545. vec = "/soc/vec@7ec13000";
  2546. dvp = "/soc/clock@7ef00000";
  2547. aon_intr = "/soc/interrupt-controller@7ef00100";
  2548. hdmi0 = "/soc/hdmi@7ef00700";
  2549. ddc0 = "/soc/i2c@7ef04500";
  2550. hdmi1 = "/soc/hdmi@7ef05700";
  2551. ddc1 = "/soc/i2c@7ef09500";
  2552. mmcnr = "/soc/mmcnr@7e300000";
  2553. firmwarekms = "/soc/firmwarekms@7e600000";
  2554. smi = "/soc/smi@7e600000";
  2555. csi0 = "/soc/csi@7e800000";
  2556. csi1 = "/soc/csi@7e801000";
  2557. axiperf = "/soc/axiperf";
  2558. i2c0mux = "/soc/i2c0mux";
  2559. i2c_csi_dsi0 = "/soc/i2c0mux/i2c@0";
  2560. i2c_vc = "/soc/i2c0mux/i2c@0";
  2561. i2c0 = "/soc/i2c0mux/i2c@0";
  2562. i2c_csi_dsi = "/soc/i2c0mux/i2c@1";
  2563. firmware = "/soc/firmware";
  2564. firmware_clocks = "/soc/firmware/clocks";
  2565. expgpio = "/soc/firmware/gpio";
  2566. reset = "/soc/firmware/reset";
  2567. vcio = "/soc/firmware/vcio";
  2568. virtgpio = "/soc/firmware/virtgpio";
  2569. power = "/soc/power";
  2570. vchiq = "/soc/mailbox@7e00b840";
  2571. fb = "/soc/fb";
  2572. sound = "/soc/sound";
  2573. nvmem_otp = "/soc/nvmem/nvmem_otp";
  2574. nvmem_cust = "/soc/nvmem/nvmem_cust";
  2575. nvmem_priv = "/soc/nvmem/nvmem_priv";
  2576. clk_osc = "/clocks/clk-osc";
  2577. clk_usb = "/clocks/clk-usb";
  2578. usbphy = "/phy";
  2579. vc4 = "/gpu";
  2580. clk_27MHz = "/clk-27M";
  2581. clk_108MHz = "/clk-108M";
  2582. emmc2bus = "/emmc2bus";
  2583. emmc2 = "/emmc2bus/mmc@7e340000";
  2584. cpus = "/cpus";
  2585. cpu0 = "/cpus/cpu@0";
  2586. cpu1 = "/cpus/cpu@1";
  2587. cpu2 = "/cpus/cpu@2";
  2588. cpu3 = "/cpus/cpu@3";
  2589. l2 = "/cpus/l2-cache0";
  2590. scb = "/scb";
  2591. pcie0 = "/scb/pcie@7d500000";
  2592. genet = "/scb/ethernet@7d580000";
  2593. genet_mdio = "/scb/ethernet@7d580000/mdio@e14";
  2594. dma40 = "/scb/dma@7e007b00";
  2595. xhci = "/scb/xhci@7e9c0000";
  2596. cam1_reg = "/cam1_regulator";
  2597. cam1_clk = "/cam1_clk";
  2598. cam0_reg = "/cam0_regulator";
  2599. cam0_regulator = "/cam0_regulator";
  2600. cam0_clk = "/cam0_clk";
  2601. cam_dummy_reg = "/cam_dummy_reg";
  2602. leds = "/leds";
  2603. led_act = "/leds/led-act";
  2604. vdd_3v3_reg = "/fixedregulator_3v3";
  2605. vdd_5v0_reg = "/fixedregulator_5v0";
  2606. v3dbus = "/v3dbus";
  2607. v3d = "/v3dbus/v3d@7ec04000";
  2608. };
  2609. };
  2610.  
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