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  1. DB: debugger backends: ddb
  2. KDB: current backend: ddb
  3. Copyright (c) 1992-2011 The FreeBSD Project.
  4. Copyright (c) 1979, 1980, 1983, 1986, 1988, 1989, 1991, 1992, 1993, 1994
  5. The Regents of the University of California. All rights reserved.
  6. FreeBSD is a registered trademark of The FreeBSD Foundation.
  7. FreeBSD 10.0-CURRENT #0: Wed Feb 15 10:05:47 CET 2012
  8. damarion@ams-damarion-8713.cisco.com:/data/tmp/BEAGLEBONE arm
  9. WARNING: WITNESS option enabled, expect reduced performance.
  10. CPU: Cortex A8-r3 rev 2 (Cortex-A core)
  11. Supported features: ARM_ISA THUMB2 JAZELLE THUMBEE ARMv4 Security_Ext
  12. WB disabled EABT branch prediction enabled
  13. LoUU:2 LoC:2 LoUIS:1
  14. Cache level 1:
  15. 32KB/64B 4-way data cache WT WB Read-Alloc
  16. 32KB/64B 4-way instruction cache Read-Alloc
  17. Cache level 2:
  18. 256KB/64B 8-way unified cache WT WB Read-Alloc Write-Alloc
  19. real memory = 268435456 (256 MB)
  20. avail memory = 253489152 (241 MB)
  21. Texas Instruments AM3358 Processor, Revision ES1.0
  22. simplebus0: <Flattened device tree simple bus> on fdtbus0
  23. aintc0: <TI AINTC Interrupt Controller> mem 0xca82c000-0xca82cfff on simplebus0
  24. aintc0: Revision 5.0
  25. am335x-prcm0: <AM335x PRCM> mem 0xe4e00000-0xe4e012ff on simplebus0
  26. ti-timer0: <TI DMTimer> mem 0xca82d000-0xca82dfff irq 68 on simplebus0
  27. Timecounter "TI CPU Timecouter" frequency 24000000 Hz quality 1000
  28. ti-timer1: <TI DMTimer> mem 0xca82e000-0xca82efff irq 69 on simplebus0
  29. Event timer "TI CPU Eventtimer1" frequency 24000000 Hz quality 1000
  30. uart0: <16750 or compatible> mem 0xe4e09000-0xe4e09fff irq 72 on simplebus0
  31. uart0: console (115384,n,8,1)
  32. cpsw0: <3-port Switch Ethernet Subsystem> mem 0xca82f000-0xca830fff irq 40,41,42,43 on simplebus0
  33. cpsw0: Ethernet address: 88:fb:30:c0:e4:12
  34. cpsw_miibus_readreg: phy=0x0 reg=0x1 ok r=0x2020782d
  35. cpsw_miibus_readreg: phy=0x0 reg=0x2 ok r=0x20400007
  36. cpsw_miibus_readreg: phy=0x0 reg=0x3 ok r=0x2060c0f1
  37. miibus0: <MII bus> on cpsw0
  38. cpsw_miibus_readreg: phy=0x0 reg=0x1 ok r=0x2020782d
  39. smcphy0: <SMC LAN8710A 10/100 interface> PHY 0 on miibus0
  40. cpsw_miibus_writereg: phy=0x0 reg=0x0 value=0x8000 ok
  41. cpsw_miibus_readreg: phy=0x0 reg=0x0 ok r=0x20002100
  42. cpsw_miibus_writereg: phy=0x0 reg=0x0 value=0x3000 ok
  43. cpsw_miibus_writereg: phy=0x0 reg=0x1e value=0xffc0 ok
  44. cpsw_miibus_readreg: phy=0x0 reg=0x1 ok r=0x20207809
  45. smcphy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, auto
  46. cpsw_miibus_readreg: phy=0x0 reg=0x0 ok r=0x20003000
  47. miisc->mii_phy = 0 MDIOUSERPHYSEL0=0
  48. miisc->mii_phy = 0 MDIOUSERPHYSEL0=40
  49. Timecounters tick every 10.000 msec
  50. md0.uzip: 384 x 16384 blocks
  51. WARNING: WITNESS option enabled, expect reduced performance.
  52. Trying to mount root from ufs:/dev/md0 []...
  53. Mounting from ufs:/dev/md0 failed with error 22.
  54. Trying to mount root from ufs:md0.uzip []...
  55. warning: no time-of-day clock registered, system time will not be set accurately
  56. lock order reversal:
  57. 1st 0xc1dda0b0 pmap (pmap) @ /data/src/freebsd/armv6/arm/arm/pmap-v6.c:667
  58. 2nd 0xc0a15608 PV ENTRY (UMA zone) @ /data/src/freebsd/armv6/vm/uma_core.c:2084
  59. KDB: stack backtrace:
  60. db_read_token() at db_read_token+0x5c8
  61. scp=0xc0225a60 rlv=0xc1d931a0 (0xc1d931a0)
  62. rsp=0xc0457120 rfp=0xc9dfea3c
  63. Bad frame pointer: 0xc9dfea3c
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