# Generated by Yosys 0.7+554 (git sha1 617c60ce, clang 4.0.1-6 -fPIC -Os)

.model top
.inputs clk
.outputs LED
.names $abc$184$n6 LED $0\counter[2:0][2]
01 1
10 1
.names counter[1] $0\counter[2:0][1]
0 1
.names counter[0] $0\counter[2:0][0]
0 1
.subckt SB_CARRY CI=counter[0] CO=$abc$184$n6 I0=$false I1=counter[1]
.cname $auto$alumacc.cc:474:replace_alu$5.slice[1].carry
.attr src "counter.v:9|/usr/local/bin/../share/yosys/ice40/arith_map.v:47"
.subckt SB_DFF C=clk D=$0\counter[2:0][0] Q=counter[0]
.cname $auto$simplemap.cc:420:simplemap_dff$61
.attr src "counter.v:8|/usr/local/bin/../share/yosys/ice40/cells_map.v:2"
.subckt SB_DFFE C=clk D=$0\counter[2:0][1] E=counter[0] Q=counter[1]
.cname $auto$simplemap.cc:420:simplemap_dff$62
.attr src "counter.v:8|/usr/local/bin/../share/yosys/ice40/cells_map.v:8"
.subckt SB_DFF C=clk D=$0\counter[2:0][2] Q=LED
.cname $auto$simplemap.cc:420:simplemap_dff$63
.attr src "counter.v:8|/usr/local/bin/../share/yosys/ice40/cells_map.v:2"
.conn LED counter[2]
.end