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  1. `timescale 1ns / 1ps
  2.  
  3. ////////////////////////////////////////////////////////////////////////////////
  4. // Company:
  5. // Engineer:
  6. //
  7. // Create Date: 18:04:24 10/26/2013
  8. // Design Name: CubeRoot
  9. // Module Name: C:/Users/Siddarth/Documents/Xilinx/CubeRoot/CubeRootTest.v
  10. // Project Name: CubeRoot
  11. // Target Device:
  12. // Tool versions:
  13. // Description:
  14. //
  15. // Verilog Test Fixture created by ISE for module: CubeRoot
  16. //
  17. // Dependencies:
  18. //
  19. // Revision:
  20. // Revision 0.01 - File Created
  21. // Additional Comments:
  22. //
  23. ////////////////////////////////////////////////////////////////////////////////
  24.  
  25. module CubeRootTest;
  26.  
  27. // Inputs
  28. reg [63:0] Number;
  29. reg clk;
  30.  
  31. // Outputs
  32. wire [21:0] Answer;
  33. wire [63:0] Remainder;
  34. wire [63:0] NumberLevel1;
  35. wire [63:0] NumberLevel2;
  36. wire [63:0] NumberLevel3;
  37. wire [63:0] NumberLevel4;
  38. wire [63:0] NumberLevel5;
  39. wire [63:0] NumberLevel6;
  40. wire [63:0] NumberLevel7;
  41. wire [63:0] NumberLevel8;
  42. wire [63:0] NumberLevel9;
  43. wire [63:0] NumberLevel10;
  44.  
  45.  
  46. // Instantiate the Unit Under Test (UUT)
  47. CubeRoot uut (
  48. .Number(Number),
  49. .clk(clk),
  50. .Answer(Answer),
  51. .Remainder(Remainder),
  52. .NumberLevel1(NumberLevel1),
  53. .NumberLevel2(NumberLevel2),
  54. .NumberLevel3(NumberLevel3),
  55. .NumberLevel4(NumberLevel4),
  56. .NumberLevel5(NumberLevel5),
  57. .NumberLevel6(NumberLevel6),
  58. .NumberLevel7(NumberLevel7),
  59. .NumberLevel8(NumberLevel8),
  60. .NumberLevel9(NumberLevel9),
  61. .NumberLevel10(NumberLevel10)
  62. );
  63.  
  64. initial begin
  65. // Initialize Inputs
  66. Number = 0;
  67. clk = 0;
  68.  
  69. // Wait 100 ns for global reset to finish
  70. #100;
  71.  
  72. // Add stimulus here
  73. Number = 27;
  74. clk = 1;
  75. #10;
  76. clk = 0;
  77. #10;
  78. Number = 64;
  79. clk = 1;
  80. #10;
  81. clk = 0;
  82. #10;
  83. Number = 216;
  84. clk = 1;
  85. #10;
  86. clk = 0;
  87. #10;
  88. Number = 8;
  89. clk = 1;
  90. #10;
  91. clk = 0;
  92. #10;
  93. Number = 125;
  94. clk = 1;
  95. #10;
  96. clk = 0;
  97. #10;
  98. clk = 1;
  99. #10;
  100. clk = 0;
  101. #10;
  102. clk = 1;
  103. #10;
  104. clk = 0;
  105. #10;
  106. clk = 1;
  107. #10;
  108. clk = 0;
  109. #10;
  110. clk = 1;
  111. #10;
  112. clk = 0;
  113. #10;
  114. clk = 1;
  115. #10;
  116. clk = 0;
  117. #10;
  118. clk = 1;
  119. #10;
  120. clk = 0;
  121. #10;
  122. clk = 1;
  123. #10;
  124. clk = 0;
  125. #10;
  126. clk = 1;
  127. #10;
  128. clk = 0;
  129. #10;
  130. clk = 1;
  131. #10;
  132. clk = 0;
  133. #10;
  134. clk = 1;
  135. #10;
  136. clk = 0;
  137. #10;
  138. clk = 1;
  139. #10;
  140. clk = 0;
  141. #10;
  142. clk = 1;
  143. #10;
  144. clk = 0;
  145. #10;
  146. clk = 1;
  147. #10;
  148. clk = 0;
  149. #10;
  150. clk = 1;
  151. #10;
  152. clk = 0;
  153. #10;
  154. clk = 1;
  155. #10;
  156. clk = 0;
  157. #10;
  158. clk = 1;
  159. #10;
  160. clk = 0;
  161. #10; clk = 1;
  162. clk = 1;
  163. #10;
  164. clk = 0;
  165. #10;
  166. clk = 1;
  167. #10;
  168. clk = 0;
  169. #10;
  170. clk = 1;
  171. #10;
  172. clk = 0;
  173. #10;
  174. clk = 1;
  175. #10;
  176. clk = 0;
  177. #10;
  178. clk = 1;
  179. #10;
  180. clk = 0;
  181. #10;
  182. clk = 1;
  183. #10;
  184. clk = 0;
  185. #10;
  186. clk = 1;
  187. #10;
  188. clk = 0;
  189. #10;
  190. clk = 1;
  191. #10;
  192. clk = 0;
  193. #10;
  194. clk = 1;
  195. #10;
  196. clk = 0;
  197. #10;
  198. clk = 1;
  199. #10;
  200. clk = 0;
  201. #10;
  202. clk = 1;
  203. #10;
  204. clk = 0;
  205. #10;
  206. clk = 1;
  207. #10;
  208. clk = 0;
  209. #10;
  210. clk = 1;
  211. #10;
  212. clk = 0;
  213. #10;
  214. clk = 1;
  215. #10;
  216. clk = 0;
  217. #10;
  218. clk = 1;
  219. #10;
  220. clk = 0;
  221. #10;
  222. clk = 1;
  223. #10;
  224. clk = 0;
  225. #10; clk = 1;
  226.  
  227.  
  228.  
  229. end
  230.  
  231.  
  232. endmodule
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