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ClearFog Base lspci -vv

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Mar 9th, 2025
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  1. $ sudo lspci -vv
  2. 00:02.0 PCI bridge: Marvell Technology Group Ltd. 88F6828 [Armada 388] ARM SoC (rev 04) (prog-if 00 [Normal decode])
  3. Subsystem: Marvell Technology Group Ltd. 88F6828 [Armada 388] ARM SoC
  4. Device tree node: /sys/firmware/devicetree/base/soc/pcie/pcie@2,0
  5. Control: I/O- Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx-
  6. Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
  7. Bus: primary=00, secondary=01, subordinate=01, sec-latency=0
  8. I/O behind bridge: [disabled] [32-bit]
  9. Memory behind bridge: e0000000-e01fffff [size=2M] [32-bit]
  10. Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
  11. BridgeCtl: Parity+ SERR+ NoISA- VGA- VGA16- MAbort- >Reset- FastB2B-
  12. PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
  13. Capabilities: [40] Subsystem: Marvell Technology Group Ltd. 88F6828 [Armada 388] ARM SoC
  14. Capabilities: [60] Express (v2) Root Port (Slot+), MSI 00
  15. DevCap: MaxPayload 128 bytes, PhantFunc 0
  16. ExtTag- RBE+
  17. DevCtl: CorrErr- NonFatalErr- FatalErr- UnsupReq-
  18. RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
  19. MaxPayload 128 bytes, MaxReadReq 512 bytes
  20. DevSta: CorrErr+ NonFatalErr- FatalErr- UnsupReq- AuxPwr- TransPend-
  21. LnkCap: Port #0, Speed 5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <256ns, L1 unlimited
  22. ClockPM- Surprise- LLActRep+ BwNot- ASPMOptComp-
  23. LnkCtl: ASPM Disabled; RCB 64 bytes, Disabled- CommClk-
  24. ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
  25. LnkSta: Speed 5GT/s, Width x1
  26. TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt-
  27. SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise-
  28. Slot #2, PowerLimit 0W; Interlock- NoCompl-
  29. SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
  30. Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-
  31. SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-
  32. Changed: MRL- PresDet- LinkState-
  33. RootCap: CRSVisible-
  34. RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
  35. RootSta: PME ReqID 0000, PMEStatus- PMEPending-
  36. DevCap2: Completion Timeout: Not Supported, TimeoutDis- NROPrPrP- LTR-
  37. 10BitTagComp- 10BitTagReq- OBFF Not Supported, ExtFmt- EETLPPrefix-
  38. EmergencyPowerReduction Not Supported, EmergencyPowerReductionInit-
  39. FRS- LN System CLS Not Supported, TPHComp- ExtTPHComp- ARIFwd-
  40. AtomicOpsCap: Routing- 32bit- 64bit- 128bitCAS-
  41. DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- LTR- 10BitTagReq- OBFF Disabled, ARIFwd-
  42. AtomicOpsCtl: ReqEn- EgressBlck-
  43. LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-
  44. Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
  45. Compliance Preset/De-emphasis: -6dB de-emphasis, 0dB preshoot
  46. LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete- EqualizationPhase1-
  47. EqualizationPhase2- EqualizationPhase3- LinkEqualizationRequest-
  48. Retimer- 2Retimers- CrosslinkRes: unsupported
  49. Capabilities: [100 v1] Advanced Error Reporting
  50. UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
  51. UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
  52. UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
  53. CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- AdvNonFatalErr-
  54. CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- AdvNonFatalErr+
  55. AERCap: First Error Pointer: 00, ECRCGenCap- ECRCGenEn- ECRCChkCap- ECRCChkEn-
  56. MultHdrRecCap- MultHdrRecEn- TLPPfxPres- HdrLogCap-
  57. HeaderLog: 4a000001 01000004 01080100 00010000
  58. RootCmd: CERptEn- NFERptEn- FERptEn-
  59. RootSta: CERcvd- MultCERcvd- UERcvd- MultUERcvd-
  60. FirstFatal- NonFatalMsg- FatalMsg- IntMsg 0
  61. ErrorSrc: ERR_COR: 0000 ERR_FATAL/NONFATAL: 0000
  62.  
  63. 01:00.0 System peripheral: Global Unichip Corp. Coral Edge TPU (prog-if ff)
  64. Subsystem: Global Unichip Corp. Coral Edge TPU
  65. Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx-
  66. Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
  67. Interrupt: pin A routed to IRQ 0
  68. Region 0: Memory at e0100000 (64-bit, prefetchable) [disabled] [size=16K]
  69. Region 2: Memory at e0000000 (64-bit, prefetchable) [disabled] [size=1M]
  70. Capabilities: [80] Express (v2) Endpoint, MSI 00
  71. DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
  72. ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset- SlotPowerLimit 0W
  73. DevCtl: CorrErr- NonFatalErr- FatalErr- UnsupReq-
  74. RlxdOrd+ ExtTag+ PhantFunc- AuxPwr- NoSnoop+
  75. MaxPayload 128 bytes, MaxReadReq 512 bytes
  76. DevSta: CorrErr- NonFatalErr- FatalErr- UnsupReq- AuxPwr- TransPend-
  77. LnkCap: Port #1, Speed 5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <64ns, L1 <1us
  78. ClockPM+ Surprise- LLActRep- BwNot- ASPMOptComp+
  79. LnkCtl: ASPM Disabled; RCB 64 bytes, Disabled- CommClk-
  80. ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
  81. LnkSta: Speed 5GT/s, Width x1
  82. TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
  83. DevCap2: Completion Timeout: Range ABCD, TimeoutDis+ NROPrPrP- LTR+
  84. 10BitTagComp- 10BitTagReq- OBFF Not Supported, ExtFmt+ EETLPPrefix-
  85. EmergencyPowerReduction Not Supported, EmergencyPowerReductionInit-
  86. FRS- TPHComp- ExtTPHComp-
  87. AtomicOpsCap: 32bit- 64bit- 128bitCAS-
  88. DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- LTR- 10BitTagReq- OBFF Disabled,
  89. AtomicOpsCtl: ReqEn-
  90. LnkCap2: Supported Link Speeds: 2.5-5GT/s, Crosslink- Retimer- 2Retimers- DRS-
  91. LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-
  92. Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
  93. Compliance Preset/De-emphasis: -6dB de-emphasis, 0dB preshoot
  94. LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete- EqualizationPhase1-
  95. EqualizationPhase2- EqualizationPhase3- LinkEqualizationRequest-
  96. Retimer- 2Retimers- CrosslinkRes: unsupported
  97. Capabilities: [d0] MSI-X: Enable- Count=128 Masked-
  98. Vector table: BAR=2 offset=00046800
  99. PBA: BAR=2 offset=00046068
  100. Capabilities: [e0] MSI: Enable- Count=1/32 Maskable- 64bit+
  101. Address: 0000000000000000 Data: 0000
  102. Capabilities: [f8] Power Management version 3
  103. Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
  104. Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
  105. Capabilities: [100 v1] Vendor Specific Information: ID=1556 Rev=1 Len=008 <?>
  106. Capabilities: [108 v1] Latency Tolerance Reporting
  107. Max snoop latency: 0ns
  108. Max no snoop latency: 0ns
  109. Capabilities: [110 v1] L1 PM Substates
  110. L1SubCap: PCI-PM_L1.2+ PCI-PM_L1.1+ ASPM_L1.2+ ASPM_L1.1+ L1_PM_Substates+
  111. PortCommonModeRestoreTime=10us PortTPowerOnTime=10us
  112. L1SubCtl1: PCI-PM_L1.2- PCI-PM_L1.1- ASPM_L1.2- ASPM_L1.1-
  113. T_CommonMode=0us LTR1.2_Threshold=0ns
  114. L1SubCtl2: T_PwrOn=10us
  115. Capabilities: [200 v2] Advanced Error Reporting
  116. UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
  117. UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
  118. UESvrt: DLP+ SDES- TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
  119. CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- AdvNonFatalErr-
  120. CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- AdvNonFatalErr+
  121. AERCap: First Error Pointer: 00, ECRCGenCap+ ECRCGenEn- ECRCChkCap+ ECRCChkEn-
  122. MultHdrRecCap- MultHdrRecEn- TLPPfxPres- HdrLogCap-
  123. HeaderLog: 00000000 00000000 00000000 00000000
  124.  
  125.  
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