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potterhead2003

ADLD_Digital_Clock

Jul 27th, 2021 (edited)
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  1. module clock(out,reset,clk,seg,enable,hours,stopwatch);
  2. input reset,clk,stopwatch;//reset,clk and stopwatch is the input of digital clock.
  3. output reg [7:0]out;//out is a 8 bit output,which is used for LED.
  4. output reg [3:0]enable,seg;//4 bit enable and segment signal are used.
  5. reg [25:0]count1,count2;//count1 and count2 is used for count the posedge of clock.
  6. reg [3:0]sec0,sec1,min0,min1;//sec0,sec1,min0,min1 are 4 bit counters.
  7. reg clk_1s,clk_count ;//clk_1s will goes high in every 1 second and clk_count is used for switching.
  8. reg [3:0]counter;//4 bit counter is used.
  9. output reg [4:0]hours;//5 bit binary output is used for hours.
  10. always @(posedge clk)
  11. begin
  12. if(reset)
  13. count1=26'd0;
  14. else if
  15. (count1 == 26'd25000000)//this always block is used for generating clock of 1 second.
  16.             begin
  17.             clk_1s = ~clk_1s;
  18. count1 = 26'd0; end
  19. else if(stopwatch==1'b1)//if stopwatch is high then our output will stop.
  20. clk_1s=1'b0;
  21. else
  22. count1 = count1+26'd1;
  23. end
  24.  
  25. always@(posedge clk)
  26. begin
  27. if(count2==26'd10000)//this always block is used for switching the 7 segment LED.
  28. begin
  29. clk_count=~clk_count;
  30. count2<=26'd0;
  31. end
  32. else
  33. count2<=count2+1;
  34. end
  35.  
  36.  
  37.  
  38. always@(posedge clk_1s )
  39. begin
  40. if(reset==1'b1) begin //this always block works on 1 second of clock.
  41.     sec0=0;
  42.              sec1=0;
  43.              min0=0;
  44.              min1=0;  end
  45. else if(sec0<9)//if LSB bit of second is less than 9 then it will increse.
  46.       sec0=sec0+1;
  47. else if(sec1<5) //if MSB bit of second is less than 5 then it will increse
  48. begin          //and LSB bit of second will become 0.
  49.       sec1=sec1+1;
  50.       sec0=0;
  51. end
  52. else if(min0<9) //if LSB bit of minute is less than 9 then it will increse
  53. begin          //and LSB bit of second will become 0.
  54.  
  55.  
  56. min0=min0+1;  //and MSB bit of second will become 0.
  57. sec0=0;
  58. sec1=0;
  59. end
  60. else if(min1<5)//if MSB bit of minute is less than 5 then it will increse
  61. begin         //and MSB bit of second will become 0.
  62. min1=min1+1; //and LSB bit of second will become 0.
  63. sec0=0;     //and LSB bit of minute will become 0.
  64. sec1=0;
  65. min0=0;
  66. end
  67. else if(min1==4'd5&&min0==4'd9&&sec0==4'd9&&sec1==4'd5)
  68. begin     //if minute is 59 and second is 59 then it will work.
  69. sec0=0;  //if all the above conditions are satisfied then
  70. sec1=0; // all the minutes and seconds will become 0
  71. min0=0;// and hours will incremented and give binary output.
  72. min1=0;
  73. hours=hours+5'd1;
  74. end
  75. else if(hours==5'd24)
  76. begin
  77. hours=5'b00000;//if hours is greater than 24 then
  78. sec0=0;       //all the minutes,seconds and hours will start from 0.
  79. sec1=0;
  80. min0=0;
  81. min1=0; end
  82. end
  83.  
  84.  
  85.  
  86. always @(posedge clk_count)//this always block is used for enabling the LED
  87. begin                 //and assigning the value of minute and second in seg
  88. if(reset)            //and enabling the dot on 7 segment LED.  
  89.     counter=0;
  90. else
  91. counter=counter+1;        
  92. case(counter)
  93. 4'b0001 :
  94. begin     enable=4'b1110;
  95.            seg <= sec0;
  96.            out[7]<=1;                              end
  97. 4'b0010 :
  98. begin     enable=4'b1101;
  99.           seg <= sec1;
  100.                             out[7]<=1;           end                
  101. 4'b0011 :
  102. begin     enable=4'b1011;
  103.           seg <= min0;
  104.                             out[7]<=clk_1s;  end
  105. 4'b0100 :
  106. begin    enable=4'b0111;
  107.          seg <= min1;
  108.          out[7]<=1;                              end
  109. default : counter=4'b0000;                    
  110. endcase
  111. end
  112.  
  113. //this always block is used as BCD to 7 segment converter.
  114. always@(seg)
  115. begin
  116. case(seg)//this case is working on seg.
  117.                 4'b0000 :out[6:0] = 7'b0000001;
  118.              4'b0001 :out[6:0] = 7'b1001111;
  119.              4'b0010 :out[6:0] = 7'b0010010;
  120.              4'b0011 :out[6:0] = 7'b0000110;
  121.              4'b0100 :out[6:0] = 7'b1001100;
  122.              4'b0101 :out[6:0] = 7'b0100100;
  123.              4'b0110 :out[6:0] = 7'b0100000;
  124.              4'b0111 :out[6:0] = 7'b0001111;
  125.              4'b1000 :out[6:0] = 7'b0000000;
  126.              4'b1001 :out[6:0] = 7'b0000100;
  127.            
  128. endcase
  129. end
  130. endmodule
  131.  
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