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  1. reset
  2. resetting ...
  3. UB WDT_HW_Reset
  4. mtk_wdt_mode LK config mode value=10
  5. mtk_wdt_mode_config LK mode value=51, tmp:22000051
  6.  
  7. [USBD] USB PRB0 LineState: 0
  8.  
  9. [USBD] USB cable/ No Cable inserted!
  10.  
  11. [PLFM] Keep stay in USB Mode
  12. Platform initialization is ok
  13. wait for frequency meter finish, CLK26CALI = 0x81
  14. mt_pll_post_init: mt_get_cpu_freq = 1040000Khz
  15. wait for frequency meter finish, CLK26CALI = 0x90
  16. mt_pll_post_init: mt_get_bus_freq = 273000Khz
  17. wait for frequency meter finish, CLK26CALI = 0x81
  18. mt_pll_post_init: mt_get_mem_freq = 133250Khz
  19. [PWRAP] pwrap_init_preloader
  20. [PWRAP] pwrap_init
  21. [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=0,rdata=2D52
  22. [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=1,rdata=2D52
  23. [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=2,rdata=2D52
  24. [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=3,rdata=800
  25. [PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=4 rdata=5AA5
  26. [PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=5 rdata=5AA5
  27. [PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=6 rdata=5AA5
  28. [PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=7 rdata=5AA5
  29. [PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=8 rdata=5AA5
  30. [PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=9 rdata=5AA5
  31. [PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=10 rdata=5AA5
  32. [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=11,rdata=1001
  33. [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=12,rdata=B54B
  34. [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=13,rdata=B54B
  35. [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=14,rdata=B54B
  36. [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=15,rdata=B54B
  37. [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=16,rdata=B54B
  38. [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=17,rdata=B54B
  39. [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=18,rdata=B54B
  40. [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=19,rdata=2003
  41. [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=20,rdata=6A97
  42. [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=21,rdata=6A97
  43. [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=22,rdata=6A97
  44. [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=23,rdata=6A97
  45. [PWRAP] _pwrap_init_reg_clock
  46. [PMIC_WRAP]wrap_init pass,the return value=0.
  47. [pmic6323_init] Preloader Start..................
  48. [pmic6323_init] PMIC CHIP Code = 0x2023
  49. INT_MISC_CON: 1 TOP_RST_MISC: 1
  50. pl pmic powerkey Release
  51. [pmic6323_init] powerKey = 0
  52. [pmic6323_init] is USB in = 0xB004
  53. [pmic6323_init] Reg[0x11A]=0x9B
  54. pmic setup LED
  55. [pmic6323_init] Done...................
  56. mt7623 disable long press reset ->>>>>
  57. mt7623 disable long press reset <<<<<-
  58. mt7623 VPA supplied by 1.0V to MT7530 ->
  59. mt7623 VPA supplied by 1.0V to MT7530 <-
  60. mt7623 enables RG_VGP1_EN for LCM ->
  61. mt7623 enables RG_VGP1_EN for LCM <-
  62. MT7623 E2 setting =>
  63. MT7623 E2 setting <=
  64. [PLFM] Init I2C: OK(0)
  65. [PLFM] Init PWRAP: OK(0)
  66. [PLFM] Init PMIC: OK(0)
  67. [PLFM] chip[CA00]
  68.  
  69. [BLDR] [Support SD/eMMC] Build Time: 20190722-114700
  70. ==== Dump RGU Reg ========
  71. RGU MODE: 51
  72. RGU LENGTH: FFE0
  73. RGU STA: 80000000
  74. RGU INTERVAL: FFF
  75. RGU SWSYSRST: 0
  76. ==== Dump RGU Reg End ====
  77. RGU: g_rgu_satus:1
  78. mtk_wdt_mode_config mode value=10, tmp:22000010
  79. PL RGU RST: ??
  80. SW reset with bypass power key flag
  81. Find bypass powerkey flag
  82. RGU mtk_wdt_init:MTK_WDT_DEBUG_CTL(590200F3)
  83. kpd read addr: 0x0040: data:0x4004
  84. Enter mtk_kpd_gpio_set!
  85. kpd debug column : 0, 0, 0, 0, 0, 0, 0, 0
  86. kpd debug row : 0, 0, 0, 0, 0, 0, 0, 0
  87. after set KP enable: KP_SEL = 0x0 !
  88. MTK_PMIC_RST_KEY is used for this project!
  89. [RTC] get_frequency_meter: input=0x0, ouput=5
  90. [RTC] get_frequency_meter: input=0x0, ouput=3968
  91. [RTC] get_frequency_meter: input=0x0, ouput=5
  92. [RTC] get_frequency_meter: input=0x0, ouput=0
  93. [RTC] get_frequency_meter: input=0x0, ouput=0
  94. [RTC] bbpu = 0xD, con = 0x426
  95. [RTC] powerkey1 = 0xA357, powerkey2 = 0x67D2
  96. Writeif_unlock
  97. [RTC] RTC_SPAR0=0x40
  98. rtc_2sec_reboot_check cali=512
  99. [RTC] irqsta = 0x0, pdn1 = 0x0, pdn2 = 0x201, spar0 = 0x40, spar1 = 0x800
  100. [RTC] new_spare0 = 0x0, new_spare1 = 0x1, new_spare2 = 0x1, new_spare3 = 0x1
  101. [RTC] bbpu = 0xD, con = 0x426, cali = 0x200
  102. SW reset with bypass power key flag
  103. SW reset with bypass power key flag
  104. [PLFM] WDT reboot bypass power key!
  105. [RTC] rtc_bbpu_power_on done
  106. [EMI] mcp_dram_num:0,discrete_dram_num:1,enable_combo_dis:0
  107. [EMI] PCDDR3
  108. [Check]mt_get_mdl_number 0x0
  109. [EMI] eMMC/NAND ID = 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
  110. [EMI] MDL number = 0
  111. [EMI] emi_set eMMC/NAND ID = 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
  112. [EMI][Vcore]0x21E=0x48,0x220=0x48
  113. [EMI][Vmem]0x554=0x0
  114. wait for frequency meter finish, CLK26CALI = 0x81
  115. [EMI] PCDDR3 DRAM Clock = 1600012 KHz, MEMPLL MODE = 2
  116. [EMI] PCDDR3 RXTDN Calibration:
  117. Start REXTDN SW calibration...
  118. drvp=0xB,drvn=0x9
  119. [EMI] pinmux = 4
  120. ===============================================================================
  121.  
  122. dramc_write_leveling_swcal
  123. ===============================================================================
  124. delay byte0 byte1 byte2 byte3
  125. -----------------------------
  126. 0 0 0 0 0
  127. 1 0 0 0 1
  128. 2 0 0 1 1
  129. 3 0 0 1 1
  130. 4 0 1 1 1
  131. 5 0 1 1 1
  132. 6 0 1 1 1
  133. 7 0 1 1 1
  134. 8 0 1 1 1
  135. 9 0 1 1 1
  136. 10 1 1 1 1
  137. 11 1 1 1 1
  138. 12 1 1 1 1
  139. 13 1 1 1 1
  140. 14 1 1 1 1
  141. 15 1 1 1 1
  142. pass bytecount = 4
  143. byte_i status best delay
  144. 0 2 10
  145. 1 2 4
  146. 2 2 2
  147. 3 2 1
  148. ========================================
  149. [write leveling]DQS: 0x124A, DQM: 0x124A
  150. [write leveling after remap]DQ byte0 reg: 0x200 val: 0xAAAA4444
  151. [write leveling after remap]DQ byte1 reg: 0x204 val: 0x4444AAAA
  152. [write leveling after remap]DQ byte2 reg: 0x208 val: 0x22221111
  153. [write leveling after remap]DQ byte3 reg: 0x20C val: 0x11112222
  154. =============================================
  155. X-axis: DQS Gating Window Delay (Fine Scale)
  156. Y-axis: DQS Gating Window Delay (Coarse Scale)
  157. =============================================
  158. 0 8 16 24 32 40 48 56 64 72 80 88 96 104 112 120
  159. --------------------------------------------------------------------------------
  160. 0000:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  161. 0001:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  162. 0002:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  163. 0003:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  164. 0004:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  165. 0005:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  166. 0006:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  167. 0007:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  168. 0008:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  169. 0009:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  170. 000A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  171. 000B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  172. 000C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  173. 000D:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  174. 000E:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  175. 000F:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  176. 0010:| 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1
  177. 0011:| 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
  178. 0012:| 0 0 0 1 1 1 1 1 1 1 1 1 1 0 0 0
  179. 0013:| 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
  180. 0014:| 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0
  181. 0015:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  182. 0016:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  183. 0017:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  184. 0018:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  185. 0019:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  186. 001A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  187. 001B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  188. 001C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  189. 001D:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  190. 001E:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  191. 001F:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
  192. Rank 0 coarse tune value selection : 18, 18
  193. 18
  194. 64
  195. rank 0 coarse = 18
  196. rank 0 fine = 64
  197. 00:| 0 0 0 0 0 0 0 0 1 1 1 0
  198. opt_dle value:13
  199. ==================================================================
  200. RX DQS perbit delay software calibration
  201. ==================================================================
  202. 1.0-31 bit dq delay value
  203. ==================================================================
  204. bit| 0 1 2 3 4 5 6 7 8 9
  205. --------------------------------------
  206. 0 | 0 0 0 0 0 0 0 0 0 0
  207. 10 | 0 0 0 0 0 0 0 0 0 0
  208. 20 | 0 0 0 0 0 0 0 0 0 0
  209. 30 | 0 0
  210. --------------------------------------
  211. ==================================================================
  212. 2.dqs window
  213. x=pass dqs delay value (min~max)center
  214. y=0-7bit DQ of every group
  215. input delay:DQS0 =48 DQS1 = 37 DQS2 =47 DQS3 = 42
  216. ==================================================================
  217. bit DQS0 bit DQS1 bit DQS2 bit DQS3
  218. 0 (20~66)43 8 (7~54)30 16 (20~63)41 24 (19~56)37
  219. 1 (20~67)43 9 (9~54)31 17 (20~64)42 25 (15~58)36
  220. 2 (21~67)44 10 (11~58)34 18 (21~66)43 26 (19~62)40
  221. 3 (20~64)42 11 (11~60)35 19 (19~64)41 27 (19~60)39
  222. 4 (23~72)47 12 (16~58)37 20 (23~69)46 28 (21~64)42
  223. 5 (20~65)42 13 (13~58)35 21 (22~66)44 29 (19~58)38
  224. 6 (25~66)45 14 (12~58)35 22 (22~64)43 30 (15~59)37
  225. 7 (27~70)48 15 (15~60)37 23 (25~70)47 31 (19~63)41
  226. ==================================================================
  227. 3.dq delay value last
  228. ==================================================================
  229. bit| 0 1 2 3 4 5 6 7 8 9
  230. --------------------------------------
  231. 0 | 5 5 4 6 1 6 3 0 7 6
  232. 10 | 3 2 0 2 2 0 6 5 4 6
  233. 20 | 1 3 4 0 5 6 2 3 0 4
  234. 30 | 5 1
  235. ==================================================================
  236. *DQIDLY1 = 0x6040505
  237. *DQIDLY2 = 0x30601
  238. *DQIDLY3 = 0x2030607
  239. *DQIDLY4 = 0x20200
  240. *DQIDLY5 = 0x6040506
  241. *DQIDLY6 = 0x40301
  242. *DQIDLY7 = 0x3020605
  243. *DQIDLY8 = 0x1050400
  244. *DRAMC_R0DELDLY = 0x2A2F2530
  245.  
  246. [MEM]CONA:F3A2,conf1:F07486A3
  247. DM4BitMux = 1
  248. DQSO 0 in TX per-bit = 2 <= DQSO 0 in WL = 10
  249. DQSO 1 in TX per-bit = 0 <= DQSO 1 in WL = 4
  250. [Warning] DQSO 2 in TX per-bit = 8 > DQSO 2 in WL = 2
  251. [Warning] DQSO 3 in TX per-bit = 6 > DQSO 3 in WL = 1
  252. Tx DQM dly = 0x17A
  253. Tx DQM dly bit4 = 0x0
  254. DRAMC_DQODLY1=8AAA7887h
  255. DRAMC_DQODLY2=7876CABAh
  256. DRAMC_DQODLY3=1202011h
  257. DRAMC_DQODLY4=10003113h
  258. Tx DQ dly bit4 = 0x0
  259. Tx DQS dly = 0x684A
  260. Tx DQS dly bit4 = 0x0
  261. TX Byte0: DQ - 14, DQS - 16. win_sum= 29
  262. TX Byte1: DQ - 18, DQS - 13. win_sum= 30
  263. TX Byte2: DQ - 8, DQS - 22. win_sum= 29
  264. TX Byte3: DQ - 9, DQS - 20. win_sum= 28
  265. DRAMC calibration takes 652006985 CPU cycles
  266.  
  267. [EMI] DRAMC calibration passed
  268.  
  269. [MEM] complex R/W mem test pass
  270. 0:dram_rank_size:80000000
  271. [Dram_Buffer] dram size:-2147483648
  272. [Dram_Buffer] structure size: 1725560
  273. [Dram_Buffer] MAX_TEE_DRAM_SIZE: 0
  274. Boot from eMMC!!
  275. [PLFM] Init Boot Device: OK(0)
  276.  
  277. [PART] blksz: 512B
  278. [PART] [0x0000000000000000-0x000000000003FFFF] "PRELOADER" (512 blocks)
  279. [PART] [0x0000000000000000-0x000000000003FFFF] "MBR" (512 blocks)
  280. [PART] [0x0000000000040000-0x00000000000BFFFF] "UBOOT" (1024 blocks)
  281. [PART] [0x00000000000C0000-0x00000000000FFFFF] "CONFIG" (512 blocks)
  282. [PART] [0x0000000000100000-0x000000000013FFFF] "FACTORY" (512 blocks)
  283. [PART] [0x0000000000140000-0x000000000213FFFF] "BOOTIMG" (65536 blocks)
  284. [PART] [0x0000000002140000-0x000000000413FFFF] "RECOVERY" (65536 blocks)
  285. [PART] [0x0000000004140000-0x000000004413FFFF] "ROOTFS" (2097152 blocks)
  286. [PART] [0x0000000044140000-0x000001FFC413FFFF] "USER" (-4194304 blocks)
  287. [platform_vusb_on] PASS
  288. [TOOL] PMIC not dectect usb cable!
  289. [TOOL] <UART> listen ended, receive size:0!
  290. [TOOL] <UART> wait sync time 150ms->5ms
  291. [TOOL] <UART> receieved data: ()
  292.  
  293. Device APC domain init setup:
  294.  
  295. bootloader load uboot ,the address of uboot is 81E00000
  296. [PART]partition name UBOOT
  297. [PART]partition start block 0x200
  298. [PART]partition size 0x80000
  299. [PART]partition blks 0x400
  300. [PART]partition flags 0x0
  301. [PART]partition name 0x8
  302. [bean] part->startblk(0x200) bdev->blksz(0x200) part->part_id(8) hdr(0xFFB50000)
  303. [BlkDev.c 101 ]partition block size 0x200 ,blks:0xE90000
  304. [BlkDev.c 101 ]partition block erase size 0x200
  305.  
  306. [PART] load "UBOOT" from 0x0000000000050000 (dev) to 0x81E00000 (mem) [SUCCESS]
  307. [PART] load speed: 12487KB/s, 524288 bytes, 41ms
  308. [BT_SD_PG] device info 0x8590 0x8A00 0xCB01 0x102
  309. 0:dram_rank_size:80000000
  310. [PLFM] md_type[0] = 0
  311. [PLFM] md_type[1] = 0
  312.  
  313. [PLFM] boot reason: 4
  314. [PLFM] boot mode: 0
  315. [PLFM] META COM0: 0
  316. [PLFM] <0xFFB7CC10>: 0x0
  317. [PLFM] boot time: 2040ms
  318. [PLFM] DDR reserve mode: enable = 0, success = 0
  319.  
  320. [BLDR] jump to 0x81E00000
  321. [BLDR] <0x81E00000>=0xEA00000F
  322. [BLDR] <0x81E00004>=0xE59FF014
  323.  
  324.  
  325. U-Boot 2014.04-rc1 (Mar 29 2018 - 10:31:10)
  326.  
  327. ================== Iverson debug. ===========================
  328. g_nr_bank = 1.
  329. g_total_rank_size = 0x80000000
  330. DRAM: 2 GiB
  331. WARNING: Caches not enabled
  332. Boot From SD(id:1)
  333.  
  334. dev_num = 1
  335. raise: Signal # 8 caught
  336. raise: Signal # 8 caught
  337. ***size=4096, offset=1536, blk_start=0, blk_cnt=0
  338. *** Warning - bad CRC, using default environment
  339.  
  340. In: serial
  341. Out: serial
  342. Err: serial
  343. Boot From SD(id:1)
  344.  
  345. dev_num = 1
  346. raise: Signal # 8 caught
  347. raise: Signal # 8 caught
  348. ***size=4096, offset=1536, blk_start=0, blk_cnt=0
  349. *** Warning - bad CRC, using default environment
  350.  
  351. bootargs = board=bpi-r2 earlyprintk console=tty1 fbcon=map:0 console=ttyS0,115200 vmalloc=496M debug=7 initcall_debug=0 root=/dev/mmcblk0p2 rootfstype=ext4 rootwait
  352. Net: mtk_eth
  353. Uip activated
  354. *** U-Boot Boot Menu *** Press UP/DOWN to move, ENTER to select 1. System Load Linux to SDRAM via TFTP. 2. System Load Linux Kernel then write to Flash via TFTP. 3. Boot Linux from SD. 4. System Load Boot Loader then write to Flash via TFTP. 5. System Load Linux Kernel then write to Flash via Serial. 6. System Load Boot Loader then write to Flash via Serial. 7. Boot system code via Flash. U-Boot console Hit any key to stop autoboot: 3  2  1  0 BPI: SD/eMMC SD=1 eMMC=0 id = 1 (drivers/mmc/mediatek/mtk_mmc.c)
  355. __mmc_init ret = 1
  356. No MMC card found
  357. ** Bad device mmc 1 **
  358. Boot from eMMC
  359. BPI: SD/eMMC SD=1 eMMC=0 id = 0 (drivers/mmc/mediatek/mtk_mmc.c)
  360. __mmc_init ret = 0
  361. ret2 = 1
  362. ret2 = 1
  363. BPI: g_mtk_mmc_block.dev = 0
  364. <= [mmc1 block 0] =>
  365. [0x00000000] 45 4d 4d 43 5f 42 4f 4f
  366. [0x00000008] 54 00 00 00 01 00 00 00
  367. [0x00000010] 00 02 00 00 ff ff ff ff
  368. [0x00000018] ff ff ff ff ff ff ff ff
  369. [0x00000020] ff ff ff ff ff ff ff ff
  370. [0x00000028] ff ff ff ff ff ff ff ff
  371. [0x00000030] ff ff ff ff ff ff ff ff
  372. [0x00000038] ff ff ff ff ff ff ff ff
  373. [0x00000040] ff ff ff ff ff ff ff ff
  374. [0x00000048] ff ff ff ff ff ff ff ff
  375. [0x00000050] ff ff ff ff ff ff ff ff
  376. [0x00000058] ff ff ff ff ff ff ff ff
  377. [0x00000060] ff ff ff ff ff ff ff ff
  378. [0x00000068] ff ff ff ff ff ff ff ff
  379. [0x00000070] ff ff ff ff ff ff ff ff
  380. [0x00000078] ff ff ff ff ff ff ff ff
  381. [0x00000080] ff ff ff ff ff ff ff ff
  382. [0x00000088] ff ff ff ff ff ff ff ff
  383. [0x00000090] ff ff ff ff ff ff ff ff
  384. [0x00000098] ff ff ff ff ff ff ff ff
  385. [0x000000a0] ff ff ff ff ff ff ff ff
  386. [0x000000a8] ff ff ff ff ff ff ff ff
  387. [0x000000b0] ff ff ff ff ff ff ff ff
  388. [0x000000b8] ff ff ff ff ff ff ff ff
  389. [0x000000c0] ff ff ff ff ff ff ff ff
  390. [0x000000c8] ff ff ff ff ff ff ff ff
  391. [0x000000d0] ff ff ff ff ff ff ff ff
  392. [0x000000d8] ff ff ff ff ff ff ff ff
  393. [0x000000e0] ff ff ff ff ff ff ff ff
  394. [0x000000e8] ff ff ff ff ff ff ff ff
  395. [0x000000f0] ff ff ff ff ff ff ff ff
  396. [0x000000f8] ff ff ff ff ff ff ff ff
  397. [0x00000100] ff ff ff ff ff ff ff ff
  398. [0x00000108] ff ff ff ff ff ff ff ff
  399. [0x00000110] ff ff ff ff ff ff ff ff
  400. [0x00000118] ff ff ff ff ff ff ff ff
  401. [0x00000120] ff ff ff ff ff ff ff ff
  402. [0x00000128] ff ff ff ff ff ff ff ff
  403. [0x00000130] ff ff ff ff ff ff ff ff
  404. [0x00000138] ff ff ff ff ff ff ff ff
  405. [0x00000140] ff ff ff ff ff ff ff ff
  406. [0x00000148] ff ff ff ff ff ff ff ff
  407. [0x00000150] ff ff ff ff ff ff ff ff
  408. [0x00000158] ff ff ff ff ff ff ff ff
  409. [0x00000160] ff ff ff ff ff ff ff ff
  410. [0x00000168] ff ff ff ff ff ff ff ff
  411. [0x00000170] ff ff ff ff ff ff ff ff
  412. [0x00000178] ff ff ff ff ff ff ff ff
  413. [0x00000180] ff ff ff ff ff ff ff ff
  414. [0x00000188] ff ff ff ff ff ff ff ff
  415. [0x00000190] ff ff ff ff ff ff ff ff
  416. [0x00000198] ff ff ff ff ff ff ff ff
  417. [0x000001a0] ff ff ff ff ff ff ff ff
  418. [0x000001a8] ff ff ff ff ff ff ff ff
  419. [0x000001b0] ff ff ff ff ff ff ff ff
  420. [0x000001b8] ff ff ff ff ff ff ff ff
  421. [0x000001c0] ff ff ff ff ff ff ff ff
  422. [0x000001c8] ff ff ff ff ff ff ff ff
  423. [0x000001d0] ff ff ff ff ff ff ff ff
  424. [0x000001d8] ff ff ff ff ff ff ff ff
  425. [0x000001e0] ff ff ff ff ff ff ff ff
  426. [0x000001e8] ff ff ff ff ff ff ff ff
  427. [0x000001f0] ff ff ff ff ff ff ff ff
  428. [0x000001f8] ff ff ff ff ff ff ff ff
  429. ## Unknown partition table
  430. mmc0 is available
  431. ** Bad device size - mmc 0 **
  432. ** Bad device size - mmc 0 **
  433. ## Error: "uenvcmd" not defined
  434. ** Bad device size - mmc 0 **
  435. bootm flag=0, states=70f
  436. Wrong Image Format for bootm command
  437. ERROR: can't get kernel image!
  438. bootm flag=0, states=70f
  439. Wrong Image Format for bootm command
  440. ERROR: can't get kernel image!
  441. BPI-IoT>
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