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  1. #pragma code_seg("C766")
  2. #pragma data_seg("D766")
  3. #pragma bss_seg("B766")
  4. #pragma const_seg("K766")
  5. #pragma comment(linker, "/merge:D766=766")
  6. #pragma comment(linker, "/merge:C766=766")
  7. #pragma comment(linker, "/merge:B766=766")
  8. #pragma comment(linker, "/merge:K766=766")
  9. /***************************************************************************************
  10.  
  11. Heavy Unit
  12. Kaneko/Taito 1988
  13.  
  14. Driver based on djboy.c / airbustr.c
  15.  
  16. This game runs on Kaneko hardware. The game is similar to R-Type.
  17.  
  18. PCB Layout
  19. ----------
  20. M6100391A
  21. M6100392A 880210204
  22. KNA-001
  23. |----------------------------------------------------|
  24. | |
  25. | 6116 6116 |
  26. | 15Mhz 6116 |
  27. | PAL |
  28. | B73_09.2P B73_11.5P |
  29. | |
  30. | |
  31. | Z80-1 DSW1 DSW2 J|
  32. | A|
  33. | 16MHz M|
  34. | M|
  35. | 12MHz 6264 MERMAID A|
  36. | B73_05.1H |
  37. | B73_04.1F B73_08.2F 6116 Z80-2 |
  38. | B73_03.1D Z80-3 B73_12.7E |
  39. | B73_02.1C B73_07.2C PANDORA B73_10.5C 6116 |
  40. | B73_01.1B B73_06.2B 4164 4164 6264 PAL YM3014 |
  41. | 4164 4164 PAL YM2203 |
  42. |----------------------------------------------------|
  43.  
  44. Notes:
  45. Z80-1 clock : 6.000MHz
  46. Z80-2 clock : 6.000MHz
  47. Z80-3 clock : 6.000MHz
  48. YM2203 clock : 3.000MHz
  49. VSync : 58Hz
  50. HSync : 15.59kHz
  51. \-\ : KANEKO 1988. DIP40 8751 MCU
  52. MERMAID | : pin 18,19 = 6.000MHz (main clock)
  53. | : pin 30 = 1.000MHz (prog/ale)
  54. /-/ : pin 22 = 111.48Hz (port 2 bit 1)
  55.  
  56. PANDORA : KANEKO PX79480FP-3 PANDORA-CHIP (C) KANEKO 1988
  57.  
  58.  
  59. ***************************************************************************************/
  60.  
  61. #include "driver.h"
  62. #include "vidhrdw/generic.h"
  63. #include "cpu/z80/z80.h"
  64. /* #include "cpu/i8051/i8051.h" */
  65.  
  66.  
  67. static struct tilemap *bg_tilemap;
  68. UINT16 hvyunit_scrollx, hvyunit_scrolly, port0_data;
  69. static flip_screen;
  70. UINT8 *hvyunit_videoram, *hvyunit_colorram;
  71. WRITE_HANDLER( hvyunit_scrollx_w );
  72. WRITE_HANDLER( hvyunit_scrolly_w );
  73. WRITE_HANDLER( hvyunit_videoram_w );
  74. WRITE_HANDLER( hvyunit_colorram_w );
  75. WRITE_HANDLER ( pandora_spriteram_w );
  76. READ_HANDLER( pandora_spriteram_r );
  77. VIDEO_START( hvyunit );
  78. VIDEO_UPDATE( hvyunit );
  79. VIDEO_EOF( hvyunit );
  80.  
  81. // pandora draw
  82. void pandora_start(UINT8 region, int x, int y);
  83. void pandora_update(struct mame_bitmap *bitmap, const struct rectangle *cliprect);
  84. void pandora_eof();
  85. void pandora_set_clear_bitmap(int clear);
  86. void pandora_set_bg_pen( int pen );
  87. UINT8* pandora_spriteram;
  88. UINT8 pandora_region;
  89. static struct mame_bitmap *pandora_sprites_bitmap; /* bitmap to render sprites to, Pandora seems to be frame'buffered' */
  90. int pandora_bg_pen; // might work some other way..
  91. int pandora_clear_bitmap;
  92. int pandora_xoffset, pandora_yoffset;
  93.  
  94. /* Mermaid */
  95. /*
  96. static UINT8 data_to_mermaid;
  97. static UINT8 data_to_z80;
  98. static UINT8 mermaid_to_z80_full;
  99. static UINT8 z80_to_mermaid_full;
  100. static UINT8 mermaid_int0_l;
  101. static UINT8 mermaid_p[4];
  102. */
  103.  
  104. static UINT8 *sharedram;
  105.  
  106. static READ_HANDLER( sharedram_r )
  107. {
  108. return sharedram[offset];
  109. }
  110.  
  111. static WRITE_HANDLER( sharedram_w )
  112. {
  113. sharedram[offset] = data;
  114. }
  115.  
  116. /*
  117. Prot sim added https://github.com/arcadez2003/mame/commit/30584f00175271ec14e8171b0507069638b69350
  118. */
  119. static UINT8 mcu_data;
  120. static UINT8 test_mcu;
  121. static UINT8 mcu_ram_mux[0x100];
  122. static struct
  123. {
  124. int attract_timer;
  125. UINT8 program_flow;
  126. UINT8 access_ram_r,access_ram_w;
  127. UINT8 internal_ram[0x80];
  128. UINT8 internal_ram_index;
  129. UINT8 coin_counter;
  130. }mcu_ram;
  131.  
  132. static MACHINE_INIT( mermaid )
  133. {
  134. /* ticks for the attract mode. */
  135. mcu_ram.attract_timer = 0;
  136. /*
  137. helper for the program flow.
  138. 0 = title screen
  139. 1 = demo mode
  140. 2 = ranking
  141. 3 = Push 1p button
  142. 4 = Push 1p AND/OR 2p button
  143. 5 = player 1 plays
  144. 6 = player 2 plays
  145. 7 = service mode
  146. 8 = game over screen
  147. ...
  148. */
  149. mcu_ram.program_flow = 0;
  150. if(readinputport(3) & 4) //service mode
  151. mcu_ram.program_flow = 7;
  152. mcu_ram.coin_counter = 0;
  153. }
  154.  
  155. static WRITE_HANDLER( mermaid_data_w )
  156. {
  157. // printf("%02x\n",data);
  158. if(mcu_ram.access_ram_w)
  159. {
  160. mcu_ram.internal_ram[(mcu_ram.internal_ram_index++)&0x7f] = data;
  161. mcu_ram.access_ram_w = 0;
  162. }
  163. else
  164. {
  165. mcu_data = data;
  166. mcu_ram_mux[data] = 0;
  167. if(data == 0)
  168. {
  169. /*next data will be an internal protection RAM write*/
  170. mcu_ram.access_ram_w = 1;
  171. }
  172. }
  173. }
  174.  
  175. static READ_HANDLER( mermaid_data_r )
  176. {
  177. static UINT8 res;
  178.  
  179. if(keyboard_pressed(KEYCODE_Z))
  180. test_mcu++;
  181.  
  182. if(keyboard_pressed(KEYCODE_X))
  183. test_mcu--;
  184.  
  185. if(mcu_ram.access_ram_r)
  186. {
  187. mcu_ram.access_ram_r = 0;
  188. return mcu_ram.internal_ram[(mcu_ram.internal_ram_index++)&0x7f];
  189. }
  190.  
  191. // popmessage("%02x",test_mcu);
  192.  
  193. switch(mcu_data)
  194. {
  195. /*
  196. pc=55f1
  197. store internal mcu ram values, not yet handled.
  198. */
  199. case 0:
  200. {
  201. /*next data will be an internal protection RAM read*/
  202. mcu_ram.access_ram_r = 1;
  203. return 0;
  204. }
  205. /*
  206. (PC=4f20) 01 $e003 = val
  207. (PC=4f2b) 01 $e004 = val
  208. (PC=4f5c) 01 val > 0xa and e06f = val coin counter (5)
  209. 0 = title screen
  210. 4 = "push 1p button"
  211. 5 = "push 2p button"
  212. 6 = copyright Kaneko msg (what is for?)
  213. 7 = ranking
  214. 8 = (trigger) attract mode
  215. b = (trigger?) player 1 plays
  216. c = (trigger?) player 2 plays
  217. 0x10 = game over screen
  218. 0x80 = coin error! msg
  219. (PC=4f82) 01 val<<=1 and check if < 0 program flow (6)
  220. (PC=4ef3) 01 $e06c = val, (complement it and AND $3)
  221. (PC=4f13) 01 $e06d = $e06e = val
  222. (PC=4f13) 01
  223. (PC=14b3) 01
  224. (PC=14ca) 81
  225. */
  226. case 1:
  227. {
  228. switch(mcu_ram_mux[1])
  229. {
  230. case 0:
  231. res = readinputport(0);
  232. /*TODO: state of the button. */
  233. if(~res & 1 && (mcu_ram.program_flow == 3 || mcu_ram.program_flow == 4))
  234. {
  235. mcu_ram.coin_counter--;
  236. mcu_ram.program_flow = 5;
  237. }
  238. if(~res & 4 || ~res & 8)
  239. {
  240. mcu_ram.coin_counter++;
  241. mcu_ram.program_flow = (mcu_ram.coin_counter > 1) ? 4 : 3;
  242. }
  243. break;
  244. case 1: res = readinputport(1); break;
  245. case 2: res = readinputport(2); break;
  246. case 3: res = readinputport(3); break;
  247. case 4: res = readinputport(4); break;
  248. case 5:
  249. res = mcu_ram.coin_counter;
  250. break;
  251. case 6:
  252. /* WRONG! just as a test. */
  253. res = 0;
  254. if(mcu_ram.program_flow == 0)
  255. {
  256. mcu_ram.attract_timer++;
  257. usrintf_showmessage("flow--0 %d",mcu_ram.attract_timer);
  258. if(mcu_ram.attract_timer > 600 && mcu_ram.program_flow == 0) { res = 8; mcu_ram.attract_timer = 0; mcu_ram.program_flow = 1; }
  259. }
  260. if(mcu_ram.program_flow == 1) //demo mode
  261. {
  262. mcu_ram.attract_timer++;
  263. usrintf_showmessage("flow==1 %d",mcu_ram.attract_timer);
  264. if(mcu_ram.attract_timer > 200 && mcu_ram.program_flow == 1) { res = 0;/*input_port_read(space->machine, "TEST");*/ mcu_ram.attract_timer = 0; mcu_ram.program_flow = 0; }
  265. }
  266. if(mcu_ram.program_flow == 3)
  267. res = 4;
  268. if(mcu_ram.program_flow == 4)
  269. res = 5;
  270. if(res == 0xb && mcu_ram.program_flow == 5)
  271. res = 0;
  272. else if(mcu_ram.program_flow == 5)
  273. res = 0xb;
  274. break;
  275. }
  276. //printf("(PC=%04x) %02x %02x\n",cpu_get_pc(space->cpu),mcu_data,res);
  277.  
  278. mcu_ram_mux[1]++;
  279. if(mcu_ram_mux[1] > 6) { mcu_ram_mux[1] = 0; }
  280. return res;
  281. }
  282. /*
  283. (PC=4fbe) 03 ? (Is it read?)
  284. */
  285. case 3: return rand();
  286. /*
  287. (PC=4e4d) 06 complement and put it to e06a
  288. (PC=4e59) 06 $e019 = val
  289. (PC=4f5c) 06 $e06f = val if NOT > 09
  290. (PC=4f82) 06 val<<=1 and check if < 0
  291. */
  292. // case 6: return 0;
  293. /*
  294. pc=5621 put the value to e003 (and 8)
  295. pc=562f put the value to e004 (and 4)
  296. */
  297. /* read back dsw. */
  298. case 0xff: return 0;
  299. }
  300. if(activecpu_get_pc() != 0x4ee1 && activecpu_get_pc() != 0x4e3b &&
  301. activecpu_get_pc() != 0x14ca && activecpu_get_pc() != 0x14b3 &&
  302. activecpu_get_pc() != 0x550b && activecpu_get_pc() != 0x551e &&
  303. activecpu_get_pc() != 0x5590)
  304. printf("(PC=%04x) %02x\n",activecpu_get_pc(),mcu_data);
  305.  
  306. return 0;
  307. }
  308.  
  309.  
  310. /*
  311. ---- x--- MCU status
  312. ---- -x-- ?
  313. */
  314. static READ_HANDLER( mermaid_status_r )
  315. {
  316. static UINT8 unk_bit,mcu_status = 8;
  317. // printf("R St\n");
  318.  
  319. unk_bit^=4;
  320. mcu_status^=8;
  321.  
  322. return mcu_status | unk_bit | 0x10;
  323. // return mame_rand(space->machine);
  324. }
  325.  
  326.  
  327. /*************************************
  328. *
  329. * Master CPU handlers
  330. *
  331. *************************************/
  332.  
  333. /*
  334. * video hardware for Heavy Unit
  335. */
  336.  
  337. void pandora_set_clear_bitmap(int clear)
  338. {
  339. pandora_clear_bitmap = clear;
  340. }
  341.  
  342. void pandora_update(struct mame_bitmap *bitmap, const struct rectangle *cliprect)
  343. {
  344. if (!pandora_sprites_bitmap)
  345. {
  346. printf("ERROR: pandora_update with no pandora_sprites_bitmap\n");
  347. return;
  348. }
  349.  
  350. copybitmap(bitmap,pandora_sprites_bitmap,0,0,0,0,cliprect,TRANSPARENCY_PEN,0);
  351. }
  352.  
  353.  
  354. void pandora_draw(struct mame_bitmap *bitmap, const struct rectangle *cliprect)
  355. {
  356.  
  357. int sx=0, sy=0, x=0, y=0, offs;
  358.  
  359.  
  360. /*
  361. * Sprite Tile Format
  362. * ------------------
  363. *
  364. * Byte | Bit(s) | Use
  365. * -----+-76543210-+----------------
  366. * 0-2 | -------- | unused
  367. * 3 | xxxx.... | Palette Bank
  368. * 3 | .......x | XPos - Sign Bit
  369. * 3 | ......x. | YPos - Sign Bit
  370. * 3 | .....x.. | Use Relative offsets
  371. * 4 | xxxxxxxx | XPos
  372. * 5 | xxxxxxxx | YPos
  373. * 6 | xxxxxxxx | Sprite Number (low 8 bits)
  374. * 7 | ....xxxx | Sprite Number (high 4 bits)
  375. * 7 | x....... | Flip Sprite Y-Axis
  376. * 7 | .x...... | Flip Sprite X-Axis
  377. */
  378.  
  379. for (offs = 0;offs < 0x1000;offs += 8)
  380. {
  381. int dx = pandora_spriteram[offs+4];
  382. int dy = pandora_spriteram[offs+5];
  383. int tilecolour = pandora_spriteram[offs+3];
  384. int attr = pandora_spriteram[offs+7];
  385. int flipx = attr & 0x80;
  386. int flipy = (attr & 0x40) << 1;
  387. int tile = ((attr & 0x3f) << 8) + (pandora_spriteram[offs+6] & 0xff);
  388.  
  389. if (tilecolour & 1) dx |= 0x100;
  390. if (tilecolour & 2) dy |= 0x100;
  391.  
  392. if (tilecolour & 4)
  393. {
  394. x += dx;
  395. y += dy;
  396. }
  397. else
  398. {
  399. x = dx;
  400. y = dy;
  401. }
  402.  
  403. if (flip_screen)
  404. {
  405. sx = 240 - x;
  406. sy = 240 - y;
  407. flipx = !flipx;
  408. flipy = !flipy;
  409. }
  410. else
  411. {
  412. sx = x;
  413. sy = y;
  414. }
  415.  
  416. /* global offset */
  417. sx+=pandora_xoffset;
  418. sy+=pandora_yoffset;
  419.  
  420. sx &=0x1ff;
  421. sy &=0x1ff;
  422.  
  423. if (sx&0x100) sx-=0x200;
  424. if (sy&0x100) sy-=0x200;
  425.  
  426. drawgfx(bitmap,Machine->gfx[pandora_region],
  427. tile,
  428. (tilecolour & 0xf0) >> 4,
  429. flipx, flipy,
  430. sx,sy,
  431. &Machine->visible_area,TRANSPARENCY_PEN,0);
  432. }
  433. }
  434.  
  435. void pandora_eof()
  436. {
  437. struct rectangle clip;
  438.  
  439. /* draw top of screen */
  440. clip.min_x = Machine->visible_area.min_x;
  441. clip.max_x = Machine->visible_area.max_x;
  442. clip.min_y = Machine->visible_area.min_y;
  443. clip.max_y = Machine->visible_area.max_y;
  444.  
  445. if (!pandora_spriteram)
  446. {
  447. printf("ERROR: pandora_eof with no pandora_spriteram\n");
  448. return;
  449. }
  450.  
  451. // the games can disable the clearing of the sprite bitmap, to leave sprite trails
  452. if (pandora_clear_bitmap) fillbitmap(pandora_sprites_bitmap,pandora_bg_pen,&clip);
  453.  
  454. pandora_draw(pandora_sprites_bitmap, &clip);
  455. }
  456.  
  457. void pandora_start(UINT8 region, int x, int y)
  458. {
  459. pandora_region = region;
  460. pandora_xoffset = x;
  461. pandora_yoffset = y;
  462. pandora_bg_pen = 0;
  463. pandora_spriteram = auto_malloc(0x1000);
  464. memset(pandora_spriteram,0x00, 0x1000);
  465.  
  466. pandora_sprites_bitmap = auto_bitmap_alloc(Machine->drv->screen_width,Machine->drv->screen_height);
  467. pandora_clear_bitmap = 1;
  468. }
  469.  
  470.  
  471. WRITE_HANDLER ( pandora_spriteram_w )
  472. {
  473. // it's either hooked up oddly on this, or on the 16-bit games
  474. // either way, we swap the address lines so that the spriteram is in the same format
  475. offset = BITSWAP16(offset, 15,14,13,12, 11, 7,6,5,4,3,2,1,0, 10,9,8 );
  476.  
  477. if (!pandora_spriteram)
  478. {
  479. printf("ERROR: pandora_spriteram_w with no pandora_spriteram\n");
  480. return;
  481. }
  482.  
  483. if (offset>=0x1000)
  484. {
  485. logerror("pandora_spriteram_w write past spriteram, offset %04x %02x\n",offset,data);
  486. return;
  487. }
  488. pandora_spriteram[offset] = data;
  489. }
  490.  
  491. READ_HANDLER( pandora_spriteram_r )
  492. {
  493. // it's either hooked up oddly on this, or ont the 16-bit games
  494. // either way, we swap the address lines so that the spriteram is in the same format
  495. offset = BITSWAP16(offset, 15,14,13,12, 11, 7,6,5,4,3,2,1,0, 10,9,8 );
  496.  
  497. if (!pandora_spriteram)
  498. {
  499. printf("ERROR: pandora_spriteram_r with no pandora_spriteram\n");
  500. return 0x00;
  501. }
  502.  
  503. if (offset>=0x1000)
  504. {
  505. logerror("pandora_spriteram_r read past spriteram, offset %04x\n",offset );
  506. return 0x00;
  507. }
  508. return pandora_spriteram[offset];
  509. }
  510.  
  511. WRITE_HANDLER( hvyunit_videoram_w )
  512. {
  513. if( hvyunit_videoram[offset] != data)
  514. {
  515. hvyunit_videoram[offset] = data;
  516. tilemap_mark_tile_dirty( bg_tilemap, offset);
  517. }
  518. }
  519.  
  520. WRITE_HANDLER( hvyunit_colorram_w )
  521. {
  522. if( hvyunit_colorram[offset] != data)
  523. {
  524. hvyunit_colorram[offset] = data;
  525. tilemap_mark_tile_dirty( bg_tilemap, offset);
  526. }
  527. }
  528.  
  529. WRITE_HANDLER( hvyunit_scrollx_w)
  530. {
  531. hvyunit_scrollx=data;
  532. }
  533.  
  534. WRITE_HANDLER( hvyunit_scrolly_w)
  535. {
  536. hvyunit_scrolly=data;
  537. }
  538.  
  539. static void get_bg_tile_info(int tile_index)
  540. {
  541. int attr = hvyunit_colorram[tile_index];
  542. int code = hvyunit_videoram[tile_index] + ((attr & 0x0f) << 8);
  543. int color = (attr >> 4);
  544.  
  545. SET_TILE_INFO(1, code, color, 0);
  546. }
  547.  
  548. VIDEO_START( hvyunit )
  549. {
  550. bg_tilemap = tilemap_create(get_bg_tile_info, tilemap_scan_rows, TILEMAP_OPAQUE, 16, 16, 32, 32);
  551.  
  552. if(!bg_tilemap)
  553. return 1;
  554.  
  555. pandora_start(0,0,0);
  556.  
  557. return 0;
  558.  
  559. }
  560.  
  561. VIDEO_UPDATE( hvyunit )
  562. {
  563. /*
  564. #define SX_POS 96
  565. #define SY_POS 0
  566. */
  567.  
  568. /* prot sim values are different */
  569.  
  570. #define SX_POS 152
  571. #define SY_POS 258
  572. tilemap_set_scrollx(bg_tilemap, 0, ((port0_data & 0x40) << 2) + hvyunit_scrollx + SX_POS); // TODO
  573. tilemap_set_scrolly(bg_tilemap, 0, ((port0_data & 0x80) << 1) + hvyunit_scrolly + SY_POS); // TODO
  574. fillbitmap(bitmap,get_black_pen(),cliprect);
  575. tilemap_draw(bitmap, cliprect, bg_tilemap, 0, 0);
  576. pandora_draw( bitmap, cliprect );
  577.  
  578. flip_screen = 0; //hvyunit_vidreg & 0x10;
  579. }
  580.  
  581. VIDEO_EOF( hvyunit )
  582. {
  583. pandora_eof();
  584. }
  585.  
  586.  
  587. static WRITE_HANDLER( trigger_nmi_on_slave_cpu )
  588. {
  589. cpu_set_nmi_line(1, PULSE_LINE);
  590. }
  591.  
  592.  
  593. static WRITE_HANDLER( master_bankswitch_w )
  594. {
  595. // unsigned char *ROM = memory_region(REGION_CPU1);
  596. // int bank = data & 7;
  597. //ROM = &ROM[0x4000 * bank];
  598. //memory_set_bankptr(1, ROM);
  599.  
  600. unsigned char *RAM = memory_region(REGION_CPU1);
  601. int bank = data & 7;
  602.  
  603. if (bank & ~7) logerror("CPU#0 PC %06X - ROM bank unknown bits: %02X\n", activecpu_get_pc(), data);
  604.  
  605. RAM = &RAM[0x4000 * bank];
  606. cpu_setbank(1, RAM);
  607.  
  608.  
  609. }
  610.  
  611. /*
  612. static WRITE8_HANDLER( mermaid_data_w )
  613. {
  614. data_to_mermaid = data;
  615. z80_to_mermaid_full = 1;
  616. mermaid_int0_l = 0;
  617. cpunum_set_input_line(3, I8051_INT0_LINE, ASSERT_LINE);
  618. }
  619.  
  620. static READ8_HANDLER( mermaid_data_r )
  621. {
  622. mermaid_to_z80_full = 0;
  623. return data_to_z80;
  624. }
  625.  
  626. static READ8_HANDLER( mermaid_status_r )
  627. {
  628. return (!mermaid_to_z80_full << 2) | (z80_to_mermaid_full << 3);
  629. }
  630.  
  631. */
  632. /*************************************
  633. *
  634. * Slave CPU handlers
  635. *
  636. *************************************/
  637.  
  638. static WRITE_HANDLER( trigger_nmi_on_sound_cpu2 )
  639. {
  640. soundlatch_w(0, data);
  641. cpu_set_nmi_line(2, PULSE_LINE);
  642. }
  643.  
  644. static WRITE_HANDLER( slave_bankswitch_w )
  645. {
  646. // unsigned char *ROM = memory_region(REGION_CPU2);
  647. // int bank = (data & 0x03);
  648. // port0_data = data;
  649. // ROM = &ROM[0x4000 * bank];
  650. // memory_set_bankptr(2, ROM);
  651.  
  652. unsigned char *RAM = memory_region(REGION_CPU2);
  653. int bank = data & 0x03;
  654. port0_data = data;
  655.  
  656. if (bank & ~0x03) logerror("CPU#1 PC %06X - ROM bank unknown bits: %02X\n", activecpu_get_pc(), data);
  657.  
  658. RAM = &RAM[0x4000 * bank];
  659. cpu_setbank(2, RAM);
  660. }
  661.  
  662. /*
  663. static WRITE8_HANDLER( coin_count_w )
  664. {
  665. coin_counter_w(0, data & 1);
  666. coin_counter_w(1, data & 2);
  667. }
  668. */
  669.  
  670. /*************************************
  671. *
  672. * Sound CPU handlers
  673. *
  674. *************************************/
  675.  
  676. static WRITE_HANDLER( sound_bankswitch_w )
  677. {
  678. //unsigned char *ROM = memory_region(REGION_CPU3);
  679. //int bank = data & 0x3;
  680. //ROM = &ROM[0x4000 * bank];
  681. //memory_set_bankptr(3, ROM);
  682.  
  683. unsigned char *RAM = memory_region(REGION_CPU3);
  684. int bank = data & 0x03;
  685.  
  686. if (bank & ~0x03) logerror("CPU#2 PC %06X - ROM bank unknown bits: %02X\n", activecpu_get_pc(), data);
  687.  
  688. RAM = &RAM[0x4000 * bank];
  689. cpu_setbank(3, RAM);
  690.  
  691.  
  692. }
  693.  
  694.  
  695. /*************************************
  696. *
  697. * Protection MCU handlers
  698. *
  699. *************************************/
  700. /*
  701. static READ8_HANDLER( mermaid_p0_r )
  702. {
  703. // ?
  704. return 0;
  705. }
  706.  
  707. static WRITE8_HANDLER( mermaid_p0_w )
  708. {
  709. if (!BIT(mermaid_p[0], 1) && BIT(data, 1))
  710. {
  711. mermaid_to_z80_full = 1;
  712. data_to_z80 = mermaid_p[1];
  713. }
  714.  
  715. if (BIT(data, 0) == 1)
  716. z80_to_mermaid_full = 0;
  717.  
  718. mermaid_p[0] = data;
  719. }
  720.  
  721. static READ8_HANDLER( mermaid_p1_r )
  722. {
  723. if (BIT(mermaid_p[0], 0) == 0)
  724. return data_to_mermaid;
  725. else
  726. return 0; // ?
  727. }
  728.  
  729. static WRITE8_HANDLER( mermaid_p1_w )
  730. {
  731. if (data == 0xff)
  732. {
  733. mermaid_int0_l = 1;
  734. cpunum_set_input_line(3, I8051_INT0_LINE, CLEAR_LINE);
  735. }
  736.  
  737. mermaid_p[1] = data;
  738. }
  739.  
  740. static READ8_HANDLER( mermaid_p2_r )
  741. {
  742.  
  743. switch ((mermaid_p[0] >> 2) & 3)
  744. {
  745. case 0: return readinputportbytag("IN1");
  746. case 1: return readinputportbytag("IN2");
  747. case 2: return readinputportbytag("IN0");
  748. default: return 0xff;
  749. }
  750. }
  751.  
  752. static WRITE8_HANDLER( mermaid_p2_w )
  753. {
  754. mermaid_p[2] = data;
  755. }
  756.  
  757. static READ8_HANDLER( mermaid_p3_r )
  758. {
  759. UINT8 dsw = 0;
  760. UINT8 dsw1 = readinputportbytag("DSW1");
  761. UINT8 dsw2 = readinputportbytag("DSW2");
  762.  
  763. switch ((mermaid_p[0] >> 5) & 3)
  764. {
  765. case 0: dsw = (BIT(dsw2, 4) << 3) | (BIT(dsw2, 0) << 2) | (BIT(dsw1, 4) << 1) | BIT(dsw1, 0); break;
  766. case 1: dsw = (BIT(dsw2, 5) << 3) | (BIT(dsw2, 1) << 2) | (BIT(dsw1, 5) << 1) | BIT(dsw1, 1); break;
  767. case 2: dsw = (BIT(dsw2, 6) << 3) | (BIT(dsw2, 2) << 2) | (BIT(dsw1, 6) << 1) | BIT(dsw1, 2); break;
  768. case 3: dsw = (BIT(dsw2, 7) << 3) | (BIT(dsw2, 3) << 2) | (BIT(dsw1, 7) << 1) | BIT(dsw1, 3); break;
  769. }
  770.  
  771. return (dsw << 4) | (mermaid_int0_l << 2) | (mermaid_to_z80_full << 3);
  772. }
  773.  
  774. static WRITE8_HANDLER( mermaid_p3_w )
  775. {
  776. mermaid_p[3] = data;
  777. cpunum_set_input_line(1, INPUT_LINE_RESET, data & 2 ? CLEAR_LINE : ASSERT_LINE);
  778. }
  779. */
  780. /*************************************
  781. *
  782. * Memory maps
  783. *
  784. *************************************/
  785.  
  786. /*
  787. static ADDRESS_MAP_START( master_memory, ADDRESS_SPACE_PROGRAM, 8 )
  788. AM_RANGE(0x0000, 0x7fff) AM_ROM
  789. AM_RANGE(0x8000, 0xbfff) AM_READ(MRA8_BANK1)
  790. AM_RANGE(0xc000, 0xcfff) AM_READWRITE(hvyunit_spriteram_r, hvyunit_spriteram_w) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
  791. AM_RANGE(0xd000, 0xdfff) AM_RAM
  792. /*
  793. See https://github.com/arcadez2003/mame/commit/a86ab2c9826d44d21c85aa03e8a088f835980845
  794. During the attract the sprites stick on screen and the game does a romcheck
  795. you can start a game but it will randomly crash with the same error.
  796. this is similar to what the above fix was meant to sort but only on level 5.2
  797. */
  798. /* AM_RANGE(0xe000, 0xffff) AM_RAM AM_SHARE(1) */
  799.  
  800. /*
  801. This is the sharedram hookup prior to the above fix it's the same
  802. as DJ Boy more or less but if i use it there are no sprites on screen
  803. the game doesn't reset though.
  804.  
  805. Again though the game should have been playable up until level 5.2
  806. so something is defo off here maybe related to the banking.??
  807. */
  808. /*
  809. AM_RANGE(0xe000, 0xefff) AM_RAM AM_SHARE(1)
  810. AM_RANGE(0xf000, 0xffff) AM_RAM
  811. ADDRESS_MAP_END
  812.  
  813.  
  814. static ADDRESS_MAP_START( master_io, ADDRESS_SPACE_IO, 8 )
  815. ADDRESS_MAP_FLAGS( AMEF_ABITS(8) )
  816. AM_RANGE(0x00, 0x00) AM_WRITE(master_bankswitch_w)
  817. /*
  818. See https://github.com/arcadez2003/mame/commit/80ab5034f35f3ce7c84b6355f754672cd2a97018
  819. The prot sim only handles the attract mode the game cannot be played this fix
  820. was so that enemy sprites appear on screen during the attract mode.
  821.  
  822. the problem im getting is linked to this as im missing some sprites
  823. on the attract mode and the game then crashes i've not got far enough
  824. into the game to check if the sprites are also missing as it crashes
  825. on level 1.
  826.  
  827. If i disable 0x01 banking in FBN i get the exact same issue so maybe
  828. the the 0x01 address range is not getting accessed by the port map
  829. again liekly banking related maybe.
  830.  
  831. AM_RANGE(0x01, 0x01) AM_WRITE(master_bankswitch_w)
  832. AM_RANGE(0x02, 0x02) AM_WRITE(trigger_nmi_on_slave_cpu)
  833. ADDRESS_MAP_END
  834.  
  835.  
  836.  
  837. static ADDRESS_MAP_START( slave_memory, ADDRESS_SPACE_PROGRAM, 8 )
  838. AM_RANGE(0x0000, 0x7fff) AM_ROM
  839. AM_RANGE(0x8000, 0xbfff) AM_READ(MRA8_BANK2)
  840. AM_RANGE(0xc000, 0xc3ff) AM_RAM AM_WRITE(hvyunit_videoram_w) AM_BASE(&videoram)
  841. AM_RANGE(0xc400, 0xc7ff) AM_RAM AM_WRITE(hvyunit_colorram_w) AM_BASE(&colorram)
  842. AM_RANGE(0xd000, 0xd1ff) AM_RAM AM_WRITE(paletteram_xxxxRRRRGGGGBBBB_split2_w) AM_BASE(&paletteram_2)
  843. AM_RANGE(0xd800, 0xd9ff) AM_RAM AM_WRITE(paletteram_xxxxRRRRGGGGBBBB_split1_w) AM_BASE(&paletteram)
  844. AM_RANGE(0xd000, 0xdfff) AM_RAM
  845. // AM_RANGE(0xe000, 0xffff) AM_RAM AM_SHARE(1)
  846. AM_RANGE(0xe000, 0xefff) AM_RAM AM_SHARE(1)
  847. AM_RANGE(0xf000, 0xffff) AM_RAM
  848. ADDRESS_MAP_END
  849.  
  850. static ADDRESS_MAP_START( slave_io, ADDRESS_SPACE_IO, 8 )
  851. ADDRESS_MAP_FLAGS( AMEF_ABITS(8) )
  852. AM_RANGE(0x00, 0x00) AM_WRITE(slave_bankswitch_w)
  853. AM_RANGE(0x02, 0x02) AM_WRITE(trigger_nmi_on_sound_cpu2)
  854. AM_RANGE(0x04, 0x04) AM_READWRITE(mermaid_data_r, mermaid_data_w)
  855. AM_RANGE(0x06, 0x06) AM_WRITE(hvyunit_scrolly_w)
  856. AM_RANGE(0x08, 0x08) AM_WRITE(hvyunit_scrollx_w)
  857. AM_RANGE(0x0c, 0x0c) AM_READ(mermaid_status_r)
  858. AM_RANGE(0x0e, 0x0e) AM_WRITE(coin_count_w)
  859. ADDRESS_MAP_END
  860.  
  861.  
  862. static ADDRESS_MAP_START( sound_memory, ADDRESS_SPACE_PROGRAM, 8 )
  863. AM_RANGE(0x0000, 0x7fff) AM_ROM
  864. AM_RANGE(0x8000, 0xbfff) AM_READ(MRA8_BANK3)
  865. AM_RANGE(0xc000, 0xc7ff) AM_RAM
  866. ADDRESS_MAP_END
  867.  
  868. static ADDRESS_MAP_START( sound_io, ADDRESS_SPACE_IO, 8 )
  869. ADDRESS_MAP_FLAGS( AMEF_ABITS(8) )
  870. AM_RANGE(0x00, 0x00) AM_WRITE(sound_bankswitch_w)
  871. AM_RANGE(0x02, 0x02) AM_READWRITE(YM2203_status_port_0_r, YM2203_control_port_0_w)
  872. AM_RANGE(0x03, 0x03) AM_READWRITE(YM2203_read_port_0_r, YM2203_write_port_0_w)
  873. AM_RANGE(0x04, 0x04) AM_READ(soundlatch_r)
  874. ADDRESS_MAP_END
  875.  
  876.  
  877. /* I8051 memory handlers */
  878. /*
  879. static ADDRESS_MAP_START( mcu_map, ADDRESS_SPACE_PROGRAM, 8 )
  880. AM_RANGE(0x0000, 0x0fff) AM_ROM
  881. ADDRESS_MAP_END
  882.  
  883. static ADDRESS_MAP_START( mcu_data_map, ADDRESS_SPACE_DATA, 8 )
  884. AM_RANGE(0x0000, 0x007f) AM_RAM
  885. AM_RANGE(0x0100, 0x01ff) AM_RAM /* SFR */
  886. /*
  887. ADDRESS_MAP_END
  888.  
  889.  
  890. static ADDRESS_MAP_START( mcu_io, ADDRESS_SPACE_IO, 8 )
  891. AM_RANGE(0x00, 0x00) AM_READWRITE(mermaid_p0_r, mermaid_p0_w)
  892. AM_RANGE(0x01, 0x01) AM_READWRITE(mermaid_p1_r, mermaid_p1_w)
  893. AM_RANGE(0x02, 0x02) AM_READWRITE(mermaid_p2_r, mermaid_p2_w)
  894. AM_RANGE(0x03, 0x03) AM_READWRITE(mermaid_p3_r, mermaid_p3_w)
  895. ADDRESS_MAP_END
  896. */
  897.  
  898. /*
  899. mem maps for 78 the banking and sharing is slightly different
  900. im using the hookup for DJ Boy currently, the hookup for
  901. Air Buster would be required to use the fix for level 5.2
  902. */
  903.  
  904.  
  905. static MEMORY_READ_START( master_readmem )
  906. { 0x0000, 0x7fff, MRA_ROM },
  907. { 0x8000, 0xbfff, MRA_BANK1 },
  908. { 0xc000, 0xcfff, pandora_spriteram_r },
  909. { 0xd000, 0xdfff, MRA_RAM },
  910. { 0xe000, 0xffff, sharedram_r },
  911. MEMORY_END
  912.  
  913. static MEMORY_WRITE_START( master_writemem )
  914. { 0x0000, 0x7fff, MWA_ROM },
  915. { 0x8000, 0xbfff, MWA_BANK1 }, // do we write some drivers do some dont
  916. { 0xc000, 0xcfff, pandora_spriteram_w },
  917. { 0xd000, 0xdfff, MWA_RAM },
  918. { 0xe000, 0xffff, sharedram_w, &sharedram },
  919. MEMORY_END
  920.  
  921.  
  922. static PORT_WRITE_START( master_io_writeport )
  923. MEMORY_ADDRESS_BITS(8) /* port masking 0xff which is 8_bits in 78 */
  924. { 0x00, 0x00, master_bankswitch_w },
  925. { 0x01, 0x01, master_bankswitch_w },
  926. { 0x02, 0x02, trigger_nmi_on_slave_cpu },
  927. PORT_END
  928.  
  929.  
  930. static MEMORY_READ_START( slave_readmem )
  931. { 0x0000, 0x7fff, MRA_ROM },
  932. { 0x8000, 0xbfff, MRA_BANK2 },
  933. { 0xc000, 0xc3ff, MRA_RAM },
  934. { 0xc400, 0xc7ff, MRA_RAM },
  935. { 0xd000, 0xd1ff, MRA_RAM },
  936. { 0xd800, 0xd9ff, MRA_RAM },
  937. { 0xd000, 0xdfff, MRA_RAM },
  938. { 0xe000, 0xffff, sharedram_r },
  939. MEMORY_END
  940.  
  941. static MEMORY_WRITE_START( slave_writemem )
  942. { 0x0000, 0x7fff, MWA_ROM },
  943. { 0x8000, 0xbfff, MWA_BANK2 }, // do we write some drivers do some dont
  944. { 0xc000, 0xc3ff, hvyunit_videoram_w, &hvyunit_videoram },
  945. { 0xc400, 0xc7ff, hvyunit_colorram_w, &hvyunit_colorram },
  946. { 0xd000, 0xd1ff, paletteram_xxxxRRRRGGGGBBBB_split2_w, &paletteram_2 },
  947. { 0xd800, 0xd9ff, paletteram_xxxxRRRRGGGGBBBB_split1_w, &paletteram },
  948. { 0xd000, 0xdfff, MWA_RAM },
  949. { 0xe000, 0xffff, sharedram_w, &sharedram },
  950. MEMORY_END
  951.  
  952. static PORT_READ_START( slave_io_readport )
  953. MEMORY_ADDRESS_BITS(8) /* port masking 0xff which is 8_bits in 78 */
  954. { 0x04, 0x04, mermaid_data_r },
  955. { 0x0c, 0x0c, mermaid_status_r },
  956. PORT_END
  957.  
  958. static PORT_WRITE_START( slave_io_writeport )
  959. MEMORY_ADDRESS_BITS(8) /* port masking 0xff which is 8_bits in 78 */
  960. { 0x00, 0x00, slave_bankswitch_w },
  961. { 0x02, 0x02, trigger_nmi_on_sound_cpu2 },
  962. { 0x04, 0x04, mermaid_data_w },
  963. { 0x06, 0x06, hvyunit_scrolly_w },
  964. { 0x08, 0x08, hvyunit_scrollx_w },
  965. // { 0x0e, 0x0e, MWA_RAM }, //coin counter
  966. PORT_END
  967.  
  968. static MEMORY_READ_START( sound_readmem )
  969. { 0x0000, 0x7fff, MRA_ROM },
  970. { 0x8000, 0xbfff, MRA_BANK3 },
  971. { 0xc000, 0xc7ff, MRA_RAM },
  972. MEMORY_END
  973.  
  974. static MEMORY_WRITE_START( sound_writemem )
  975. { 0x0000, 0x7fff, MWA_ROM },
  976. { 0x8000, 0xbfff, MWA_BANK3 },
  977. { 0xc000, 0xc7ff, MWA_RAM },
  978. MEMORY_END
  979.  
  980. static PORT_READ_START( sound_io_readport )
  981. MEMORY_ADDRESS_BITS(8) /* port masking 0xff which is 8_bits in 78 */
  982. { 0x02, 0x02, YM2203_status_port_0_r },
  983. { 0x03, 0x03, YM2203_read_port_0_r },
  984. { 0x04, 0x04, soundlatch_r },
  985. PORT_END
  986.  
  987. static PORT_WRITE_START( sound_io_writeport )
  988. MEMORY_ADDRESS_BITS(8) /* port masking 0xff which is 8_bits in 78 */
  989. { 0x00, 0x00, sound_bankswitch_w },
  990. { 0x02, 0x02, YM2203_control_port_0_w },
  991. { 0x03, 0x03, YM2203_write_port_0_w },
  992. PORT_END
  993.  
  994. /*************************************
  995. *
  996. * Port definitions
  997. *
  998. *************************************/
  999. /*
  1000. INPUT_PORTS_START( hvyunit )
  1001. PORT_START_TAG("IN0")
  1002. PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START1 )
  1003. PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START2 )
  1004. PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN1 )
  1005. PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN2 )
  1006. PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
  1007. PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
  1008. PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE )
  1009. PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
  1010.  
  1011. PORT_START_TAG("IN1")
  1012. PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY )
  1013. PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY )
  1014. PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY )
  1015. PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY )
  1016. PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
  1017. PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 )
  1018. PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
  1019. PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
  1020.  
  1021. PORT_START_TAG("IN2")
  1022. PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_PLAYER2)
  1023. PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_PLAYER2)
  1024. PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_PLAYER2)
  1025. PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER2)
  1026. PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2)
  1027. PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER2)
  1028. PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
  1029. PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
  1030.  
  1031. PORT_START_TAG("DSW1")
  1032. PORT_DIPNAME( 0x01, 0x00, DEF_STR( Cabinet ) )
  1033. PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
  1034. PORT_DIPSETTING( 0x01, DEF_STR( Cocktail ) )
  1035. PORT_DIPNAME( 0x02, 0x02, DEF_STR( Flip_Screen ) )
  1036. PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
  1037. PORT_DIPSETTING( 0x00, DEF_STR( On ) )
  1038. PORT_DIPNAME( 0x04, 0x04, DEF_STR( Service_Mode ) )
  1039. PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
  1040. PORT_DIPSETTING( 0x00, DEF_STR( On ) )
  1041. PORT_DIPNAME( 0x08, 0x08, ( "Coin Mode" ) )
  1042. PORT_DIPSETTING( 0x08, ( "Mode 1" ) )
  1043. PORT_DIPSETTING( 0x00, ( "Mode 2" ) )
  1044. PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_A ) )
  1045. PORT_DIPSETTING( 0x20, DEF_STR( 2C_1C ) )
  1046. PORT_DIPSETTING( 0x30, DEF_STR( 1C_1C ) )
  1047. PORT_DIPSETTING( 0x10, DEF_STR( 1C_2C ) )
  1048. PORT_DIPSETTING( 0x00, DEF_STR( 1C_6C ) )
  1049. PORT_DIPSETTING( 0x20, DEF_STR( 2C_1C ) )
  1050. PORT_DIPSETTING( 0x30, DEF_STR( 1C_1C ) )
  1051. PORT_DIPSETTING( 0x10, DEF_STR( 1C_3C ) )
  1052. PORT_DIPSETTING( 0x00, DEF_STR( 1C_4C ) )
  1053. PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Coin_B ) )
  1054. PORT_DIPSETTING( 0x80, DEF_STR( 2C_1C ) )
  1055. PORT_DIPSETTING( 0xc0, DEF_STR( 1C_1C ) )
  1056. PORT_DIPSETTING( 0x40, DEF_STR( 1C_2C ) )
  1057. PORT_DIPSETTING( 0x00, DEF_STR( 1C_6C ) )
  1058. PORT_DIPSETTING( 0x80, DEF_STR( 2C_1C ) )
  1059. PORT_DIPSETTING( 0xc0, DEF_STR( 1C_1C ) )
  1060. PORT_DIPSETTING( 0x40, DEF_STR( 1C_3C ) )
  1061. PORT_DIPSETTING( 0x00, DEF_STR( 1C_4C ) )
  1062.  
  1063. PORT_START_TAG("DSW2")
  1064. PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) )
  1065. PORT_DIPSETTING( 0x02, "Easy" )
  1066. PORT_DIPSETTING( 0x03, "Normal" )
  1067. PORT_DIPSETTING( 0x01, "Hard" )
  1068. PORT_DIPSETTING( 0x00, "Hardest" )
  1069. PORT_DIPNAME( 0x04, 0x04, "Allow_Continue" )
  1070. PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
  1071. PORT_DIPSETTING( 0x04, DEF_STR( On ) )
  1072. PORT_DIPNAME( 0x08, 0x00, "Bonus" )
  1073. PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
  1074. PORT_DIPSETTING( 0x00, DEF_STR( On ) )
  1075. PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) )
  1076. PORT_DIPSETTING( 0x30, "3" )
  1077. PORT_DIPSETTING( 0x20, "4" )
  1078. PORT_DIPSETTING( 0x10, "5" )
  1079. PORT_DIPSETTING( 0x00, "7" )
  1080. PORT_DIPNAME( 0x40, 0x40, DEF_STR( Demo_Sounds ) )
  1081. PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
  1082. PORT_DIPSETTING( 0x40, DEF_STR( On ) )
  1083. PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unused ) )
  1084. PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
  1085. PORT_DIPSETTING( 0x00, DEF_STR( On ) )
  1086. INPUT_PORTS_END
  1087.  
  1088. INPUT_PORTS_START( hvyunitj )
  1089. PORT_START_TAG("IN0")
  1090. PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START1 )
  1091. PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START2 )
  1092. PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN1 )
  1093. PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN2 )
  1094. PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
  1095. PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
  1096. PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE )
  1097. PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
  1098.  
  1099. PORT_START_TAG("IN1")
  1100. PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY )
  1101. PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY )
  1102. PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY )
  1103. PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY )
  1104. PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
  1105. PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 )
  1106. PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
  1107. PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
  1108.  
  1109. PORT_START_TAG("IN2")
  1110. PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_PLAYER2)
  1111. PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_PLAYER2)
  1112. PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_PLAYER2)
  1113. PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER2)
  1114. PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2)
  1115. PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER2)
  1116. PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
  1117. PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
  1118.  
  1119. PORT_START_TAG("DSW1")
  1120. PORT_DIPNAME( 0x01, 0x00, DEF_STR( Cabinet ) )
  1121. PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
  1122. PORT_DIPSETTING( 0x01, DEF_STR( Cocktail ) )
  1123. PORT_DIPNAME( 0x02, 0x02, DEF_STR( Flip_Screen ) )
  1124. PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
  1125. PORT_DIPSETTING( 0x00, DEF_STR( On ) )
  1126. PORT_DIPNAME( 0x04, 0x04, DEF_STR( Service_Mode ) )
  1127. PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
  1128. PORT_DIPSETTING( 0x00, DEF_STR( On ) )
  1129. PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unused ) )
  1130. PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
  1131. PORT_DIPSETTING( 0x00, DEF_STR( On ) )
  1132. PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_A ) )
  1133. PORT_DIPSETTING( 0x10, DEF_STR( 2C_1C ) )
  1134. PORT_DIPSETTING( 0x30, DEF_STR( 1C_1C ) )
  1135. PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) )
  1136. PORT_DIPSETTING( 0x20, DEF_STR( 1C_2C ) )
  1137. PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Coin_B ) )
  1138. PORT_DIPSETTING( 0x40, DEF_STR( 2C_1C ) )
  1139. PORT_DIPSETTING( 0xc0, DEF_STR( 1C_1C ) )
  1140. PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) )
  1141. PORT_DIPSETTING( 0x80, DEF_STR( 1C_2C ) )
  1142.  
  1143. PORT_START_TAG("DSW2")
  1144. PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) )
  1145. PORT_DIPSETTING( 0x02, "Easy" )
  1146. PORT_DIPSETTING( 0x03, "Normal" )
  1147. PORT_DIPSETTING( 0x01, "Hard" )
  1148. PORT_DIPSETTING( 0x00, "Hardest" )
  1149. PORT_DIPNAME( 0x04, 0x04, "Allow_Continue" )
  1150. PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
  1151. PORT_DIPSETTING( 0x04, DEF_STR( On ) )
  1152. PORT_DIPNAME( 0x08, 0x00, "Bonus" )
  1153. PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
  1154. PORT_DIPSETTING( 0x00, DEF_STR( On ) )
  1155. PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) )
  1156. PORT_DIPSETTING( 0x30, "3" )
  1157. PORT_DIPSETTING( 0x20, "4" )
  1158. PORT_DIPSETTING( 0x10, "5" )
  1159. PORT_DIPSETTING( 0x00, "7" )
  1160. PORT_DIPNAME( 0x40, 0x40, DEF_STR( Demo_Sounds ) )
  1161. PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
  1162. PORT_DIPSETTING( 0x40, DEF_STR( On ) )
  1163. PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unused ) )
  1164. PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
  1165. PORT_DIPSETTING( 0x00, DEF_STR( On ) )
  1166. INPUT_PORTS_END
  1167. */
  1168.  
  1169. /*
  1170. prot sim inputs
  1171. */
  1172.  
  1173. INPUT_PORTS_START( hvyunit )
  1174. PORT_START/*("IN0")*/
  1175. PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START1 )
  1176. PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START2 )
  1177. PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN1 )
  1178. PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN2 )
  1179. PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
  1180. PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
  1181. PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE )
  1182. PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
  1183.  
  1184. PORT_START/*("IN1")*/
  1185. PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY)
  1186. PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY)
  1187. PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY)
  1188. PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY)
  1189. PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
  1190. PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 )
  1191. PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
  1192. PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
  1193.  
  1194. PORT_START/*("IN2")*/
  1195. PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_PLAYER2)
  1196. PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_PLAYER2)
  1197. PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_PLAYER2)
  1198. PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER2)
  1199. PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2)
  1200. PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER2)
  1201. PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
  1202. PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
  1203.  
  1204. PORT_START/*("DSW1")*/
  1205. PORT_DIPNAME( 0x01, 0x00, DEF_STR( Cabinet ) )
  1206. PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
  1207. PORT_DIPSETTING( 0x01, DEF_STR( Cocktail ) )
  1208. PORT_DIPNAME( 0x02, 0x02, DEF_STR( Flip_Screen ))
  1209. PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
  1210. PORT_DIPSETTING( 0x00, DEF_STR( On ) )
  1211. PORT_DIPNAME( 0x04, 0x04, DEF_STR( Service_Mode ))
  1212. PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
  1213. PORT_DIPSETTING( 0x00, DEF_STR( On ) )
  1214. PORT_DIPNAME( 0x08, 0x08, ( "Coin Mode" ) )
  1215. PORT_DIPSETTING( 0x08, ( "Mode 1" ) )
  1216. PORT_DIPSETTING( 0x00, ( "Mode 2" ) )
  1217. PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_A ) )
  1218. PORT_DIPSETTING( 0x20, DEF_STR( 2C_1C ) )
  1219. PORT_DIPSETTING( 0x30, DEF_STR( 1C_1C ) )
  1220. PORT_DIPSETTING( 0x10, DEF_STR( 1C_2C ) )
  1221. PORT_DIPSETTING( 0x00, DEF_STR( 1C_6C ) )
  1222. PORT_DIPSETTING( 0x20, DEF_STR( 2C_1C ) )
  1223. PORT_DIPSETTING( 0x30, DEF_STR( 1C_1C ) )
  1224. PORT_DIPSETTING( 0x10, DEF_STR( 1C_3C ) )
  1225. PORT_DIPSETTING( 0x00, DEF_STR( 1C_4C ) )
  1226. PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Coin_B ) )
  1227. PORT_DIPSETTING( 0x80, DEF_STR( 2C_1C ) )
  1228. PORT_DIPSETTING( 0xc0, DEF_STR( 1C_1C ) )
  1229. PORT_DIPSETTING( 0x40, DEF_STR( 1C_2C ) )
  1230. PORT_DIPSETTING( 0x00, DEF_STR( 1C_6C ) )
  1231. PORT_DIPSETTING( 0x80, DEF_STR( 2C_1C ) )
  1232. PORT_DIPSETTING( 0xc0, DEF_STR( 1C_1C ) )
  1233. PORT_DIPSETTING( 0x40, DEF_STR( 1C_3C ) )
  1234. PORT_DIPSETTING( 0x00, DEF_STR( 1C_4C ) )
  1235.  
  1236. PORT_START/*("DSW2")*/
  1237. PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) )
  1238. PORT_DIPSETTING( 0x02, "Easy" )
  1239. PORT_DIPSETTING( 0x03, "Normal" )
  1240. PORT_DIPSETTING( 0x01, "Hard" )
  1241. PORT_DIPSETTING( 0x00, "Hardest" )
  1242. PORT_DIPNAME( 0x04, 0x04, "Allow_Continue" )
  1243. PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
  1244. PORT_DIPSETTING( 0x04, DEF_STR( On ) )
  1245. PORT_DIPNAME( 0x08, 0x00, "Bonus" )
  1246. PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
  1247. PORT_DIPSETTING( 0x00, DEF_STR( On ) )
  1248. PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) )
  1249. PORT_DIPSETTING( 0x30, "3" )
  1250. PORT_DIPSETTING( 0x20, "4" )
  1251. PORT_DIPSETTING( 0x10, "5" )
  1252. PORT_DIPSETTING( 0x00, "7" )
  1253. PORT_DIPNAME( 0x40, 0x40, DEF_STR( Demo_Sounds ) )
  1254. PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
  1255. PORT_DIPSETTING( 0x40, DEF_STR( On ) )
  1256. INPUT_PORTS_END
  1257.  
  1258.  
  1259. INPUT_PORTS_START( hvyunit_old )
  1260. PORT_START
  1261. PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START1 )
  1262. PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START2 )
  1263. PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN1 )
  1264. PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN2 )
  1265. PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
  1266. PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_TILT ) // copied from DJ Boy, might not
  1267. PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE )
  1268. PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
  1269. PORT_START
  1270. PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY )
  1271. PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY )
  1272. PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY )
  1273. PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY )
  1274. PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
  1275. PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 )
  1276. PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
  1277. PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
  1278. PORT_START
  1279. PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_PLAYER2 )
  1280. PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_PLAYER2 )
  1281. PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_PLAYER2 )
  1282. PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER2 )
  1283. PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2 )
  1284. PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER2 )
  1285. PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
  1286. PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
  1287. /*copied from DJ Boy, might be wrong */
  1288. PORT_START
  1289. PORT_DIPNAME( 0x01, 0x00, DEF_STR( Unknown ) )
  1290. PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
  1291. PORT_DIPSETTING( 0x01, DEF_STR( On ) )
  1292. PORT_DIPNAME( 0x02, 0x00, DEF_STR( Flip_Screen ) )
  1293. PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
  1294. PORT_DIPSETTING( 0x02, DEF_STR( On ) )
  1295. PORT_DIPNAME( 0x04, 0x00, DEF_STR( Service_Mode ) )
  1296. PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
  1297. PORT_DIPSETTING( 0x04, DEF_STR( On ) )
  1298. PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) )
  1299. PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
  1300. PORT_DIPSETTING( 0x08, DEF_STR( On ) )
  1301. PORT_DIPNAME( 0x30, 0x00, DEF_STR( Coin_A ) )
  1302. PORT_DIPSETTING( 0x20, DEF_STR( 2C_1C ) )
  1303. PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
  1304. PORT_DIPSETTING( 0x30, DEF_STR( 2C_3C ) )
  1305. PORT_DIPSETTING( 0x10, DEF_STR( 1C_2C ) )
  1306. PORT_DIPNAME( 0xc0, 0x00, DEF_STR( Coin_B ) )
  1307. PORT_DIPSETTING( 0x80, DEF_STR( 2C_1C ) )
  1308. PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
  1309. PORT_DIPSETTING( 0xc0, DEF_STR( 2C_3C ) )
  1310. PORT_DIPSETTING( 0x40, DEF_STR( 1C_2C ) )
  1311. PORT_START
  1312. PORT_DIPNAME( 0x03, 0x00, DEF_STR( Difficulty ) )
  1313. PORT_DIPSETTING( 0x01, "Easy" )
  1314. PORT_DIPSETTING( 0x00, "Normal" )
  1315. PORT_DIPSETTING( 0x02, "Hard" )
  1316. PORT_DIPSETTING( 0x03, "Hardest" )
  1317. PORT_DIPNAME( 0x0c, 0x00, "Bonus" )
  1318. PORT_DIPSETTING( 0x00, "10,30,50,70,90" )
  1319. PORT_DIPSETTING( 0x04, "10,20,30,40,50,60,70,80,90" )
  1320. PORT_DIPSETTING( 0x08, "20,50" )
  1321. PORT_DIPSETTING( 0x0c, "None" )
  1322. PORT_DIPNAME( 0x30, 0x00, DEF_STR( Lives ) )
  1323. PORT_DIPSETTING( 0x10, "3" )
  1324. PORT_DIPSETTING( 0x00, "5" )
  1325. PORT_DIPSETTING( 0x20, "7" )
  1326. PORT_DIPSETTING( 0x30, "9" )
  1327. PORT_DIPNAME( 0x40, 0x00, DEF_STR( Demo_Sounds ) )
  1328. PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
  1329. PORT_DIPSETTING( 0x00, DEF_STR( On ) )
  1330. PORT_DIPNAME( 0x80, 0x80, "Stereo Sound" )
  1331. PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
  1332. PORT_DIPSETTING( 0x00, DEF_STR( On ) )
  1333. PORT_START
  1334. PORT_DIPNAME( 0x01, 0x01, "TEST" )
  1335. PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
  1336. PORT_DIPSETTING( 0x00, DEF_STR( On ) )
  1337. PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
  1338. PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
  1339. PORT_DIPSETTING( 0x00, DEF_STR( On ) )
  1340. PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
  1341. PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
  1342. PORT_DIPSETTING( 0x00, DEF_STR( On ) )
  1343. PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
  1344. PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
  1345. PORT_DIPSETTING( 0x00, DEF_STR( On ) )
  1346. PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
  1347. PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
  1348. PORT_DIPSETTING( 0x00, DEF_STR( On ) )
  1349. PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
  1350. PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
  1351. PORT_DIPSETTING( 0x00, DEF_STR( On ) )
  1352. PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
  1353. PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
  1354. PORT_DIPSETTING( 0x00, DEF_STR( On ) )
  1355. PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
  1356. PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
  1357. PORT_DIPSETTING( 0x00, DEF_STR( On ) )
  1358. INPUT_PORTS_END
  1359.  
  1360. /*************************************
  1361. *
  1362. * Graphics definitions
  1363. *
  1364. *************************************/
  1365.  
  1366. static struct GfxLayout tile_layout =
  1367. {
  1368. 16,16,
  1369. RGN_FRAC(1,1),
  1370. 4,
  1371. { 0, 1, 2, 3 },
  1372. {
  1373. 0*4,1*4,2*4,3*4,4*4,5*4,6*4,7*4,
  1374. 8*32+0*4,8*32+1*4,8*32+2*4,8*32+3*4,8*32+4*4,8*32+5*4,8*32+6*4,8*32+7*4
  1375. },
  1376. {
  1377. 0*32,1*32,2*32,3*32,4*32,5*32,6*32,7*32,
  1378. 16*32+0*32,16*32+1*32,16*32+2*32,16*32+3*32,16*32+4*32,16*32+5*32,16*32+6*32,16*32+7*32
  1379. },
  1380. 4*8*32
  1381. };
  1382.  
  1383. static struct GfxDecodeInfo hvyunit_gfxdecodeinfo[] =
  1384. {
  1385. { REGION_GFX1, 0, &tile_layout, 0x100, 16 }, /* sprite */
  1386. { REGION_GFX2, 0, &tile_layout, 0x000, 16 }, /* background tiles */
  1387. { -1 }
  1388. };
  1389.  
  1390.  
  1391.  
  1392. /*************************************
  1393. *
  1394. * Machine driver
  1395. *
  1396. *************************************/
  1397. /*
  1398. static MACHINE_INIT( hvyunit )
  1399. {
  1400. mermaid_int0_l = 1;
  1401. mermaid_to_z80_full = 0;
  1402. z80_to_mermaid_full = 0;
  1403. }
  1404. */
  1405.  
  1406. static INTERRUPT_GEN( hvyunit_interrupt )
  1407. {
  1408. static int addr = 0xff;
  1409. addr ^= 0x02;
  1410. cpu_set_irq_line_and_vector(0, 0, HOLD_LINE, addr);
  1411.  
  1412. }
  1413.  
  1414. static struct YM2203interface ym2203_interface =
  1415. {
  1416. 1,
  1417. 12000000/4, /* ? */
  1418. { YM2203_VOL(80,80) }, /* gain,volume */
  1419. { 0 }, /* port A read */
  1420. { 0 }, /* port B read */
  1421. { 0 }, /* port A write */
  1422. { 0 }, /* port B write */
  1423. { 0 } /* IRQ handler for YM2203 */
  1424. };
  1425.  
  1426. /*************************************
  1427. *
  1428. * Machine driver
  1429. *
  1430. *************************************/
  1431.  
  1432. static MACHINE_DRIVER_START( hvyunit )
  1433.  
  1434. MDRV_CPU_ADD(Z80,6000000)
  1435. MDRV_CPU_MEMORY(master_readmem, master_writemem)
  1436. MDRV_CPU_PORTS(0, master_io_writeport)
  1437. MDRV_CPU_VBLANK_INT(hvyunit_interrupt, 2)
  1438.  
  1439. MDRV_CPU_ADD(Z80,6000000)
  1440. MDRV_CPU_MEMORY(slave_readmem, slave_writemem)
  1441. MDRV_CPU_PORTS(slave_io_readport, slave_io_writeport)
  1442. MDRV_CPU_VBLANK_INT(irq0_line_hold, 1)
  1443.  
  1444. MDRV_CPU_ADD(Z80, 6000000)
  1445. MDRV_CPU_FLAGS(CPU_AUDIO_CPU)
  1446. MDRV_CPU_MEMORY(sound_readmem,sound_writemem)
  1447. MDRV_CPU_PORTS(sound_io_readport,sound_io_writeport)
  1448. MDRV_CPU_VBLANK_INT(irq0_line_hold, 1)
  1449. /*
  1450. MDRV_CPU_ADD(I8051, 12000000/2)
  1451. MDRV_CPU_PROGRAM_MAP(mcu_map,0)
  1452. MDRV_CPU_DATA_MAP(mcu_data_map,0)
  1453. MDRV_CPU_IO_MAP(mcu_io, 0)
  1454.  
  1455. MDRV_MACHINE_INIT(hvyunit)
  1456. */
  1457.  
  1458. /* prot sim */
  1459. MDRV_MACHINE_INIT(mermaid)
  1460.  
  1461. MDRV_FRAMES_PER_SECOND(58)
  1462. MDRV_VBLANK_DURATION(DEFAULT_REAL_60HZ_VBLANK_DURATION)
  1463. //which one game get's further on the attract with the REAL 60hz
  1464. // MDRV_VBLANK_DURATION(DEFAULT_60HZ_VBLANK_DURATION)
  1465. // bumping up the interleave to 150 can help
  1466. MDRV_INTERLEAVE(100)
  1467.  
  1468. MDRV_VIDEO_ATTRIBUTES(VIDEO_TYPE_RASTER)
  1469. MDRV_SCREEN_SIZE(256, 256)
  1470. MDRV_VISIBLE_AREA(0, 256-1, 16, 240-1)
  1471. MDRV_GFXDECODE(hvyunit_gfxdecodeinfo)
  1472. MDRV_PALETTE_LENGTH(0x800)
  1473.  
  1474. MDRV_VIDEO_START(hvyunit)
  1475. MDRV_VIDEO_UPDATE(hvyunit)
  1476. MDRV_VIDEO_EOF(hvyunit)
  1477.  
  1478. /* sound hardware */
  1479. MDRV_SOUND_ADD(YM2203, ym2203_interface)
  1480. MACHINE_DRIVER_END
  1481.  
  1482.  
  1483.  
  1484. /*************************************
  1485. *
  1486. * ROM definition(s)
  1487. *
  1488. *************************************/
  1489.  
  1490. ROM_START( hvyunit )
  1491. ROM_REGION( 0x20000, REGION_CPU1, 0 )
  1492. ROM_LOAD( "b73_10.5c", 0x00000, 0x20000, CRC(ca52210f) SHA1(346951962aa5bbad641117dbd66f035dddc7c0bf) )
  1493.  
  1494. ROM_REGION( 0x10000, REGION_CPU2, 0 )
  1495. ROM_LOAD( "b73_11.5p", 0x00000, 0x10000, CRC(cb451695) SHA1(116fd59f96a54c22fae65eea9ee5e58cb9ce5074) )
  1496.  
  1497. ROM_REGION( 0x10000, REGION_CPU3, 0 )
  1498. ROM_LOAD( "b73_12.7e", 0x000000, 0x010000, CRC(d1d24fab) SHA1(ed0312535d0b136d79aa885b9e6eea19ebde6409) )
  1499. /*
  1500. ROM_REGION( 0x1000, REGION_CPU4, 0 )
  1501. ROM_LOAD( "mermaid.bin", 0x0000, 0x0e00, CRC(88c5dd27) SHA1(5043fed7fd192891be7e4096f2c5daaae1538bc4) )
  1502. */
  1503. ROM_REGION( 0x200000, REGION_GFX1, 0 )
  1504. ROM_LOAD( "b73_08.2f", 0x000000, 0x080000, CRC(f83dd808) SHA1(09d5f1e86fad3a0d2d3ac1845103d3f2833c6793) )
  1505. ROM_LOAD( "b73_07.2c", 0x100000, 0x010000, CRC(5cffa42c) SHA1(687e047345039479b35d5099e56dbc1d57284ed9) )
  1506. ROM_LOAD( "b73_06.2b", 0x120000, 0x010000, CRC(a98e4aea) SHA1(560fef03ad818894c9c7578c6282d55b646e8129) )
  1507. ROM_LOAD( "b73_01.1b", 0x140000, 0x010000, CRC(3a8a4489) SHA1(a01d7300015f90ce6dd571ad93e7a58270a99e47) )
  1508. ROM_LOAD( "b73_02.1c", 0x160000, 0x010000, CRC(025c536c) SHA1(075e95cc39e792049ae656404e7f7440df064391) )
  1509. ROM_LOAD( "b73_03.1d", 0x180000, 0x010000, CRC(ec6020cf) SHA1(2973aa2dc3deb2f27c9f1bad07a7664bad95b3f2) )
  1510. /* 0x190000, 0x010000 no data */
  1511. ROM_LOAD( "b73_04.1f", 0x1a0000, 0x010000, CRC(f7badbb2) SHA1(d824ab4aba94d7ca02401f4f6f34213143c282ec) )
  1512. /* 0x1b0000, 0x010000 no data */
  1513. ROM_LOAD( "b73_05.1h", 0x1c0000, 0x010000, CRC(b8e829d2) SHA1(31102358500d7b58173d4f18647decf5db744416) )
  1514.  
  1515. ROM_REGION( 0x80000, REGION_GFX2, 0 )
  1516. ROM_LOAD( "b73_09.2p", 0x000000, 0x080000, CRC(537c647f) SHA1(941c0f4e251bc68e53d62e70b033a3a6c145bb7e) )
  1517. ROM_END
  1518.  
  1519. ROM_START( hvyunitj )
  1520. ROM_REGION( 0x20000, REGION_CPU1, 0 )
  1521. ROM_LOAD( "b73_30.5c", 0x00000, 0x20000, CRC(600af545) SHA1(c52b9be2bae28848ad0818c296f000a1bda4fa4f) )
  1522.  
  1523. ROM_REGION( 0x10000, REGION_CPU2, 0 )
  1524. ROM_LOAD( "b73_14.5p", 0x00000, 0x10000, CRC(0dfb51d4) SHA1(0e6f3b3d4558f12fe1b1620f57a0f4ac2065fd1a) )
  1525.  
  1526. ROM_REGION( 0x10000, REGION_CPU3, 0 )
  1527. ROM_LOAD( "b73_12.7e", 0x000000, 0x010000, CRC(d1d24fab) SHA1(ed0312535d0b136d79aa885b9e6eea19ebde6409) )
  1528. /*
  1529. ROM_REGION( 0x1000, REGION_CPU4, 0 )
  1530. ROM_LOAD( "mermaid.bin", 0x0000, 0x0e00, CRC(88c5dd27) SHA1(5043fed7fd192891be7e4096f2c5daaae1538bc4) )
  1531. */
  1532. ROM_REGION( 0x200000, REGION_GFX1, 0 ) /* note, the rom ordering on this is different to the other Japan set */
  1533. ROM_LOAD( "b73_08.2f", 0x000000, 0x080000, CRC(f83dd808) SHA1(09d5f1e86fad3a0d2d3ac1845103d3f2833c6793) )
  1534. ROM_LOAD( "b73_07.2c", 0x100000, 0x010000, CRC(5cffa42c) SHA1(687e047345039479b35d5099e56dbc1d57284ed9) )
  1535. ROM_LOAD( "b73_06.2b", 0x110000, 0x010000, CRC(a98e4aea) SHA1(560fef03ad818894c9c7578c6282d55b646e8129) )
  1536. ROM_LOAD( "b73_01.1b", 0x120000, 0x010000, CRC(3a8a4489) SHA1(a01d7300015f90ce6dd571ad93e7a58270a99e47) )
  1537. ROM_LOAD( "b73_02.1c", 0x130000, 0x010000, CRC(025c536c) SHA1(075e95cc39e792049ae656404e7f7440df064391) )
  1538. ROM_LOAD( "b73_03.1d", 0x140000, 0x010000, CRC(ec6020cf) SHA1(2973aa2dc3deb2f27c9f1bad07a7664bad95b3f2) )
  1539. ROM_LOAD( "b73_04.1f", 0x150000, 0x010000, CRC(f7badbb2) SHA1(d824ab4aba94d7ca02401f4f6f34213143c282ec) )
  1540. ROM_LOAD( "b73_05.1h", 0x160000, 0x010000, CRC(b8e829d2) SHA1(31102358500d7b58173d4f18647decf5db744416) )
  1541.  
  1542. ROM_REGION( 0x80000, REGION_GFX2, 0 )
  1543. ROM_LOAD( "b73_09.2p", 0x000000, 0x080000, CRC(537c647f) SHA1(941c0f4e251bc68e53d62e70b033a3a6c145bb7e) )
  1544. ROM_END
  1545.  
  1546. ROM_START( hvyunitjo )
  1547. ROM_REGION( 0x20000, REGION_CPU1, 0 )
  1548. ROM_LOAD( "b73_13.5c", 0x00000, 0x20000, CRC(e2874601) SHA1(7f7f3287113b8622eb365d04135d2d9c35d70554) )
  1549.  
  1550. ROM_REGION( 0x10000, REGION_CPU2, 0 )
  1551. ROM_LOAD( "b73_14.5p", 0x00000, 0x10000, CRC(0dfb51d4) SHA1(0e6f3b3d4558f12fe1b1620f57a0f4ac2065fd1a) )
  1552.  
  1553. ROM_REGION( 0x10000, REGION_CPU3, 0 )
  1554. ROM_LOAD( "b73_12.7e", 0x000000, 0x010000, CRC(d1d24fab) SHA1(ed0312535d0b136d79aa885b9e6eea19ebde6409) )
  1555. /*
  1556. ROM_REGION( 0x1000, REGION_CPU4, 0 )
  1557. ROM_LOAD( "mermaid.bin", 0x0000, 0x0e00, CRC(88c5dd27) SHA1(5043fed7fd192891be7e4096f2c5daaae1538bc4) )
  1558. */
  1559. ROM_REGION( 0x200000, REGION_GFX1, 0 )
  1560. ROM_LOAD( "b73_08.2f", 0x000000, 0x080000, CRC(f83dd808) SHA1(09d5f1e86fad3a0d2d3ac1845103d3f2833c6793) )
  1561. ROM_LOAD( "b73_07.2c", 0x100000, 0x010000, CRC(5cffa42c) SHA1(687e047345039479b35d5099e56dbc1d57284ed9) )
  1562. ROM_LOAD( "b73_06.2b", 0x120000, 0x010000, CRC(a98e4aea) SHA1(560fef03ad818894c9c7578c6282d55b646e8129) )
  1563. ROM_LOAD( "b73_01.1b", 0x140000, 0x010000, CRC(3a8a4489) SHA1(a01d7300015f90ce6dd571ad93e7a58270a99e47) )
  1564. ROM_LOAD( "b73_02.1c", 0x160000, 0x010000, CRC(025c536c) SHA1(075e95cc39e792049ae656404e7f7440df064391) )
  1565. ROM_LOAD( "b73_03.1d", 0x180000, 0x010000, CRC(ec6020cf) SHA1(2973aa2dc3deb2f27c9f1bad07a7664bad95b3f2) )
  1566. /* 0x190000, 0x010000 no data */
  1567. ROM_LOAD( "b73_04.1f", 0x1a0000, 0x010000, CRC(f7badbb2) SHA1(d824ab4aba94d7ca02401f4f6f34213143c282ec) )
  1568. /* 0x1b0000, 0x010000 no data */
  1569. ROM_LOAD( "b73_05.1h", 0x1c0000, 0x010000, CRC(b8e829d2) SHA1(31102358500d7b58173d4f18647decf5db744416) )
  1570.  
  1571. ROM_REGION( 0x80000, REGION_GFX2, 0 )
  1572. ROM_LOAD( "b73_09.2p", 0x000000, 0x080000, CRC(537c647f) SHA1(941c0f4e251bc68e53d62e70b033a3a6c145bb7e) )
  1573. ROM_END
  1574.  
  1575. ROM_START( hvyunitu )
  1576. ROM_REGION( 0x20000, REGION_CPU1, 0 )
  1577. ROM_LOAD( "b73_34.5c", 0x00000, 0x20000, CRC(05c30a90) SHA1(97cc0ded2896e0945d790247c284e5058c28c735) )
  1578.  
  1579. ROM_REGION( 0x10000, REGION_CPU2, 0 )
  1580. ROM_LOAD( "b73_35.6p", 0x00000, 0x10000, CRC(aed1669d) SHA1(d0539261d6128fa2d58b529e8383b6d1f3ccac77) )
  1581.  
  1582. ROM_REGION( 0x10000, REGION_CPU3, 0 )
  1583. ROM_LOAD( "b73_12.7e", 0x000000, 0x010000, CRC(d1d24fab) SHA1(ed0312535d0b136d79aa885b9e6eea19ebde6409) )
  1584. /*
  1585. ROM_REGION( 0x1000, REGION_CPU4, 0 )
  1586. ROM_LOAD( "mermaid.bin", 0x0000, 0x0e00, CRC(88c5dd27) SHA1(5043fed7fd192891be7e4096f2c5daaae1538bc4) )
  1587. */
  1588. ROM_REGION( 0x200000, REGION_GFX1, 0 )
  1589. ROM_LOAD( "b73_08.2f", 0x000000, 0x080000, CRC(f83dd808) SHA1(09d5f1e86fad3a0d2d3ac1845103d3f2833c6793) )
  1590. ROM_LOAD( "b73_28.2c", 0x100000, 0x020000, CRC(a02e08d6) SHA1(72764d4e8474aaac0674fd1c20278a706da7ade2) )
  1591. ROM_LOAD( "b73_27.2b", 0x120000, 0x020000, CRC(8708f97c) SHA1(ccddc7f2fa53c5e35345c2db0520f515c512b723) )
  1592. ROM_LOAD( "b73_25.0b", 0x140000, 0x020000, CRC(2f13f81e) SHA1(9d9c1869bf582a0bc0581cdf5b65237124b9e456) ) /* the data in first half of this actually differs slightly to the other sets, a 0x22 fill is replaced by 0xff on empty tiles */
  1593. ROM_LOAD( "b73_26.0c", 0x160000, 0x010000, CRC(b8e829d2) SHA1(31102358500d7b58173d4f18647decf5db744416) ) /* == b73_05.1h, despite the different label */
  1594.  
  1595. ROM_REGION( 0x80000, REGION_GFX2, 0 )
  1596. ROM_LOAD( "b73_09.2p", 0x000000, 0x080000, CRC(537c647f) SHA1(941c0f4e251bc68e53d62e70b033a3a6c145bb7e) )
  1597. ROM_END
  1598.  
  1599.  
  1600.  
  1601. /*************************************
  1602. *
  1603. * Game driver(s)
  1604. *
  1605. *************************************/
  1606.  
  1607.  
  1608. GAME( 1988, hvyunit, 0, hvyunit, hvyunit_old, 0, ROT0, "Kaneko / Taito", "Heavy Unit (World)" )
  1609. GAME( 1988, hvyunitj, hvyunit, hvyunit, hvyunit, 0, ROT0, "Kaneko / Taito", "Heavy Unit (Japan, Newer)" )
  1610. GAME( 1988, hvyunitjo, hvyunit, hvyunit, hvyunit, 0, ROT0, "Kaneko / Taito", "Heavy Unit (Japan, Older)" )
  1611. GAME( 1988, hvyunitu, hvyunit, hvyunit, hvyunit, 0, ROT0, "Kaneko / Taito", "Heavy Unit -U.S.A. Version- (US)" )
  1612.  
  1613.  
  1614. #pragma code_seg()
  1615. #pragma data_seg()
  1616. #pragma bss_seg()
  1617. #pragma const_seg()
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