.include "m2560def.inc"
.def temp = r16
.def curr = r17
.def last_interrupt0 = r18
.def last_interrupt1 = r19
.def temp2 = r20

.cseg
.org 0x0
jmp RESET						; interrupt vector for RESET
.org INT0addr					; INT0addr is the address of EXT_INT0 (External Interrupt 0)
jmp EXT_INT0					; interrupt vector for External Interrupt 0
.org INT1addr					; INT1addr is the address of EXT_INT1 (External Interrupt 1)
jmp EXT_INT1					; interrupt vector for External Interrupt 1

RESET:
ldi temp, low(RAMEND)			; initialise stack pointer to point to the high end of SRAM
out SPL, temp
ldi temp, high(RAMEND)
out SPH, temp
ldi temp, 0b1111				; temp = 0b00001111
mov curr, temp					; copy temp to curr
out DDRC, temp					; 6~9 LEDs of Port C is set to outputs
out PORTC, temp					; 6~9 LEDs are set to ones
out DDRD, temp					; Port D is set to all inputs
out PORTD, temp
ldi temp, (2<<ISC10)|(2<<ISC00)	; The build-in constants ISC10=2 and ISC00=0 are their bit numbers in EICRA register
sts EICRA, temp					; temp = 0b00001010, so both interrupts are configured as falling edge triggered interrupts
in temp, EIMSK
ori temp, (1<<INT0)|(1<<INT1)	; INT0=0 & INT1=1
out EIMSK, temp					; Enable External Interrupts 0 and 1
sei								; Enable the global interrupt
jmp main

EXT_INT0:						; Interrupt handler for External Interrupt 0
; prologue
push temp
in temp, SREG
push temp
; sub-routine code start
mov temp2, temp
sub temp2, last_interrupt0
cpi temp2, 10
brlt epilogue0

dec curr
out PORTC, curr
mov last_interrupt0, temp
; epilogue
epilogue0:
pop temp
out SREG, temp
pop temp
reti

EXT_INT1:						; Interrupt handler for External Interrupt 1
; prologue
push temp
in temp, SREG
push temp
; sub-routine code start
mov temp2, temp
sub temp2, last_interrupt1
cpi temp2, 10
brlt epilogue1

inc curr
out PORTC, curr
mov last_interrupt1, temp
; epilogue
epilogue1:
pop temp
out SREG, temp
pop temp
reti

main:							; main does nothing but increments a counter
clr temp
clr last_interrupt0				; Clear last interrupt time for PB0
clr last_interrupt1				; Clear last interrupt time for PB1
loop: inc temp
rjmp loop						; An infinite loop must be at the end of the interrupt handler for RESET