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1
#include "am5729-beagleboneai.dts"
2
#include "bbai-pins.h"  // https://pastebin.com/vwn4m7Nf
3
4
&{/chosen} {

5
	base_dtb = "bbai-custom.dts";	// <-- name of this file goes here

6
};

7-
#define P9_11A	( 0x3400 + 4 * 203 )

7+
8-
#define P9_11B	( 0x3400 + 4 * 136 )

8+
9-
#define P9_13A	( 0x3400 + 4 * 204 )

9+
10
		pinctrl-single,pins = <

11
			DRA7XX_CORE_IOPAD( P9_13,  PIN_OUTPUT       | MUX_MODE4  ) // txd

12
			DRA7XX_CORE_IOPAD( P9_11A, PIN_INPUT_PULLUP | MUX_MODE4  ) // rxd

13
			DRA7XX_CORE_IOPAD( P9_11B, PIN_OUTPUT       | MUX_MODE15 ) // (shared pin)

14-
			DRA7XX_CORE_IOPAD( P9_13A, PIN_OUTPUT       | MUX_MODE4  ) // txd

14+
15
	};

16
};

17
18
19
// ttyS4

20
&uart5 {

21
	status = "okay";

22
	pinctrl-names = "default";

23
	pinctrl-0 = <&uart5_pins>;

24
};

25
26
// Here's the obnoxious part: since u-boot doesn't have sane pin defaults yet, all pins not  

27
// explicitly setup above should be overridden here.  This will eventually no longer be needed.  

28
&cape_pins_default {

29
	pinctrl-single,pins = <

30
	//	DRA7XX_CORE_IOPAD( P9_11A, PIN_INPUT_PULLDOWN | MUX_MODE15 )  // note: has no gpio

31
	//	DRA7XX_CORE_IOPAD( P9_11B, PIN_INPUT          | MUX_MODE14 )

32
		DRA7XX_CORE_IOPAD( P9_12,  PIN_INPUT_PULLDOWN | MUX_MODE14 )

33-
	//	DRA7XX_CORE_IOPAD( 0x372C, PIN_INPUT_PULLDOWN | MUX_MODE15 )  // P9.11a	(no gpio)	

33+
	//	DRA7XX_CORE_IOPAD( P9_13,  PIN_INPUT_PULLDOWN | MUX_MODE15 )  // note: has no gpio

34-
	//	DRA7XX_CORE_IOPAD( 0x3620, PIN_INPUT          | MUX_MODE14 )  // P9.11b	

34+
		DRA7XX_CORE_IOPAD( P9_14,  PIN_INPUT_PULLDOWN | MUX_MODE14 )

35-
		DRA7XX_CORE_IOPAD( 0x36AC, PIN_INPUT_PULLDOWN | MUX_MODE14 )  // P9.12	

35+
		DRA7XX_CORE_IOPAD( P9_15,  PIN_INPUT_PULLDOWN | MUX_MODE14 )

36-
	//	DRA7XX_CORE_IOPAD( 0x3730, PIN_INPUT_PULLDOWN | MUX_MODE15 )  // P9.13a	(no gpio)	

36+
		DRA7XX_CORE_IOPAD( P9_16,  PIN_INPUT_PULLDOWN | MUX_MODE14 )

37-
		DRA7XX_CORE_IOPAD( 0x35AC, PIN_INPUT_PULLDOWN | MUX_MODE14 )  // P9.14	

37+
		DRA7XX_CORE_IOPAD( P9_17A, PIN_INPUT_PULLDOWN | MUX_MODE14 )

38-
		DRA7XX_CORE_IOPAD( 0x3514, PIN_INPUT_PULLDOWN | MUX_MODE14 )  // P9.15	

38+
		DRA7XX_CORE_IOPAD( P9_17B, PIN_INPUT          | MUX_MODE14 )

39-
		DRA7XX_CORE_IOPAD( 0x35B0, PIN_INPUT_PULLDOWN | MUX_MODE14 )  // P9.16	

39+
		DRA7XX_CORE_IOPAD( P9_18A, PIN_INPUT_PULLDOWN | MUX_MODE14 )

40-
		DRA7XX_CORE_IOPAD( 0x37CC, PIN_INPUT_PULLDOWN | MUX_MODE14 )  // P9.17a	

40+
		DRA7XX_CORE_IOPAD( P9_18B, PIN_INPUT          | MUX_MODE14 )

41-
		DRA7XX_CORE_IOPAD( 0x36B8, PIN_INPUT          | MUX_MODE14 )  // P9.17b	

41+
		DRA7XX_CORE_IOPAD( P9_19A, PIN_INPUT_PULLUP   | MUX_MODE14 )

42-
		DRA7XX_CORE_IOPAD( 0x37C8, PIN_INPUT_PULLDOWN | MUX_MODE14 )  // P9.18a	

42+
		DRA7XX_CORE_IOPAD( P9_19B, PIN_INPUT          | MUX_MODE14 )

43-
		DRA7XX_CORE_IOPAD( 0x36B4, PIN_INPUT          | MUX_MODE14 )  // P9.18b	

43+
		DRA7XX_CORE_IOPAD( P9_20A, PIN_INPUT_PULLUP   | MUX_MODE14 )

44-
		DRA7XX_CORE_IOPAD( 0x3440, PIN_INPUT_PULLUP   | MUX_MODE14 )  // P9.19a	

44+
		DRA7XX_CORE_IOPAD( P9_20B, PIN_INPUT          | MUX_MODE14 )

45-
		DRA7XX_CORE_IOPAD( 0x357C, PIN_INPUT          | MUX_MODE14 )  // P9.19b	

45+
		DRA7XX_CORE_IOPAD( P9_21A, PIN_INPUT_PULLDOWN | MUX_MODE14 )

46-
		DRA7XX_CORE_IOPAD( 0x3444, PIN_INPUT_PULLUP   | MUX_MODE14 )  // P9.20a	

46+
		DRA7XX_CORE_IOPAD( P9_21B, PIN_INPUT          | MUX_MODE14 )

47-
		DRA7XX_CORE_IOPAD( 0x3578, PIN_INPUT          | MUX_MODE14 )  // P9.20b	

47+
		DRA7XX_CORE_IOPAD( P9_22A, PIN_INPUT_PULLDOWN | MUX_MODE14 )

48-
		DRA7XX_CORE_IOPAD( 0x34F0, PIN_INPUT_PULLDOWN | MUX_MODE14 )  // P9.21a	

48+
		DRA7XX_CORE_IOPAD( P9_22B, PIN_INPUT          | MUX_MODE14 )

49-
		DRA7XX_CORE_IOPAD( 0x37C4, PIN_INPUT          | MUX_MODE14 )  // P9.21b	

49+
		DRA7XX_CORE_IOPAD( P9_23,  PIN_INPUT_PULLUP   | MUX_MODE14 )

50-
		DRA7XX_CORE_IOPAD( 0x369C, PIN_INPUT_PULLDOWN | MUX_MODE14 )  // P9.22a	

50+
		DRA7XX_CORE_IOPAD( P9_24,  PIN_INPUT_PULLUP   | MUX_MODE14 )

51-
		DRA7XX_CORE_IOPAD( 0x37C0, PIN_INPUT          | MUX_MODE14 )  // P9.22b	

51+
		DRA7XX_CORE_IOPAD( P9_25,  PIN_INPUT_PULLDOWN | MUX_MODE14 )

52-
		DRA7XX_CORE_IOPAD( 0x37B4, PIN_INPUT_PULLUP   | MUX_MODE14 )  // P9.23	

52+
		DRA7XX_CORE_IOPAD( P9_26A, PIN_INPUT_PULLUP   | MUX_MODE14 )

53-
		DRA7XX_CORE_IOPAD( 0x368C, PIN_INPUT_PULLUP   | MUX_MODE14 )  // P9.24	can rx

53+
		DRA7XX_CORE_IOPAD( P9_26B, PIN_INPUT          | MUX_MODE14 )

54-
		DRA7XX_CORE_IOPAD( 0x3694, PIN_INPUT_PULLDOWN | MUX_MODE14 )  // P9.25	

54+
		DRA7XX_CORE_IOPAD( P9_27A, PIN_INPUT_PULLDOWN | MUX_MODE14 )

55-
		DRA7XX_CORE_IOPAD( 0x3688, PIN_INPUT_PULLUP   | MUX_MODE14 )  // P9.26a	can tx

55+
		DRA7XX_CORE_IOPAD( P9_27B, PIN_INPUT          | MUX_MODE14 )

56-
		DRA7XX_CORE_IOPAD( 0x3544, PIN_INPUT          | MUX_MODE14 )  // P9.26b	(unused shared pin)

56+
		DRA7XX_CORE_IOPAD( P9_28,  PIN_INPUT_PULLDOWN | MUX_MODE14 )

57-
		DRA7XX_CORE_IOPAD( 0x35A0, PIN_INPUT_PULLDOWN | MUX_MODE14 )  // P9.27a	

57+
		DRA7XX_CORE_IOPAD( P9_29A, PIN_INPUT_PULLDOWN | MUX_MODE14 )

58-
		DRA7XX_CORE_IOPAD( 0x36B0, PIN_INPUT          | MUX_MODE14 )  // P9.27b	

58+
		DRA7XX_CORE_IOPAD( P9_29B, PIN_INPUT          | MUX_MODE14 )

59-
		DRA7XX_CORE_IOPAD( 0x36E0, PIN_INPUT_PULLDOWN | MUX_MODE14 )  // P9.28	

59+
		DRA7XX_CORE_IOPAD( P9_30,  PIN_INPUT_PULLDOWN | MUX_MODE14 )

60-
		DRA7XX_CORE_IOPAD( 0x36D8, PIN_INPUT_PULLDOWN | MUX_MODE14 )  // P9.29a	

60+
		DRA7XX_CORE_IOPAD( P9_31A, PIN_INPUT_PULLDOWN | MUX_MODE14 )

61-
		DRA7XX_CORE_IOPAD( 0x36A8, PIN_INPUT          | MUX_MODE14 )  // P9.29b	

61+
		DRA7XX_CORE_IOPAD( P9_31B, PIN_INPUT          | MUX_MODE14 )

62-
		DRA7XX_CORE_IOPAD( 0x36DC, PIN_INPUT_PULLDOWN | MUX_MODE14 )  // P9.30	

62+
		DRA7XX_CORE_IOPAD( P9_41A, PIN_INPUT_PULLDOWN | MUX_MODE14 )

63-
		DRA7XX_CORE_IOPAD( 0x36D4, PIN_INPUT_PULLDOWN | MUX_MODE14 )  // P9.31a	

63+
		DRA7XX_CORE_IOPAD( P9_41B, PIN_INPUT          | MUX_MODE14 )

64-
		DRA7XX_CORE_IOPAD( 0x36A4, PIN_INPUT          | MUX_MODE14 )  // P9.31b	

64+
		DRA7XX_CORE_IOPAD( P9_42A, PIN_INPUT_PULLDOWN | MUX_MODE14 )

65-
		DRA7XX_CORE_IOPAD( 0x36A0, PIN_INPUT_PULLDOWN | MUX_MODE14 )  // P9.41a	

65+
		DRA7XX_CORE_IOPAD( P9_42B, PIN_INPUT          | MUX_MODE14 )

66-
		DRA7XX_CORE_IOPAD( 0x3580, PIN_INPUT          | MUX_MODE14 )  // P9.41b	

66+
		DRA7XX_CORE_IOPAD( P8_03,  PIN_INPUT_PULLUP   | MUX_MODE14 )

67-
		DRA7XX_CORE_IOPAD( 0x36E4, PIN_INPUT_PULLDOWN | MUX_MODE14 )  // P9.42a	

67+
		DRA7XX_CORE_IOPAD( P8_04,  PIN_INPUT_PULLUP   | MUX_MODE14 )

68-
		DRA7XX_CORE_IOPAD( 0x359C, PIN_INPUT          | MUX_MODE14 )  // P9.42b	

68+
		DRA7XX_CORE_IOPAD( P8_05,  PIN_INPUT_PULLUP   | MUX_MODE14 )

69-
		DRA7XX_CORE_IOPAD( 0x379C, PIN_INPUT_PULLUP   | MUX_MODE14 )  // P8.3	

69+
		DRA7XX_CORE_IOPAD( P8_06,  PIN_INPUT_PULLUP   | MUX_MODE14 )

70-
		DRA7XX_CORE_IOPAD( 0x37A0, PIN_INPUT_PULLUP   | MUX_MODE14 )  // P8.4	

70+
		DRA7XX_CORE_IOPAD( P8_07,  PIN_INPUT_PULLDOWN | MUX_MODE14 )

71-
		DRA7XX_CORE_IOPAD( 0x378C, PIN_INPUT_PULLUP   | MUX_MODE14 )  // P8.5	

71+
		DRA7XX_CORE_IOPAD( P8_08,  PIN_INPUT_PULLDOWN | MUX_MODE14 )

72-
		DRA7XX_CORE_IOPAD( 0x3790, PIN_INPUT_PULLUP   | MUX_MODE14 )  // P8.6	

72+
		DRA7XX_CORE_IOPAD( P8_09,  PIN_INPUT_PULLDOWN | MUX_MODE14 )

73-
		DRA7XX_CORE_IOPAD( 0x36EC, PIN_INPUT_PULLDOWN | MUX_MODE14 )  // P8.7	

73+
		DRA7XX_CORE_IOPAD( P8_10,  PIN_INPUT_PULLDOWN | MUX_MODE14 )

74-
		DRA7XX_CORE_IOPAD( 0x36F0, PIN_INPUT_PULLDOWN | MUX_MODE14 )  // P8.8	

74+
		DRA7XX_CORE_IOPAD( P8_11,  PIN_INPUT_PULLDOWN | MUX_MODE14 )

75-
		DRA7XX_CORE_IOPAD( 0x3698, PIN_INPUT_PULLDOWN | MUX_MODE14 )  // P8.9	

75+
		DRA7XX_CORE_IOPAD( P8_12,  PIN_INPUT_PULLDOWN | MUX_MODE14 )

76-
		DRA7XX_CORE_IOPAD( 0x36E8, PIN_INPUT_PULLDOWN | MUX_MODE14 )  // P8.10	

76+
		DRA7XX_CORE_IOPAD( P8_13,  PIN_INPUT_PULLDOWN | MUX_MODE14 )

77-
		DRA7XX_CORE_IOPAD( 0x3510, PIN_INPUT_PULLDOWN | MUX_MODE14 )  // P8.11	

77+
		DRA7XX_CORE_IOPAD( P8_14,  PIN_INPUT_PULLDOWN | MUX_MODE14 )

78-
		DRA7XX_CORE_IOPAD( 0x350C, PIN_INPUT_PULLDOWN | MUX_MODE14 )  // P8.12	

78+
		DRA7XX_CORE_IOPAD( P8_15A, PIN_INPUT_PULLDOWN | MUX_MODE14 )

79-
		DRA7XX_CORE_IOPAD( 0x3590, PIN_INPUT_PULLDOWN | MUX_MODE14 )  // P8.13	

79+
		DRA7XX_CORE_IOPAD( P8_15B, PIN_INPUT          | MUX_MODE14 )

80-
		DRA7XX_CORE_IOPAD( 0x3598, PIN_INPUT_PULLDOWN | MUX_MODE14 )  // P8.14	

80+
		DRA7XX_CORE_IOPAD( P8_16,  PIN_INPUT_PULLDOWN | MUX_MODE14 )

81-
		DRA7XX_CORE_IOPAD( 0x3570, PIN_INPUT_PULLDOWN | MUX_MODE14 )  // P8.15a	

81+
		DRA7XX_CORE_IOPAD( P8_17,  PIN_INPUT_PULLDOWN | MUX_MODE14 )

82-
		DRA7XX_CORE_IOPAD( 0x35B4, PIN_INPUT          | MUX_MODE14 )  // P8.15b	

82+
		DRA7XX_CORE_IOPAD( P8_18,  PIN_INPUT_PULLDOWN | MUX_MODE14 )

83-
		DRA7XX_CORE_IOPAD( 0x35BC, PIN_INPUT_PULLDOWN | MUX_MODE14 )  // P8.16	

83+
		DRA7XX_CORE_IOPAD( P8_19,  PIN_INPUT_PULLDOWN | MUX_MODE14 )

84-
		DRA7XX_CORE_IOPAD( 0x3624, PIN_INPUT_PULLDOWN | MUX_MODE14 )  // P8.17	

84+
		DRA7XX_CORE_IOPAD( P8_20,  PIN_INPUT_PULLUP   | MUX_MODE14 )

85-
		DRA7XX_CORE_IOPAD( 0x3588, PIN_INPUT_PULLDOWN | MUX_MODE14 )  // P8.18	

85+
		DRA7XX_CORE_IOPAD( P8_21,  PIN_INPUT_PULLUP   | MUX_MODE14 )

86-
		DRA7XX_CORE_IOPAD( 0x358C, PIN_INPUT_PULLDOWN | MUX_MODE14 )  // P8.19	

86+
		DRA7XX_CORE_IOPAD( P8_22,  PIN_INPUT_PULLUP   | MUX_MODE14 )

87-
		DRA7XX_CORE_IOPAD( 0x3780, PIN_INPUT_PULLUP   | MUX_MODE14 )  // P8.20	

87+
		DRA7XX_CORE_IOPAD( P8_23,  PIN_INPUT_PULLUP   | MUX_MODE14 )

88-
		DRA7XX_CORE_IOPAD( 0x377C, PIN_INPUT_PULLUP   | MUX_MODE14 )  // P8.21	

88+
		DRA7XX_CORE_IOPAD( P8_24,  PIN_INPUT_PULLUP   | MUX_MODE14 )

89-
		DRA7XX_CORE_IOPAD( 0x3798, PIN_INPUT_PULLUP   | MUX_MODE14 )  // P8.22	

89+
		DRA7XX_CORE_IOPAD( P8_25,  PIN_INPUT_PULLUP   | MUX_MODE14 )

90-
		DRA7XX_CORE_IOPAD( 0x3794, PIN_INPUT_PULLUP   | MUX_MODE14 )  // P8.23	

90+
		DRA7XX_CORE_IOPAD( P8_26,  PIN_INPUT_PULLDOWN | MUX_MODE14 )

91-
		DRA7XX_CORE_IOPAD( 0x3788, PIN_INPUT_PULLUP   | MUX_MODE14 )  // P8.24	

91+
		DRA7XX_CORE_IOPAD( P8_27A, PIN_INPUT_PULLDOWN | MUX_MODE14 )

92-
		DRA7XX_CORE_IOPAD( 0x3784, PIN_INPUT_PULLUP   | MUX_MODE14 )  // P8.25	

92+
		DRA7XX_CORE_IOPAD( P8_27B, PIN_INPUT          | MUX_MODE14 )

93-
		DRA7XX_CORE_IOPAD( 0x35B8, PIN_INPUT_PULLDOWN | MUX_MODE14 )  // P8.26	

93+
		DRA7XX_CORE_IOPAD( P8_28A, PIN_INPUT_PULLDOWN | MUX_MODE14 )

94-
		DRA7XX_CORE_IOPAD( 0x35D8, PIN_INPUT_PULLDOWN | MUX_MODE14 )  // P8.27a	

94+
		DRA7XX_CORE_IOPAD( P8_28B, PIN_INPUT          | MUX_MODE14 )

95-
		DRA7XX_CORE_IOPAD( 0x3628, PIN_INPUT          | MUX_MODE14 )  // P8.27b	

95+
		DRA7XX_CORE_IOPAD( P8_29A, PIN_INPUT_PULLDOWN | MUX_MODE14 )

96-
		DRA7XX_CORE_IOPAD( 0x35C8, PIN_INPUT_PULLDOWN | MUX_MODE14 )  // P8.28a	

96+
		DRA7XX_CORE_IOPAD( P8_29B, PIN_INPUT          | MUX_MODE14 )

97-
		DRA7XX_CORE_IOPAD( 0x362C, PIN_INPUT          | MUX_MODE14 )  // P8.28b	

97+
		DRA7XX_CORE_IOPAD( P8_30A, PIN_INPUT_PULLDOWN | MUX_MODE14 )

98-
		DRA7XX_CORE_IOPAD( 0x35D4, PIN_INPUT_PULLDOWN | MUX_MODE14 )  // P8.29a	

98+
		DRA7XX_CORE_IOPAD( P8_30B, PIN_INPUT          | MUX_MODE14 )

99-
		DRA7XX_CORE_IOPAD( 0x3630, PIN_INPUT          | MUX_MODE14 )  // P8.29b	

99+
		DRA7XX_CORE_IOPAD( P8_31A, PIN_INPUT_PULLDOWN | MUX_MODE14 )

100-
		DRA7XX_CORE_IOPAD( 0x35CC, PIN_INPUT_PULLDOWN | MUX_MODE14 )  // P8.30a	

100+
		DRA7XX_CORE_IOPAD( P8_31B, PIN_INPUT_PULLDOWN | MUX_MODE15 )  // note: has no gpio

101-
		DRA7XX_CORE_IOPAD( 0x3634, PIN_INPUT          | MUX_MODE14 )  // P8.30b	

101+
		DRA7XX_CORE_IOPAD( P8_32A, PIN_INPUT_PULLDOWN | MUX_MODE14 )

102-
		DRA7XX_CORE_IOPAD( 0x3614, PIN_INPUT_PULLDOWN | MUX_MODE14 )  // P8.31a	

102+
		DRA7XX_CORE_IOPAD( P8_32B, PIN_INPUT_PULLDOWN | MUX_MODE15 )  // note: has no gpio

103-
		DRA7XX_CORE_IOPAD( 0x373C, PIN_INPUT_PULLDOWN | MUX_MODE15 )  // P8.31b	(no gpio)	

103+
		DRA7XX_CORE_IOPAD( P8_33A, PIN_INPUT_PULLDOWN | MUX_MODE14 )

104-
		DRA7XX_CORE_IOPAD( 0x3618, PIN_INPUT_PULLDOWN | MUX_MODE14 )  // P8.32a	

104+
		DRA7XX_CORE_IOPAD( P8_33B, PIN_INPUT          | MUX_MODE14 )

105-
		DRA7XX_CORE_IOPAD( 0x3740, PIN_INPUT_PULLDOWN | MUX_MODE15 )  // P8.32b	(no gpio)	

105+
		DRA7XX_CORE_IOPAD( P8_34A, PIN_INPUT_PULLDOWN | MUX_MODE14 )

106-
		DRA7XX_CORE_IOPAD( 0x3610, PIN_INPUT_PULLDOWN | MUX_MODE14 )  // P8.33a	

106+
		DRA7XX_CORE_IOPAD( P8_34B, PIN_INPUT          | MUX_MODE14 )

107-
		DRA7XX_CORE_IOPAD( 0x34E8, PIN_INPUT          | MUX_MODE14 )  // P8.33b	

107+
		DRA7XX_CORE_IOPAD( P8_35A, PIN_INPUT_PULLDOWN | MUX_MODE14 )

108-
		DRA7XX_CORE_IOPAD( 0x3608, PIN_INPUT_PULLDOWN | MUX_MODE14 )  // P8.34a	

108+
		DRA7XX_CORE_IOPAD( P8_35B, PIN_INPUT          | MUX_MODE14 )

109-
		DRA7XX_CORE_IOPAD( 0x3564, PIN_INPUT          | MUX_MODE14 )  // P8.34b	

109+
		DRA7XX_CORE_IOPAD( P8_36A, PIN_INPUT_PULLDOWN | MUX_MODE14 )

110-
		DRA7XX_CORE_IOPAD( 0x360C, PIN_INPUT_PULLDOWN | MUX_MODE14 )  // P8.35a	

110+
		DRA7XX_CORE_IOPAD( P8_36B, PIN_INPUT          | MUX_MODE14 )

111-
		DRA7XX_CORE_IOPAD( 0x34E4, PIN_INPUT          | MUX_MODE14 )  // P8.35b	

111+
		DRA7XX_CORE_IOPAD( P8_37A, PIN_INPUT_PULLDOWN | MUX_MODE14 )

112-
		DRA7XX_CORE_IOPAD( 0x3604, PIN_INPUT_PULLDOWN | MUX_MODE14 )  // P8.36a	

112+
		DRA7XX_CORE_IOPAD( P8_37B, PIN_INPUT_PULLDOWN | MUX_MODE15 )  // note: has no gpio

113-
		DRA7XX_CORE_IOPAD( 0x3568, PIN_INPUT          | MUX_MODE14 )  // P8.36b	

113+
		DRA7XX_CORE_IOPAD( P8_38A, PIN_INPUT_PULLDOWN | MUX_MODE14 )

114-
		DRA7XX_CORE_IOPAD( 0x35FC, PIN_INPUT_PULLDOWN | MUX_MODE14 )  // P8.37a	

114+
		DRA7XX_CORE_IOPAD( P8_38B, PIN_INPUT_PULLDOWN | MUX_MODE15 )  // note: has no gpio

115-
		DRA7XX_CORE_IOPAD( 0x3738, PIN_INPUT_PULLDOWN | MUX_MODE15 )  // P8.37b	(no gpio)	

115+
		DRA7XX_CORE_IOPAD( P8_39,  PIN_INPUT_PULLDOWN | MUX_MODE14 )

116-
		DRA7XX_CORE_IOPAD( 0x3600, PIN_INPUT_PULLDOWN | MUX_MODE14 )  // P8.38a	

116+
		DRA7XX_CORE_IOPAD( P8_40,  PIN_INPUT_PULLDOWN | MUX_MODE14 )

117-
		DRA7XX_CORE_IOPAD( 0x3734, PIN_INPUT_PULLDOWN | MUX_MODE15 )  // P8.38b	(no gpio)	

117+
		DRA7XX_CORE_IOPAD( P8_41,  PIN_INPUT_PULLDOWN | MUX_MODE14 )

118-
		DRA7XX_CORE_IOPAD( 0x35F4, PIN_INPUT_PULLDOWN | MUX_MODE14 )  // P8.39	

118+
		DRA7XX_CORE_IOPAD( P8_42,  PIN_INPUT_PULLDOWN | MUX_MODE14 )

119-
		DRA7XX_CORE_IOPAD( 0x35F8, PIN_INPUT_PULLDOWN | MUX_MODE14 )  // P8.40	

119+
		DRA7XX_CORE_IOPAD( P8_43,  PIN_INPUT_PULLDOWN | MUX_MODE14 )

120-
		DRA7XX_CORE_IOPAD( 0x35EC, PIN_INPUT_PULLDOWN | MUX_MODE14 )  // P8.41	

120+
		DRA7XX_CORE_IOPAD( P8_44,  PIN_INPUT_PULLDOWN | MUX_MODE14 )

121-
		DRA7XX_CORE_IOPAD( 0x35F0, PIN_INPUT_PULLDOWN | MUX_MODE14 )  // P8.42	

121+
		DRA7XX_CORE_IOPAD( P8_45A, PIN_INPUT_PULLDOWN | MUX_MODE14 )

122-
		DRA7XX_CORE_IOPAD( 0x35E4, PIN_INPUT_PULLDOWN | MUX_MODE14 )  // P8.43	

122+
		DRA7XX_CORE_IOPAD( P8_45B, PIN_INPUT          | MUX_MODE14 )

123-
		DRA7XX_CORE_IOPAD( 0x35E8, PIN_INPUT_PULLDOWN | MUX_MODE14 )  // P8.44	

123+
		DRA7XX_CORE_IOPAD( P8_46A, PIN_INPUT_PULLDOWN | MUX_MODE14 )

124-
		DRA7XX_CORE_IOPAD( 0x35DC, PIN_INPUT_PULLDOWN | MUX_MODE14 )  // P8.45a	

124+
		DRA7XX_CORE_IOPAD( P8_46B, PIN_INPUT          | MUX_MODE14 )

125-
		DRA7XX_CORE_IOPAD( 0x361C, PIN_INPUT          | MUX_MODE14 )  // P8.45b	

125+
126-
		DRA7XX_CORE_IOPAD( 0x35E0, PIN_INPUT_PULLDOWN | MUX_MODE14 )  // P8.46a	

126+
        

    


            


                                


        

            



                
    

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