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| 1 | #include <msp430.h> | |
| 2 | #include <signal.h> | |
| 3 | ||
| 4 | static volatile long count =0; | |
| 5 | ||
| 6 | static inline void init_timer_A() {
| |
| 7 | ||
| 8 | - | TACTL = TASSEL1; //set SMCLK as source - TASSELx = 10 |
| 8 | + | TACCR0 = 25000; // since clk = 1MHhz => 25us count |
| 9 | - | TACTL |= TAIE; //enabe timer_A interrupt |
| 9 | + | TACTL = TASSEL1 | MC0; |
| 10 | - | //TACCTL0 |= OUTMOD2; // Toggle mode - OUTMODx = 100 |
| 10 | + | //TACCTL0 |= OUTMOD2; / Toggle mode - OUTMODx = 100 |
| 11 | TACCTL0 |= CCIE; //enable interrupt for capture/compatre; | |
| 12 | - | TACTL |= MC0; // Set Up mode (upto TACCR0) - MCx = 01 |
| 12 | + | |
| 13 | - | TACCR0 = 25000; // since clk = 1Mhz => 25us count |
| 13 | + | |
| 14 | ||
| 15 | static inline void uart_init() {
| |
| 16 | //config uart for 9600 bps | |
| 17 | P1SEL = BIT1 + BIT2; | |
| 18 | P1SEL2 = BIT1 + BIT2; | |
| 19 | ||
| 20 | UCA0CTL1 |= UCSSEL_2; //select UCSSELx = 10 - SMCLK | |
| 21 | UCA0BR0 = 104; | |
| 22 | UCA0BR1 = 0; | |
| 23 | UCA0MCTL = UCBRS0; //modulation control. | |
| 24 | UCA0CTL1 &= ~UCSWRST; //this enables Rx and Txhardware | |
| 25 | ||
| 26 | IE2 |= UCA0RXIE; | |
| 27 | } | |
| 28 | ||
| 29 | ||
| 30 | ||
| 31 | interrupt(TIMER0_A0_VECTOR) timer_blink(void) {
| |
| 32 | //generate delay for 500ms | |
| 33 | count++; | |
| 34 | if(count >= 20) {
| |
| 35 | P1OUT ^= (BIT0 + BIT6); | |
| 36 | count = 0; | |
| 37 | } | |
| 38 | } | |
| 39 | ||
| 40 | interrupt(USCIAB0RX_VECTOR) echo(void) {
| |
| 41 | while(!(IFG2 & UCA0TXIFG)); | |
| 42 | UCA0TXBUF = UCA0RXBUF; //echo | |
| 43 | } | |
| 44 | ||
| 45 | int main(int argc, const char *argv[]) | |
| 46 | {
| |
| 47 | WDTCTL = WDTPW + WDTHOLD; | |
| 48 | ||
| 49 | P1DIR = BIT0 + BIT6; | |
| 50 | P1OUT = BIT0; | |
| 51 | ||
| 52 | if(CALBC1_1MHZ != 0xff) { //set up for 1Mhz operting freq.
| |
| 53 | DCOCTL=0; | |
| 54 | BCSCTL1 = CALBC1_1MHZ; | |
| 55 | DCOCTL = CALDCO_1MHZ; | |
| 56 | } | |
| 57 | uart_init(); | |
| 58 | init_timer_A(); | |
| 59 | eint(); | |
| 60 | LPM0; | |
| 61 | while(1) {
| |
| 62 | } | |
| 63 | return 0; | |
| 64 | } |