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OpenOCD Log 2/2

Feb 28th, 2022
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  1. Debug: 174 8 semihosting_common.c:115 semihosting_common_init():
  2. Debug: 175 8 stlink_usb.c:5055 stlink_dap_init(): stlink_dap_init()
  3. Debug: 176 8 stlink_usb.c:3685 stlink_open(): stlink_open
  4. Debug: 177 8 stlink_usb.c:3697 stlink_open(): transport: 4 vid: 0x0483 pid: 0x3744 serial:
  5. Debug: 178 8 stlink_usb.c:3697 stlink_open(): transport: 4 vid: 0x0483 pid: 0x3748 serial:
  6. Debug: 179 8 stlink_usb.c:3697 stlink_open(): transport: 4 vid: 0x0483 pid: 0x374b serial:
  7. Debug: 180 8 stlink_usb.c:3697 stlink_open(): transport: 4 vid: 0x0483 pid: 0x374d serial:
  8. Debug: 181 8 stlink_usb.c:3697 stlink_open(): transport: 4 vid: 0x0483 pid: 0x374e serial:
  9. Debug: 182 8 stlink_usb.c:3697 stlink_open(): transport: 4 vid: 0x0483 pid: 0x374f serial:
  10. Debug: 183 8 stlink_usb.c:3697 stlink_open(): transport: 4 vid: 0x0483 pid: 0x3752 serial:
  11. Debug: 184 8 stlink_usb.c:3697 stlink_open(): transport: 4 vid: 0x0483 pid: 0x3753 serial:
  12. Debug: 185 8 stlink_usb.c:3697 stlink_open(): transport: 4 vid: 0x0483 pid: 0x3754 serial:
  13. Info : 186 18 stlink_usb.c:1429 stlink_usb_version(): STLINK V3J3M2 (API v3) VID:PID 0483:374E
  14. Debug: 187 18 stlink_usb.c:1654 stlink_usb_exit_mode(): MODE: 0x01
  15. Info : 188 18 stlink_usb.c:1465 stlink_usb_check_voltage(): Target voltage: 3.278473
  16. Debug: 189 18 stlink_usb.c:1722 stlink_usb_init_mode(): MODE: 0x01
  17. Debug: 190 18 stlink_usb.c:3088 stlink_dump_speed_map(): Supported clock speeds are:
  18. Debug: 191 18 stlink_usb.c:3091 stlink_dump_speed_map(): 24000 kHz
  19. Debug: 192 18 stlink_usb.c:3091 stlink_dump_speed_map(): 8000 kHz
  20. Debug: 193 18 stlink_usb.c:3091 stlink_dump_speed_map(): 3300 kHz
  21. Debug: 194 18 stlink_usb.c:3091 stlink_dump_speed_map(): 1000 kHz
  22. Debug: 195 18 stlink_usb.c:3091 stlink_dump_speed_map(): 200 kHz
  23. Debug: 196 18 stlink_usb.c:3091 stlink_dump_speed_map(): 50 kHz
  24. Debug: 197 18 stlink_usb.c:3091 stlink_dump_speed_map(): 5 kHz
  25. Debug: 198 240 stlink_usb.c:1782 stlink_usb_init_mode(): MODE: 0x02
  26. Debug: 199 279 stlink_usb.c:4080 stlink_usb_open_ap(): AP 0 enabled
  27. Debug: 200 339 stlink_usb.c:3773 stlink_open(): Using TAR autoincrement: 1024
  28. Debug: 201 339 adapter.c:144 adapter_khz_to_speed(): convert khz to adapter specific speed value
  29. Debug: 202 339 adapter.c:148 adapter_khz_to_speed(): have adapter set up
  30. Info : 203 339 stlink_usb.c:3031 stlink_match_speed_map(): Unable to match requested speed 1800 kHz, using 1000 kHz
  31. Debug: 204 339 adapter.c:144 adapter_khz_to_speed(): convert khz to adapter specific speed value
  32. Debug: 205 339 adapter.c:148 adapter_khz_to_speed(): have adapter set up
  33. Info : 206 339 stlink_usb.c:3031 stlink_match_speed_map(): Unable to match requested speed 1800 kHz, using 1000 kHz
  34. Info : 207 339 adapter.c:108 adapter_init(): clock speed 1000 kHz
  35. Debug: 208 339 openocd.c:143 handle_init_command(): Debug Adapter init complete
  36. Debug: 209 339 command.c:166 script_debug(): command - transport init
  37. Debug: 210 339 transport.c:230 handle_transport_init(): handle_transport_init
  38. Debug: 211 339 adi_v5_dapdirect.c:184 dapdirect_init(): dapdirect_init()
  39. Debug: 212 339 stlink_usb.c:5098 stlink_dap_reset(): stlink_dap_reset(0)
  40. Debug: 213 339 core.c:634 adapter_system_reset(): SRST line released
  41. Debug: 214 441 command.c:166 script_debug(): command - dap init
  42. Debug: 215 441 arm_dap.c:107 dap_init_all(): Initializing all DAPs ...
  43. Info : 216 441 stlink_usb.c:4150 stlink_dap_op_connect(): stlink_dap_op_connect(connect)
  44. Debug: 217 441 arm_adi_v5.c:670 dap_dp_init(): stm32h7x.dap
  45. Debug: 218 441 arm_adi_v5.c:702 dap_dp_init(): DAP: wait CDBGPWRUPACK
  46. Debug: 219 441 arm_adi_v5.h:569 dap_dp_poll_register(): DAP: poll 4, mask 0x20000000, value 0x20000000
  47. Debug: 220 442 arm_adi_v5.c:710 dap_dp_init(): DAP: wait CSYSPWRUPACK
  48. Debug: 221 442 arm_adi_v5.h:569 dap_dp_poll_register(): DAP: poll 4, mask 0x80000000, value 0x80000000
  49. Debug: 222 442 stlink_usb.c:2015 stlink_usb_idcode(): IDCODE: 0x6BA02477
  50. Info : 223 442 stlink_usb.c:4177 stlink_dap_op_connect(): SWD DPIDR 0x6ba02477
  51. Debug: 224 442 openocd.c:160 handle_init_command(): Examining targets...
  52. Debug: 225 443 target.c:1847 target_call_event_callbacks(): target event 19 (examine-start) for core stm32h7x.ap2
  53. Debug: 226 443 stlink_usb.c:4080 stlink_usb_open_ap(): AP 2 enabled
  54. Debug: 227 444 arm_adi_v5.c:816 mem_ap_init(): MEM_AP Packed Transfers: disabled
  55. Debug: 228 444 arm_adi_v5.c:827 mem_ap_init(): MEM_AP CFG: large data 0, long address 0, big-endian 0
  56. Debug: 229 444 target.c:1847 target_call_event_callbacks(): target event 21 (examine-end) for core stm32h7x.ap2
  57. Debug: 230 444 target.c:1847 target_call_event_callbacks(): target event 19 (examine-start) for core stm32h7x.cpu0
  58. Debug: 231 445 arm_adi_v5.c:816 mem_ap_init(): MEM_AP Packed Transfers: disabled
  59. Debug: 232 445 arm_adi_v5.c:827 mem_ap_init(): MEM_AP CFG: large data 0, long address 0, big-endian 0
  60. Debug: 233 445 target.c:2631 target_read_u32(): address: 0xe000ed00, value: 0x411fc271
  61. Info : 234 445 cortex_m.c:2325 cortex_m_examine(): stm32h7x.cpu0: Cortex-M7 r1p1 processor detected
  62. Debug: 235 445 cortex_m.c:2341 cortex_m_examine(): cpuid: 0x411fc271
  63. Debug: 236 446 target.c:2631 target_read_u32(): address: 0xe000ef40, value: 0x10110221
  64. Debug: 237 446 target.c:2631 target_read_u32(): address: 0xe000ef44, value: 0x12000011
  65. Debug: 238 446 cortex_m.c:2361 cortex_m_examine(): Cortex-M7 floating point feature FPv5_DP found
  66. Debug: 239 447 target.c:2631 target_read_u32(): address: 0xe000edf0, value: 0x00030003
  67. Debug: 240 447 target.c:2719 target_write_u32(): address: 0xe000edfc, value: 0x01000000
  68. Debug: 241 448 target.c:2631 target_read_u32(): address: 0xe0002000, value: 0x10000081
  69. Debug: 242 448 target.c:2719 target_write_u32(): address: 0xe0002008, value: 0x00000000
  70. Debug: 243 448 target.c:2719 target_write_u32(): address: 0xe000200c, value: 0x00000000
  71. Debug: 244 449 target.c:2719 target_write_u32(): address: 0xe0002010, value: 0x00000000
  72. Debug: 245 449 target.c:2719 target_write_u32(): address: 0xe0002014, value: 0x00000000
  73. Debug: 246 450 target.c:2719 target_write_u32(): address: 0xe0002018, value: 0x00000000
  74. Debug: 247 450 target.c:2719 target_write_u32(): address: 0xe000201c, value: 0x00000000
  75. Debug: 248 451 target.c:2719 target_write_u32(): address: 0xe0002020, value: 0x00000000
  76. Debug: 249 451 target.c:2719 target_write_u32(): address: 0xe0002024, value: 0x00000000
  77. Debug: 250 452 cortex_m.c:2431 cortex_m_examine(): FPB fpcr 0x10000081, numcode 8, numlit 0
  78. Debug: 251 452 target.c:2631 target_read_u32(): address: 0xe0001000, value: 0x40000001
  79. Debug: 252 452 cortex_m.c:2165 cortex_m_dwt_setup(): DWT_CTRL: 0x40000001
  80. Debug: 253 453 target.c:2631 target_read_u32(): address: 0xe0001fbc, value: 0x00000000
  81. Debug: 254 453 cortex_m.c:2172 cortex_m_dwt_setup(): DWT_DEVARCH: 0x0
  82. Debug: 255 453 target.c:2719 target_write_u32(): address: 0xe0001028, value: 0x00000000
  83. Debug: 256 453 target.c:2719 target_write_u32(): address: 0xe0001038, value: 0x00000000
  84. Debug: 257 454 target.c:2719 target_write_u32(): address: 0xe0001048, value: 0x00000000
  85. Debug: 258 454 target.c:2719 target_write_u32(): address: 0xe0001058, value: 0x00000000
  86. Debug: 259 455 cortex_m.c:2219 cortex_m_dwt_setup(): DWT dwtcr 0x40000001, comp 4, watch/trigger
  87. Info : 260 455 cortex_m.c:2441 cortex_m_examine(): stm32h7x.cpu0: target has 8 breakpoints, 4 watchpoints
  88. Debug: 261 455 target.c:1847 target_call_event_callbacks(): target event 21 (examine-end) for core stm32h7x.cpu0
  89. Debug: 262 455 target.c:4827 target_handle_event(): target(1): stm32h7x.cpu0 (cortex_m) event: 21 (examine-end) action:
  90. # Enable D3 and D1 DBG clocks
  91. # DBGMCU_CR |= D3DBGCKEN | D1DBGCKEN
  92. stm32h7x_dbgmcu_mmw 0x004 0x00600000 0
  93.  
  94. # Enable debug during low power modes (uses more power)
  95. # DBGMCU_CR |= DBG_STANDBY | DBG_STOP | DBG_SLEEP D1 Domain
  96. stm32h7x_dbgmcu_mmw 0x004 0x00000007 0
  97. # DBGMCU_CR |= DBG_STANDBY | DBG_STOP | DBG_SLEEP D2 Domain
  98. stm32h7x_dbgmcu_mmw 0x004 0x00000038 0
  99.  
  100. # Stop watchdog counters during halt
  101. # DBGMCU_APB3FZ1 |= WWDG1
  102. stm32h7x_dbgmcu_mmw 0x034 0x00000040 0
  103. # DBGMCU_APB1LFZ1 |= WWDG2
  104. stm32h7x_dbgmcu_mmw 0x03C 0x00000800 0
  105. # DBGMCU_APB4FZ1 |= WDGLSD1 | WDGLSD2
  106. stm32h7x_dbgmcu_mmw 0x054 0x000C0000 0
  107.  
  108. # Enable clock for tracing
  109. # DBGMCU_CR |= TRACECLKEN
  110. stm32h7x_dbgmcu_mmw 0x004 0x00100000 0
  111.  
  112. # RM0399 (id 0x450) M7+M4 with SWO Funnel
  113. # RM0433 (id 0x450) M7 with SWO Funnel
  114. # RM0455 (id 0x480) M7 without SWO Funnel
  115. # RM0468 (id 0x483) M7 without SWO Funnel
  116. # Enable CM7 and CM4 slave ports in SWO trace Funnel
  117. # Works ok also on devices single core and without SWO funnel
  118. # Hack, use stm32h7x_dbgmcu_mmw with big offset to control SWTF
  119. # SWTF_CTRL |= ENS0 | ENS1
  120. stm32h7x_dbgmcu_mmw 0x3000 0x00000003 0
  121.  
  122. Debug: 263 455 command.c:166 script_debug(): command - transport select
  123. Debug: 264 455 command.c:166 script_debug(): command - expr [ string first "hla" $_TRANSPORT ] != -1
  124. Debug: 265 456 command.c:166 script_debug(): command - target current
  125. Debug: 266 456 command.c:166 script_debug(): command - expr $sep - 1
  126. Debug: 267 457 command.c:166 script_debug(): command - expr 0xE00E1000 + $reg_offset
  127. Debug: 268 458 command.c:166 script_debug(): command - stm32h7x.ap2 mem2array value 32 3759017988 1
  128. Debug: 269 458 mem_ap.c:238 mem_ap_read_memory(): Reading memory at physical address 0xe00e1004; size 4; count 1
  129. Debug: 270 459 command.c:166 script_debug(): command - expr ($old & ~$clearbits) | $setbits
  130. Debug: 271 459 command.c:166 script_debug(): command - stm32h7x.ap2 mww 3759017988 7340095
  131. Debug: 272 460 mem_ap.c:253 mem_ap_write_memory(): Writing memory at physical address 0xe00e1004; size 4; count 1
  132. Debug: 273 460 command.c:166 script_debug(): command - transport select
  133. Debug: 274 461 command.c:166 script_debug(): command - expr [ string first "hla" $_TRANSPORT ] != -1
  134. Debug: 275 461 command.c:166 script_debug(): command - target current
  135. Debug: 276 462 command.c:166 script_debug(): command - expr $sep - 1
  136. Debug: 277 462 command.c:166 script_debug(): command - expr 0xE00E1000 + $reg_offset
  137. Debug: 278 463 command.c:166 script_debug(): command - stm32h7x.ap2 mem2array value 32 3759017988 1
  138. Debug: 279 463 mem_ap.c:238 mem_ap_read_memory(): Reading memory at physical address 0xe00e1004; size 4; count 1
  139. Debug: 280 464 command.c:166 script_debug(): command - expr ($old & ~$clearbits) | $setbits
  140. Debug: 281 465 command.c:166 script_debug(): command - stm32h7x.ap2 mww 3759017988 7340095
  141. Debug: 282 465 mem_ap.c:253 mem_ap_write_memory(): Writing memory at physical address 0xe00e1004; size 4; count 1
  142. Debug: 283 466 command.c:166 script_debug(): command - transport select
  143. Debug: 284 466 command.c:166 script_debug(): command - expr [ string first "hla" $_TRANSPORT ] != -1
  144. Debug: 285 467 command.c:166 script_debug(): command - target current
  145. Debug: 286 467 command.c:166 script_debug(): command - expr $sep - 1
  146. Debug: 287 468 command.c:166 script_debug(): command - expr 0xE00E1000 + $reg_offset
  147. Debug: 288 468 command.c:166 script_debug(): command - stm32h7x.ap2 mem2array value 32 3759017988 1
  148. Debug: 289 469 mem_ap.c:238 mem_ap_read_memory(): Reading memory at physical address 0xe00e1004; size 4; count 1
  149. Debug: 290 469 command.c:166 script_debug(): command - expr ($old & ~$clearbits) | $setbits
  150. Debug: 291 470 command.c:166 script_debug(): command - stm32h7x.ap2 mww 3759017988 7340095
  151. Debug: 292 470 mem_ap.c:253 mem_ap_write_memory(): Writing memory at physical address 0xe00e1004; size 4; count 1
  152. Debug: 293 471 command.c:166 script_debug(): command - transport select
  153. Debug: 294 472 command.c:166 script_debug(): command - expr [ string first "hla" $_TRANSPORT ] != -1
  154. Debug: 295 472 command.c:166 script_debug(): command - target current
  155. Debug: 296 473 command.c:166 script_debug(): command - expr $sep - 1
  156. Debug: 297 473 command.c:166 script_debug(): command - expr 0xE00E1000 + $reg_offset
  157. Debug: 298 474 command.c:166 script_debug(): command - stm32h7x.ap2 mem2array value 32 3759018036 1
  158. Debug: 299 474 mem_ap.c:238 mem_ap_read_memory(): Reading memory at physical address 0xe00e1034; size 4; count 1
  159. Debug: 300 475 command.c:166 script_debug(): command - expr ($old & ~$clearbits) | $setbits
  160. Debug: 301 475 command.c:166 script_debug(): command - stm32h7x.ap2 mww 3759018036 64
  161. Debug: 302 476 mem_ap.c:253 mem_ap_write_memory(): Writing memory at physical address 0xe00e1034; size 4; count 1
  162. Debug: 303 476 command.c:166 script_debug(): command - transport select
  163. Debug: 304 477 command.c:166 script_debug(): command - expr [ string first "hla" $_TRANSPORT ] != -1
  164. Debug: 305 477 command.c:166 script_debug(): command - target current
  165. Debug: 306 478 command.c:166 script_debug(): command - expr $sep - 1
  166. Debug: 307 478 command.c:166 script_debug(): command - expr 0xE00E1000 + $reg_offset
  167. Debug: 308 479 command.c:166 script_debug(): command - stm32h7x.ap2 mem2array value 32 3759018044 1
  168. Debug: 309 479 mem_ap.c:238 mem_ap_read_memory(): Reading memory at physical address 0xe00e103c; size 4; count 1
  169. Debug: 310 480 command.c:166 script_debug(): command - expr ($old & ~$clearbits) | $setbits
  170. Debug: 311 481 command.c:166 script_debug(): command - stm32h7x.ap2 mww 3759018044 2048
  171. Debug: 312 481 mem_ap.c:253 mem_ap_write_memory(): Writing memory at physical address 0xe00e103c; size 4; count 1
  172. Debug: 313 482 command.c:166 script_debug(): command - transport select
  173. Debug: 314 482 command.c:166 script_debug(): command - expr [ string first "hla" $_TRANSPORT ] != -1
  174. Debug: 315 483 command.c:166 script_debug(): command - target current
  175. Debug: 316 483 command.c:166 script_debug(): command - expr $sep - 1
  176. Debug: 317 484 command.c:166 script_debug(): command - expr 0xE00E1000 + $reg_offset
  177. Debug: 318 484 command.c:166 script_debug(): command - stm32h7x.ap2 mem2array value 32 3759018068 1
  178. Debug: 319 485 mem_ap.c:238 mem_ap_read_memory(): Reading memory at physical address 0xe00e1054; size 4; count 1
  179. Debug: 320 486 command.c:166 script_debug(): command - expr ($old & ~$clearbits) | $setbits
  180. Debug: 321 486 command.c:166 script_debug(): command - stm32h7x.ap2 mww 3759018068 786432
  181. Debug: 322 487 mem_ap.c:253 mem_ap_write_memory(): Writing memory at physical address 0xe00e1054; size 4; count 1
  182. Debug: 323 487 command.c:166 script_debug(): command - transport select
  183. Debug: 324 488 command.c:166 script_debug(): command - expr [ string first "hla" $_TRANSPORT ] != -1
  184. Debug: 325 488 command.c:166 script_debug(): command - target current
  185. Debug: 326 489 command.c:166 script_debug(): command - expr $sep - 1
  186. Debug: 327 489 command.c:166 script_debug(): command - expr 0xE00E1000 + $reg_offset
  187. Debug: 328 490 command.c:166 script_debug(): command - stm32h7x.ap2 mem2array value 32 3759017988 1
  188. Debug: 329 490 mem_ap.c:238 mem_ap_read_memory(): Reading memory at physical address 0xe00e1004; size 4; count 1
  189. Debug: 330 491 command.c:166 script_debug(): command - expr ($old & ~$clearbits) | $setbits
  190. Debug: 331 491 command.c:166 script_debug(): command - stm32h7x.ap2 mww 3759017988 7340095
  191. Debug: 332 492 mem_ap.c:253 mem_ap_write_memory(): Writing memory at physical address 0xe00e1004; size 4; count 1
  192. Debug: 333 493 command.c:166 script_debug(): command - transport select
  193. Debug: 334 493 command.c:166 script_debug(): command - expr [ string first "hla" $_TRANSPORT ] != -1
  194. Debug: 335 494 command.c:166 script_debug(): command - target current
  195. Debug: 336 494 command.c:166 script_debug(): command - expr $sep - 1
  196. Debug: 337 495 command.c:166 script_debug(): command - expr 0xE00E1000 + $reg_offset
  197. Debug: 338 495 command.c:166 script_debug(): command - stm32h7x.ap2 mem2array value 32 3759030272 1
  198. Debug: 339 496 mem_ap.c:238 mem_ap_read_memory(): Reading memory at physical address 0xe00e4000; size 4; count 1
  199. Debug: 340 496 command.c:166 script_debug(): command - expr ($old & ~$clearbits) | $setbits
  200. Debug: 341 497 command.c:166 script_debug(): command - stm32h7x.ap2 mww 3759030272 771
  201. Debug: 342 498 mem_ap.c:253 mem_ap_write_memory(): Writing memory at physical address 0xe00e4000; size 4; count 1
  202. Debug: 343 498 target.c:1847 target_call_event_callbacks(): target event 19 (examine-start) for core stm32h7x.cpu1
  203. Debug: 344 499 stlink_usb.c:4080 stlink_usb_open_ap(): AP 3 enabled
  204. Debug: 345 499 arm_adi_v5.c:816 mem_ap_init(): MEM_AP Packed Transfers: disabled
  205. Debug: 346 499 arm_adi_v5.c:827 mem_ap_init(): MEM_AP CFG: large data 0, long address 0, big-endian 0
  206. Debug: 347 500 target.c:2631 target_read_u32(): address: 0xe000ed00, value: 0x23000000
  207. Error: 348 500 cortex_m.c:2319 cortex_m_examine(): Cortex-M PARTNO 0x0 is unrecognized
  208. Debug: 349 500 target.c:1847 target_call_event_callbacks(): target event 20 (examine-fail) for core stm32h7x.cpu1
  209. Warn : 350 500 target.c:806 target_examine(): target stm32h7x.cpu1 examination failed
  210. Debug: 351 500 openocd.c:162 handle_init_command(): target examination failed
  211. Debug: 352 500 command.c:166 script_debug(): command - flash init
  212. Debug: 353 501 tcl.c:1386 handle_flash_init_command(): Initializing flash devices...
  213. Debug: 354 501 command.c:166 script_debug(): command - nand init
  214. Debug: 356 501 tcl.c:498 handle_nand_init_command(): Initializing NAND devices...
  215. Debug: 357 502 command.c:166 script_debug(): command - pld init
  216. Debug: 358 502 pld.c:205 handle_pld_init_command(): Initializing PLDs...
  217. Debug: 359 502 command.c:166 script_debug(): command - tpiu init
  218. Info : 360 503 gdb_server.c:3705 gdb_target_add_one(): gdb port disabled
  219. Info : 361 503 gdb_server.c:3669 gdb_target_start(): starting gdb server for stm32h7x.cpu0 on 3333
  220. Info : 362 503 server.c:311 add_service(): Listening on port 3333 for gdb connections
  221. Info : 363 503 gdb_server.c:3669 gdb_target_start(): starting gdb server for stm32h7x.cpu1 on 3334
  222. Info : 364 503 server.c:311 add_service(): Listening on port 3334 for gdb connections
  223. Debug: 365 12760 server.c:611 sig_handler(): Terminating on Signal 2
  224. Debug: 366 12760 command.c:166 script_debug(): command - shutdown
  225. User : 367 12760 server.c:757 handle_shutdown_command(): shutdown command invoked
  226. Debug: 368 12760 mem_ap.c:77 mem_ap_deinit_target(): mem_ap_deinit_target
  227. Debug: 369 12760 target.c:2204 target_free_all_working_areas_restore(): freeing all working areas
  228. Debug: 370 12761 target.c:2204 target_free_all_working_areas_restore(): freeing all working areas
  229. Debug: 371 12761 target.c:2204 target_free_all_working_areas_restore(): freeing all working areas
  230. Debug: 372 12762 stlink_usb.c:5090 stlink_dap_quit(): stlink_dap_quit()
  231. Debug: 373 12762 stlink_usb.c:1654 stlink_usb_exit_mode(): MODE: 0x02
  232.  
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