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main.c

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Apr 13th, 2013
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  1. #define F_CPU 16000000UL
  2. #include <stdint.h>
  3. #include <avr/io.h>
  4. #include <avr/interrupt.h>
  5. #include <util/twi.h>
  6. #include <util/delay.h>
  7. #include <avr/pgmspace.h>
  8. #include "ov7670.h"
  9. /*
  10. PCLK PORTD.2
  11. HREF PORTD.3 PCINT19
  12. */
  13. volatile uint8_t wantFrame;
  14. volatile uint8_t doneImg;
  15. /*register uint8_t nerd1 asm("r16");
  16. register uint8_t nerd2 asm("r29");
  17. register uint8_t nerd3 asm("r31");*/
  18. /*ISR (INT0_vect)//now in assembly
  19. {
  20. SPDR=(PINC&15)|(PIND&240);//send part of pixel to SPI
  21. }*/
  22. //#define qqvga
  23. //#define aMega
  24. //#define qvga
  25. //#define rgb565 //yuv422 is higher quality but the tft lcd for arduino uses rgb565
  26. #define rawRGB
  27. inline void spiCSt(void)//selects the RAM chip and resets it
  28. {
  29. //toggles spi CS used for reseting sram
  30. PORTB|=6;//cs high for both
  31. /*asm volatile ("nop");//probley not needed
  32. asm volatile ("nop");//probley not needed
  33. asm volatile ("nop");//probley not needed
  34. asm volatile ("nop");//probley not needed*/
  35. //_delay_ms(1);
  36. PORTB&=~4;//cs low for ram keep sd high
  37. }
  38. inline void spiWrB(uint8_t dat)
  39. {
  40. SPDR = dat;
  41. // Wait for transmission complete
  42. while(!(SPSR & (1<<SPIF))) {}
  43. }
  44. void serialWrB(uint8_t dat)
  45. {
  46. while ( !( UCSR0A & (1<<UDRE0)) ) {} //wait for byte to transmit
  47. UDR0=dat;
  48. while ( !( UCSR0A & (1<<UDRE0)) ) {} //wait for byte to transmit
  49. }
  50. void StringPgm(char * str)
  51. {
  52. do {
  53. serialWrB(pgm_read_byte_near(str));
  54. } while(pgm_read_byte_near(++str));
  55. }
  56. void sendNyble(uint8_t nyb)
  57. {
  58. if (nyb > 9)
  59. nyb+='7';//'A'- 10 = '7';
  60. else
  61. nyb+='0';
  62. serialWrB(nyb);
  63. }
  64. void sendByteAscii(uint8_t dat)//sends as hexdec format
  65. {
  66. serialWrB('0');
  67. serialWrB('x');
  68. sendNyble(dat>>4);
  69. sendNyble(dat&15);
  70. serialWrB('\n');
  71. }
  72. void captureImg(uint16_t ws,uint16_t hs,uint16_t wg,uint8_t hg)
  73. {
  74. //skip 1 multiplies skip 2 same with get1 and get2
  75. //first wait for vsync it is on pin 3 (counting from 0) portD
  76. //start spi ram
  77. uint16_t ls2,lg2;
  78. spiCSt();
  79. spiWrB(2);//sequental write mode
  80. spiWrB(0);//24 bit address
  81. spiWrB(0);
  82. spiWrB(0);
  83. while (!(PIND&8)) {}//wait for high
  84. while ((PIND&8)) {}//wait for low
  85. //if (hs != 0)
  86. //{
  87. //for (ls1=0;ls1<hs;ls1++)
  88. while (hs--)
  89. {
  90. //for (ls2=0;ls2<ws;ls2++)
  91. ls2=ws;
  92. while (ls2--)
  93. {
  94. while (!(PIND&4)) {}//wait for high
  95. while ((PIND&4)) {}//wait for low
  96. }
  97. }// while (--hs);
  98. //}
  99. //for (lg1=0;lg1<hg;lg1++)
  100. while ((uint8_t)hg--)
  101. {
  102. //for (lg2=0;lg2<wg;lg2++)
  103. lg2=wg;
  104. while (lg2--)
  105. {
  106. while (!(PIND&4)) {}//wait for high
  107. SPDR=(uint8_t)(PINC&15)|(PIND&240);
  108. while ((PIND&4)) {}//wait for low
  109. }
  110. }
  111. }
  112. uint8_t RdSerial(void)
  113. {
  114. /* Wait for data to be received */
  115. while ( !(UCSR0A & (1<<RXC0)) );
  116. /* Get and return received data from buffer */
  117. return UDR0;
  118. }
  119. void sendRam(uint16_t w,uint16_t h)
  120. {
  121. spiCSt();
  122. spiWrB(3);//sequental read mode
  123. spiWrB(0);//24 bit address
  124. spiWrB(0);
  125. spiWrB(0);
  126. //_delay_ms(2000);
  127. uint16_t wl,hl;
  128. for (hl=0;hl<h;hl++)
  129. {
  130. StringPgm(PSTR("RDY"));
  131. for (wl=0;wl<w;wl++)
  132. {
  133. while ( !( UCSR0A & (1<<UDRE0)) ) {} //wait for byte to transmit
  134. SPDR=0;//send dummy value to get byte back
  135. while(!(SPSR & (1<<SPIF))) {}
  136. UDR0=SPDR;
  137. }
  138. }
  139. while ( !( UCSR0A & (1<<UDRE0)) ) {} //wait for byte to transmit
  140. //StringPgm(PSTR("RDY"));
  141. //_delay_ms(10);
  142. //UDR0=0xFF;
  143. }
  144. int main(void)
  145. {
  146. cli();//disable interupts
  147. DDRB|=47;//clock as output and SPI pins as output except MISO
  148. PORTB|=6;//set both CS pins to high
  149. DDRC&=~15;//low d0-d3 camera
  150. DDRD&=~252;//d7-d4 and interupt pins
  151. //DDRB&=~2;//href as input
  152. //EICRA=11;//int0 rising int1 falling
  153. //EIMSK=2;//disable int0 and enable int1
  154. //disable pin change interupt
  155. //PCICR=0;
  156. //PCMSK0=2;
  157. //set up twi for 100khz
  158. TWSR&=~3;//disable prescaler for TWI
  159. TWBR=72;//set to 100khz
  160. //enable serial
  161. //UBRR0H = (unsigned char)(MYUBRR>>8);
  162. //UBRR0L = (unsigned char)MYUBRR&255;
  163. UBRR0H=0;
  164. UBRR0L=3;//3 = 0.5M 2M baud rate = 0 7 = 250k 207 is 9600 baud rate
  165. UCSR0A|=2;//double speed aysnc
  166. UCSR0B = (1<<RXEN0)|(1<<TXEN0);//Enable receiver and transmitter
  167. UCSR0C=6;//async 1 stop bit 8bit char no parity bits
  168. //enable spi
  169. SPCR=80;//spi enable master
  170. SPSR=1;//double speed
  171. //set up camera
  172. wrReg(0x15,32);//pclk does not toggle on HBLANK COM10
  173. wrReg(0x11,32);//using scaler for divider
  174. wrReg(REG_RGB444, 0x00); // Disable RGB444
  175. wrReg(REG_COM11,226);//enable nigh mode 1/8 frame rate COM11*/
  176. wrReg(REG_TSLB,0x04); // 0D = UYVY 04 = YUYV
  177. wrReg(REG_COM13,0x88); // connect to REG_TSLB
  178. //wrReg(REG_COM13,0x8); // connect to REG_TSLB disable gamma
  179. #ifdef rgb565
  180. wrReg(REG_COM7, 0x04); // RGB + color bar disable
  181. wrReg(REG_COM15, 0xD0); // Set rgb565 with Full range 0xD0
  182. #elif defined rawRGB
  183. wrReg(REG_COM7,1);//raw rgb bayer
  184. wrReg(REG_COM15, 0xC0); //Full range
  185. #else
  186. wrReg(REG_COM7, 0x00); // YUV
  187. //wrReg(REG_COM17, 0x00); // color bar disable
  188. wrReg(REG_COM15, 0xC0); //Full range
  189. #endif
  190. //wrReg(REG_COM3, 0x04);
  191. #if defined qqvga || defined qvga
  192. wrReg(REG_COM3,4); // REG_COM3
  193. #else
  194. wrReg(REG_COM3,0); // REG_COM3
  195. #endif
  196. //wrReg(0x3e,0x00); // REG_COM14
  197. // wrReg(0x72,0x11); //
  198. // wrReg(0x73,0xf0); //
  199. #ifdef qqvga
  200. wrReg(REG_COM14, 0x1a); // divide by 4
  201. wrReg(0x72, 0x22); // downsample by 4
  202. wrReg(0x73, 0xf2); // divide by 4
  203. wrReg(REG_HSTART,0x16);
  204. wrReg(REG_HSTOP,0x04);
  205. wrReg(REG_HREF,0xa4);
  206. wrReg(REG_VSTART,0x02);
  207. wrReg(REG_VSTOP,0x7a);
  208. wrReg(REG_VREF,0x0a);
  209. #endif
  210. #ifdef qvga
  211. wrReg(REG_COM14, 0x19);
  212. wrReg(0x72, 0x11);
  213. wrReg(0x73, 0xf1);
  214. wrReg(REG_HSTART,0x16);
  215. wrReg(REG_HSTOP,0x04);
  216. wrReg(REG_HREF,0x24);
  217. wrReg(REG_VSTART,0x02);
  218. wrReg(REG_VSTOP,0x7a);
  219. wrReg(REG_VREF,0x0a);
  220. #else
  221. wrReg(0x32,246); // was B6
  222. wrReg(0x17,0x13); // HSTART
  223. wrReg(0x18,0x01); // HSTOP
  224. wrReg(0x19,0x02); // VSTART
  225. wrReg(0x1a,0x7a); // VSTOP
  226. wrReg(0x03,0x0a); // VREF
  227. #endif
  228. // wrReg(0x70, 0x3a); // Scaling Xsc
  229. //wrReg(0x71, 0x35); // Scaling Ysc
  230. //wrReg(0xA2, 0x02); // pixel clock delay
  231.  
  232. wrReg(REG_COM1, 0x00);
  233. // COLOR SETTING
  234.  
  235. wrReg(REG_COM8,0x8F); // AGC AWB AEC Unlimited step size
  236. wrReg(0xAA,0x14); // Average-based AEC algorithm
  237. wrReg(REG_BRIGHT,0x00); // 0x00(Brightness 0) - 0x18(Brightness +1) - 0x98(Brightness -1)
  238. wrReg(REG_CONTRAS,0x40); // 0x40(Contrast 0) - 0x50(Contrast +1) - 0x38(Contrast -1)
  239. wrReg(0xB1,0xB1); // Automatic Black level Calibration
  240.  
  241. wrReg(MTX1,0x80);
  242. wrReg(MTX2,0x80);
  243. wrReg(MTX3,0x00);
  244. wrReg(MTX4,0x22);
  245. wrReg(MTX5,0x5e);
  246. wrReg(MTX6,0x80);
  247. wrReg(MTXS,0x9e);
  248. wrReg(AWBC7,0x88);
  249. wrReg(AWBC8,0x88);
  250. wrReg(AWBC9,0x44);
  251. wrReg(AWBC10,0x67);
  252. wrReg(AWBC11,0x49);
  253. wrReg(AWBC12,0x0e);
  254. wrReg(REG_GFIX,0x00);
  255. wrReg(GGAIN,0x40);
  256. wrReg(AWBCTR3,0x0a);
  257. wrReg(AWBCTR2,0x55);
  258. wrReg(AWBCTR1,0x11);
  259. wrReg(AWBCTR0,0x9f);
  260. wrReg(0xb0,0x84);//not sure what this does
  261. wrReg(REG_COM16,COM16_AWBGAIN);//disable auto denoise and edge enhancment
  262. //wrReg(REG_COM16,0);
  263. wrReg(0x4C,0);//disable denoise
  264. wrReg(0x76,0);//disable denoise
  265. wrReg(0x77,0);//disable denoise
  266. wrReg(0x7B,4);//brighten up shadows a bit end point 4
  267. wrReg(0x7C,8);//brighten up shadows a bit end point 8
  268. //wrReg(0x88,238);//darken highligts end point 176
  269. //wrReg(0x89,211);//try to get more highlight detail
  270. //wrReg(0x7A,60);//slope
  271. //wrReg(0x26,0xB4);//lower maxium stable operating range for AEC
  272. //hueSatMatrix(0,100);
  273. //ov7670_store_cmatrix();
  274. //wrReg(0x20,12);//set ADC range to 1.5x
  275. wrReg(0x2D,16);//1 dummy line
  276. wrReg(0x11,4);//using scaler for divider
  277. //wrReg(0x2a,5);//href delay
  278. spiCSt();
  279. spiWrB(1);
  280. spiWrB(64);//sequental mode
  281. spiCSt();
  282. spiWrB(2);//sequental write mode
  283. spiWrB(0);//24 bit address
  284. spiWrB(0);
  285. spiWrB(0);
  286. /*uint32_t x;
  287. uint8_t y=0;
  288.  
  289. for (x=0;x<122880;x++)
  290. {
  291. SPDR=y;
  292. y++;
  293. while(!(SPSR & (1<<SPIF))) {}
  294. }*/
  295. /*sendRam(1280,96);//send test frame first
  296. sendRam(1280,96);
  297. sendRam(1280,96);
  298. sendRam(1280,96);
  299. sendRam(1280,96);*/
  300. //sei();//enable interupts
  301. //UDR0=0;
  302.  
  303. while (1)
  304. {
  305. /* Note: One frame is broken down into 5 smaller captures this allows for a whole frame to be captured at 640x480 which is nice
  306. however it could mean that there could be slight differences between each frame capture
  307. I think the improvment of resolution outweights the cons of the slight changes per frame if any
  308. The image will take about 15 seconds to reach the computer per frame*/
  309. //hueSatMatrix(0,y);
  310. //_delay_ms(100);
  311. #ifdef qqvga
  312. captureImg(0,0,320,120);
  313. sendRam(320,120);
  314. #endif
  315. #ifdef qvga
  316. captureImg(0,0,640,120);
  317. sendRam(640,120);
  318. captureImg(640,120,640,120);
  319. sendRam(640,120);
  320. #else
  321. #ifdef rawRGB
  322. uint8_t z;
  323. //for (z=0;z<64;z++)
  324. //{
  325. //wrReg(0x11,z);//using scaler for divider
  326. //_delay_ms(1000);
  327. captureImg(0,0,640,160);
  328. sendRam(640,160);
  329. captureImg(640,160,640,160);
  330. sendRam(640,160);
  331. captureImg(640,320,640,160);
  332. sendRam(640,160);
  333. //}
  334. #else
  335. captureImg(0,0,1280,96);//each pixel is 2 bytes so 1280 instead of 640 for width
  336. sendRam(1280,96);
  337. captureImg(1280,96,1280,96);
  338. sendRam(1280,96);
  339. captureImg(1280,192,1280,96);
  340. sendRam(1280,96);
  341. captureImg(1280,288,1280,96);
  342. sendRam(1280,96);
  343. captureImg(1280,384,1280,96);
  344. sendRam(1280,96);
  345. #endif
  346. #endif
  347. //frameByLine();
  348. /*doneImg=0;
  349. wantFrame=1;
  350. sei();//enable interupts
  351. //_delay_ms(1000);
  352. while (doneImg==0) {} //wait for image to complete
  353. cli();//disable interupts
  354. //_delay_ms(1000);
  355. spiCSt();
  356. spiWrB(3);//sequental read mode
  357. spiWrB(0);//24 bit address
  358. spiWrB(0);
  359. spiWrB(0);
  360. for (x=0;x<50688;x++)
  361. {
  362. SPDR=0;//send dummy value to get byte back
  363. while(!(SPSR & (1<<SPIF))) {}
  364. UDR0=SPDR;
  365. while ( !( UCSR0A & (1<<UDRE0)) ) {} //wait for byte to transmit
  366. }*/
  367.  
  368. }
  369.  
  370. }
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