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  1. DDR Version 1.20 20190314
  2. In
  3. channel 0
  4. CS = 0
  5. MR0=0x98
  6. MR4=0x1
  7. MR5=0xFF
  8. MR8=0x8
  9. MR12=0x72
  10. MR14=0x72
  11. MR18=0x0
  12. MR19=0x0
  13. MR24=0x8
  14. MR25=0x0
  15. CS = 1
  16. MR0=0x18
  17. MR4=0x1
  18. MR5=0xFF
  19. MR8=0x8
  20. MR12=0x72
  21. MR14=0x72
  22. MR18=0x0
  23. MR19=0x0
  24. MR24=0x8
  25. MR25=0x0
  26. channel 1
  27. CS = 0
  28. MR0=0x98
  29. MR4=0x1
  30. MR5=0xFF
  31. MR8=0x8
  32. MR12=0x72
  33. MR14=0x72
  34. MR18=0x0
  35. MR19=0x0
  36. MR24=0x8
  37. MR25=0x0
  38. CS = 1
  39. MR0=0x18
  40. MR4=0x1
  41. MR5=0xFF
  42. MR8=0x8
  43. MR12=0x72
  44. MR14=0x72
  45. MR18=0x0
  46. MR19=0x0
  47. MR24=0x8
  48. MR25=0x0
  49. channel 0 training pass!
  50. channel 1 training pass!
  51. change freq to 400MHz 0,1
  52. channel 0
  53. CS = 0
  54. MR0=0x98
  55. MR4=0x1
  56. MR5=0xFF
  57. MR8=0x8
  58. MR12=0x72
  59. MR14=0x72
  60. MR18=0x0
  61. MR19=0x0
  62. MR24=0x8
  63. MR25=0x0
  64. CS = 1
  65. MR0=0x18
  66. MR4=0x1
  67. MR5=0xFF
  68. MR8=0x8
  69. MR12=0x72
  70. MR14=0x72
  71. MR18=0x0
  72. MR19=0x0
  73. MR24=0x8
  74. MR25=0x0
  75. channel 1
  76. CS = 0
  77. MR0=0x98
  78. MR4=0x1
  79. MR5=0xFF
  80. MR8=0x8
  81. MR12=0x72
  82. MR14=0x72
  83. MR18=0x0
  84. MR19=0x0
  85. MR24=0x8
  86. MR25=0x0
  87. CS = 1
  88. MR0=0x18
  89. MR4=0x1
  90. MR5=0xFF
  91. MR8=0x8
  92. MR12=0x72
  93. MR14=0x72
  94. MR18=0x0
  95. MR19=0x0
  96. MR24=0x8
  97. MR25=0x0
  98. channel 0 training pass!
  99. channel 1 training pass!
  100. change freq to 800MHz 1,0
  101. Channel 0: LPDDR4,800MHz
  102. Bus Width=32 Col=10 Bank=8 Row=15/15 CS=2 Die Bus-Width=16 Size=2048MB
  103. Channel 1: LPDDR4,800MHz
  104. Bus Width=32 Col=10 Bank=8 Row=15/15 CS=2 Die Bus-Width=16 Size=2048MB
  105. 256B stride
  106. ch 0 ddrconfig = 0x101, ddrsize = 0x2020
  107. ch 1 ddrconfig = 0x101, ddrsize = 0x2020
  108. pmugrf_os_reg[2] = 0x3AA1FAA1, stride = 0xD
  109. OUT
  110. Boot1: 2019-03-14, version: 1.19
  111. CPUId = 0x0
  112. ChipType = 0x10, 250
  113. SdmmcInit=2 0
  114. BootCapSize=100000
  115. UserCapSize=119276MB
  116. FwPartOffset=2000 , 100000
  117. mmc0:cmd5,20
  118. SdmmcInit=0 0
  119. BootCapSize=0
  120. UserCapSize=15103MB
  121. FwPartOffset=2000 , 0
  122. StorageInit ok = 76429
  123. SecureMode = 0
  124. SecureInit read PBA: 0x4
  125. SecureInit read PBA: 0x404
  126. SecureInit read PBA: 0x804
  127. SecureInit read PBA: 0xc04
  128. SecureInit read PBA: 0x1004
  129. SecureInit read PBA: 0x1404
  130. SecureInit read PBA: 0x1804
  131. SecureInit read PBA: 0x1c04
  132. SecureInit ret = 0, SecureMode = 0
  133. atags_set_bootdev: ret:(0)
  134. GPT part: 0, name: STATE, start:0x4ae000, size:0x60006d
  135. GPT part: 1, name: KERN-A, start:0x5000, size:0x20000
  136. GPT part: 2, name: ROOT-A, start:0xae000, size:0x400000
  137. GPT part: 3, name: KERN-B, start:0x25000, size:0x20000
  138. GPT part: 4, name: ROOT-B, start:0xad000, size:0x1000
  139. GPT part: 5, name: KERN-C, start:0x4040, size:0x1
  140. GPT part: 6, name: ROOT-C, start:0x4041, size:0x1
  141. GPT part: 7, name: OEM, start:0x45000, size:0x8000
  142. GPT part: 8, name: reserved, start:0x4042, size:0x1
  143. GPT part: 9, name: reserved, start:0x4043, size:0x1
  144. GPT part: 10, name: RWFW, start:0x40, size:0x4000
  145. GPT part: 11, name: EFI-SYSTEM, start:0x6d000, size:0x40000
  146. no find partition:uboot.
  147. LoadTrust Addr:0x4000
  148. No find bl30.bin
  149. No find bl32.bin
  150. Load uboot, ReadLba = 2000
  151. Load OK, addr=0x200000, size=0xe5970
  152. RunBL31 0x10000
  153. NOTICE: BL31: v1.3(debug):22b599a
  154. NOTICE: BL31: Built : 11:03:32, Jul 10 2019
  155. NOTICE: BL31: Rockchip release version: v1.1
  156. INFO: GICv3 with legacy support detected. ARM GICV3 driver initialized in EL3
  157. INFO: Using opteed sec cpu_context!
  158. INFO: boot cpu mask: 0
  159. INFO: plat_rockchip_pmu_init(1181): pd status 3e
  160. INFO: BL31: Initializing runtime services
  161. WARNING: No OPTEE provided by BL2 boot loader, Booting device without OPTEE initialization. SMC`s destined for OPTEE will return SMC_UNK
  162. ERROR: Error initializing runtime service opteed_fast
  163. INFO: BL31: Preparing for EL3 exit to normal world
  164. INFO: Entry point address = 0x200000
  165. INFO: SPSR = 0x3c9
  166. fdtdec_get_addr_size_fixed: reg: addr=ff770000, size=10000
  167. fdtdec_get_addr_size_fixed: reg: addr=ff320000, size=1000
  168.  
  169.  
  170. U-Boot 2017.09-04112-gb8e0774-dirty (Feb 07 2020 - 12:45:13 -0500)
  171.  
  172. Model: Pine64 RK3399 Pinebook Pro
  173. PreSerial: 2
  174. DRAM: 3.9 GiB
  175. Sysmem: init
  176. Relocation Offset: f5be7000, fdt: f3dd2238
  177. I2c0 speed: 400000Hz
  178. PMIC: RK808
  179. vdd_center 900000 uV
  180. vdd_log init 900000 uV
  181. rk_board_init PWM2 pinctrl init fail!
  182. rk_board_init: vcc3v0_sdio cannot set regulator value -38
  183. vdd_center 900000 uV
  184. DCDC_REG1@ vdd_center: 750000uV <-> 1400000uV, set 900000uV, enabling | suspend -61uV, disabled
  185. DCDC_REG4@ vcc_1v8: 1800000uV <-> 1800000uV, set 1800000uV, enabling | suspend 1800000uV, enabling
  186. LDO_REG1@ vcc1v8_dvp: 1800000uV <-> 1800000uV, set 1800000uV, enabling | suspend 1800000uV, enabling
  187. LDO_REG4@ vcc_sd: 3300000uV <-> 3300000uV, set 3300000uV, enabling | suspend 3300000uV, enabling
  188. LDO_REG5@ vcca3v0_codec: 3000000uV <-> 3000000uV, set 3000000uV, enabling | suspend 3000000uV, enabling
  189. LDO_REG7@ vcca1v8_codec: 1800000uV <-> 1800000uV, set 1800000uV, enabling | suspend 1800000uV, enabling
  190. LDO_REG8@ vcc_3v0: 3000000uV <-> 3000000uV, set 3000000uV, enabling | suspend 3000000uV, enabling
  191. SWITCH_REG2@ vcc3v3_s0: -61uV <-> -61uV, set 0uV, enabling | suspend -61uV, disabled
  192. dc-12v@ dc_12v: 12000000uV <-> 12000000uV, set 12000000uV, enabling | suspend -61uV, enabling (ret: -38)
  193. vcc-sys@ vcc_sys: 5000000uV <-> 5000000uV, set 5000000uV, enabling | suspend -61uV, enabling (ret: -38)
  194. vcc3v3-sys@ vcc3v3_sys: 3300000uV <-> 3300000uV, set 3300000uV, enabling | suspend -61uV, enabling (ret: -38)
  195. vcc-phy-regulator@ vcc_phy: -61uV <-> -61uV, set -61uV, enabling | suspend -61uV, enabling
  196. led-regulator@ led_regulator: -61uV <-> -61uV, set -61uV, enabling | suspend -61uV, enabling
  197. vcc5v0-host-en@ vcc5v0_host: 5000000uV <-> 5000000uV, set 5000000uV, enabling | suspend -61uV, enabling (ret: -38)
  198. vcc5v0-usb3-host-regulator@vcc5v0_usb3_host: -61uV <-> -61uV, set -61uV, enabling | suspend -61uV, enabling
  199. vcc5v0-typec0-en@ vcc5v0_typec0: -61uV <-> -61uV, set -61uV, enabling | suspend -61uV, enabling
  200. vcc3v3-pcie-regulator@ vcc3v3_pcie: 3300000uV <-> 3300000uV, set 3300000uV, disabled | suspend -61uV, enabling
  201. vcc1v8-sdio@ vcc1v8_sdio: 1800000uV <-> 1800000uV, set 1800000uV, enabling | suspend -61uV, enabling (ret: -38)
  202. vcc3v0-sdio@ vcc3v0_sdio: 3000000uV <-> 3000000uV, set 3000000uV, enabling | suspend -61uV, enabling ; init 3000000uV (ret: -38)
  203. vdd_log init 900000 uV
  204. vdd_log@ vdd_log: 800000uV <-> 1400000uV, set 900000uV, enabling | suspend -61uV, enabling ; init 900000uV
  205. MMC: dwmmc@fe310000: 2, sdhci@fe330000: 0, dwmmc@fe320000: 1
  206. Invalid bus 0 (err=-19)
  207. *** Warning - spi_flash_probe_bus_cs() failed, using default environment
  208.  
  209. In: serial
  210. Out: serial
  211. Err: serial
  212. Model: Pine64 RK3399 Pinebook Pro
  213. switch to partitions #0, OK
  214. mmc1 is current device
  215. Found IDB in SDcard
  216. Bootdev(atags): mmc 1
  217. PartType: EFI
  218. rockchip_get_boot_mode: Could not found misc partition
  219. boot mode: None
  220. init_resource_list: failed to get resource part, ret=-1
  221. Can't find file:logo.bmp
  222. failed to display uboot logo
  223. CLK: (uboot. arml: enter 816000 KHz, init 816000 KHz, kernel 0N/A)
  224. CLK: (uboot. armb: enter 816000 KHz, init 816000 KHz, kernel 0N/A)
  225. aplll 816000 KHz
  226. apllb 816000 KHz
  227. dpll 800000 KHz
  228. cpll 24000 KHz
  229. gpll 800000 KHz
  230. npll 600000 KHz
  231. vpll 24000 KHz
  232. aclk_perihp 133333 KHz
  233. hclk_perihp 66666 KHz
  234. pclk_perihp 33333 KHz
  235. aclk_perilp0 266666 KHz
  236. hclk_perilp0 88888 KHz
  237. pclk_perilp0 44444 KHz
  238. hclk_perilp1 100000 KHz
  239. pclk_perilp1 50000 KHz
  240. Net: No ethernet found.
  241. Hit key to stop autoboot('CTRL+C'): 0
  242. do_boot_rockchip: Could not find EFI-SYSTEM part
  243. Checking for mmc dev 1...
  244. switch to partitions #0, OK
  245. mmc1 is current device
  246. Scanning mmc 1 for bootable partitions...
  247. Scanning mmc 1:c for extlinux or boot scripts...
  248. Found /extlinux/extlinux.conf
  249. Retrieving file: /extlinux/extlinux.conf
  250. reading /extlinux/extlinux.conf
  251. 274 bytes read in 4 ms (66.4 KiB/s)
  252. Boot Menu
  253. 1: 5.9.0-rc4-00034-g7fe10096c150
  254. Enter choice: 1: 5.9.0-rc4-00034-g7fe10096c150
  255. Retrieving file: /Image-5.9.0-rc4-00034-g7fe10096c150
  256. reading /Image-5.9.0-rc4-00034-g7fe10096c150
  257. 26139136 bytes read in 1095 ms (22.8 MiB/s)
  258. append: earlyprintk console=ttyS2,1500000n8 rw root=/dev/p rootfstype=ext4 init=/sbin/init rootwait cros_debug loglevel=7
  259. "Synchronous Abort" handler, esr 0x96000010
  260.  
  261. * Reason: Exception from a Data abort, from current exception level
  262. * PC = 000000000027ac74
  263. * LR = 0000000000224830
  264. * SP = 00000000f3dcfa60
  265. * ESR_EL2 = 0000000096000010
  266. * Reloc Off = 00000000f5be7000
  267.  
  268. x0 : 0000000000000000 x1 : 0000000000000000
  269. x2 : 0000000000000001 x3 : 00000000f3dcfe28
  270. x4 : 0000000000000710 x5 : 00000000f5ec1cb0
  271. x6 : 0000000000000001 x7 : 00000000f5ea3118
  272. x8 : 00000000f3e198d0 x9 : 0000000000000008
  273. x10: 00000000f3e09e20 x11: 00000000f3e15148
  274. x12: 0000000000000000 x13: 0000000000000200
  275. x14: 000000000000000e x15: 00000000ffffffff
  276. x16: 000000009ddab770 x17: 0000000000233e68
  277. x18: 00000000f3ddecf8 x19: 0000000000000000
  278. x20: 0000000000000710 x21: 0000000000000001
  279. x22: 00000000f3dcfe28 x23: 00000000f5eaa190
  280. x24: 00000000f5ec1df0 x25: 00000000f5e90000
  281. x26: 00000000f5e90000 x27: 0000000000000002
  282. x28: 0000000000000001 x29: 00000000f3dcfc40
  283.  
  284.  
  285. Call trace:
  286. PC: [< 0027ac74 >]
  287. LR: [< 00224830 >]
  288.  
  289. Stack:
  290. [< 0027ac74 >]
  291. [< 0021b5bc >]
  292. [< 00211c58 >]
  293. [< 00211d60 >]
  294. [< 002120c4 >]
  295. [< 002289d4 >]
  296. [< 00219d60 >]
  297. [< 00219f04 >]
  298. [< 0021965c >]
  299. [< 00219b1c >]
  300. [< 00219f04 >]
  301. [< 00219618 >]
  302. [< 00227f90 >]
  303. [< 002289d4 >]
  304. [< 00219d60 >]
  305. [< 002199d8 >]
  306. [< 00219f04 >]
  307. [< 00219618 >]
  308. [< 00227f90 >]
  309. [< 002289d4 >]
  310. [< 00219d60 >]
  311. [< 002199d8 >]
  312. [< 00219f04 >]
  313. [< 00219618 >]
  314. [< 00227f90 >]
  315. [< 002289d4 >]
  316. [< 00219d60 >]
  317. [< 002199d8 >]
  318. [< 002199d8 >]
  319. [< 00219f04 >]
  320. [< 00219618 >]
  321. [< 00227f90 >]
  322. [< 002289d4 >]
  323. [< 00219d60 >]
  324. [< 002199d8 >]
  325. [< 00219f04 >]
  326. [< 00219618 >]
  327. [< 00227f90 >]
  328. [< 002289d4 >]
  329. [< 00219d60 >]
  330. [< 00219f04 >]
  331. [< 00219618 >]
  332. [< 00227f90 >]
  333. [< 002289d4 >]
  334. [< 00219d60 >]
  335. [< 00219f04 >]
  336. [< 0021965c >]
  337. [< 00219b1c >]
  338. [< 002199d8 >]
  339. [< 00219f04 >]
  340. [< 00219618 >]
  341. [< 00227f90 >]
  342. [< 002289d4 >]
  343. [< 00219d60 >]
  344. [< 00219f04 >]
  345. [< 00219618 >]
  346. [< 00227ef8 >]
  347. [< 00218018 >]
  348. [< 0021ab10 >]
  349. [< 0027d750 >]
  350. [< 0021ad64 >]
  351. [< 002019e4 >]
  352.  
  353. Copy info from "Call trace..." to a file(eg. dump.txt), and run
  354. command in your U-Boot project: ./scripts/stacktrace.sh dump.txt
  355.  
  356. Resetting CPU ...
  357.  
  358. DDR Version 1.20 20190314
  359. In
  360. soft reset
  361. SRX
  362. channel 0
  363. CS = 0
  364. MR0=0x98
  365. MR4=0x1
  366. MR5=0xFF
  367. MR8=0x8
  368. MR12=0x72
  369. MR14=0x72
  370. MR18=0x0
  371. MR19=0x0
  372. MR24=0x8
  373. MR25=0x0
  374. CS = 1
  375. MR0=0x18
  376. MR4=0x1
  377. MR5=0xFF
  378. MR8=0x8
  379. MR12=0x72
  380. MR14=0x72
  381. MR18=0x0
  382. MR19=0x0
  383. MR24=0x8
  384. MR25=0x0
  385. channel 1
  386. CS = 0
  387. MR0=0x98
  388. MR4=0x1
  389. MR5=0xFF
  390. MR8=0x8
  391. MR12=0x72
  392. MR14=0x72
  393. MR18=0x0
  394. MR19=0x0
  395. MR24=0x8
  396. MR25=0x0
  397. CS = 1
  398. MR0=0x18
  399. MR4=0x1
  400. MR5=0xFF
  401. MR8=0x8
  402. MR12=0x72
  403. MR14=0x72
  404. MR18=0x0
  405. MR19=0x0
  406. MR24=0x8
  407. MR25=0x0
  408. channel 0 training pass!
  409. channel 1 training pass!
  410. change freq to 400MHz 0,1
  411. channel 0
  412. CS = 0
  413. MR0=0x98
  414. MR4=0x1
  415. MR5=0xFF
  416. MR8=0x8
  417. MR12=0x72
  418. MR14=0x72
  419. MR18=0x0
  420. MR19=0x0
  421. MR24=0x8
  422. MR25=0x0
  423. CS = 1
  424. MR0=0x18
  425. MR4=0x1
  426. MR5=0xFF
  427. MR8=0x8
  428. MR12=0x72
  429. MR14=0x72
  430. MR18=0x0
  431. MR19=0x0
  432. MR24=0x8
  433. MR25=0x0
  434. channel 1
  435. CS = 0
  436. MR0=0x98
  437. MR4=0x1
  438. MR5=0xFF
  439. MR8=0x8
  440. MR12=0x72
  441. MR14=0x72
  442. MR18=0x0
  443. MR19=0x0
  444. MR24=0x8
  445. MR25=0x0
  446. CS = 1
  447. MR0=0x18
  448. MR4=0x1
  449. MR5=0xFF
  450. MR8=0x8
  451. MR12=0x72
  452. MR14=0x72
  453. MR18=0x0
  454. MR19=0x0
  455. MR24=0x8
  456. MR25=0x0
  457. channel 0 training pass!
  458. channel 1 training pass!
  459. change freq to 800MHz 1,0
  460. Channel 0: LPDDR4,800MHz
  461. Bus Width=32 Col=10 Bank=8 Row=15/15 CS=2 Die Bus-Width=16 Size=2048MB
  462. Channel 1: LPDDR4,800MHz
  463. Bus Width=32 Col=10 Bank=8 Row=15/15 CS=2 Die Bus-Width=16 Size=2048MB
  464. 256B stride
  465. ch 0 ddrconfig = 0x101, ddrsize = 0x2020
  466. ch 1 ddrconfig = 0x101, ddrsize = 0x2020
  467. pmugrf_os_reg[2] = 0x3AA1FAA1, stride = 0xD
  468. OUT
  469. Boot1: 2019-03-14, version: 1.19
  470. CPUId = 0x0
  471. ChipType = 0x10, 315
  472. SdmmcInit=2 0
  473. BootCapSize=100000
  474. UserCapSize=119276MB
  475. FwPartOffset=2000 , 100000
  476. mmc0:cmd5,20
  477. SdmmcInit=0 0
  478. BootCapSize=0
  479. UserCapSize=15103MB
  480. FwPartOffset=2000 , 0
  481. StorageInit ok = 71833
  482. SecureMode = 0
  483. SecureInit read PBA: 0x4
  484. SecureInit read PBA: 0x404
  485. SecureInit read PBA: 0x804
  486. SecureInit read PBA: 0xc04
  487. SecureInit read PBA: 0x1004
  488. SecureInit read PBA: 0x1404
  489. SecureInit read PBA: 0x1804
  490. SecureInit read PBA: 0x1c04
  491. SecureInit ret = 0, SecureMode = 0
  492. atags_set_bootdev: ret:(0)
  493. GPT part: 0, name: STATE, start:0x4ae000, size:0x60006d
  494. GPT part: 1, name: KERN-A, start:0x5000, size:0x20000
  495. GPT part: 2, name: ROOT-A, start:0xae000, size:0x400000
  496. GPT part: 3, name: KERN-B, start:0x25000, size:0x20000
  497. GPT part: 4, name: ROOT-B, start:0xad000, size:0x1000
  498. GPT part: 5, name: KERN-C, start:0x4040, size:0x1
  499. GPT part: 6, name: ROOT-C, start:0x4041, size:0x1
  500. GPT part: 7, name: OEM, start:0x45000, size:0x8000
  501. GPT part: 8, name: reserved, start:0x4042, size:0x1
  502. GPT part: 9, name: reserved, start:0x4043, size:0x1
  503. GPT part: 10, name: RWFW, start:0x40, size:0x4000
  504. GPT part: 11, name: EFI-SYSTEM, start:0x6d000, size:0x40000
  505. no find partition:uboot.
  506. LoadTrust Addr:0x4000
  507. No find bl30.bin
  508. No find bl32.bin
  509. Load uboot, ReadLba = 2000
  510. Load OK, addr=0x200000, size=0xe5970
  511. RunBL31 0x10000
  512. NOTICE: BL31: v1.3(debug):22b599a
  513. NOTICE: BL31: Built : 11:03:32, Jul 10 2019
  514. NOTICE: BL31: Rockchip release version: v1.1
  515. INFO: GICv3 with legacy support detected. ARM GICV3 driver initialized in EL3
  516. INFO: Using opteed sec cpu_context!
  517. INFO: boot cpu mask: 0
  518. INFO: plat_rockchip_pmu_init(1181): pd status 3e
  519. INFO: BL31: Initializing runtime services
  520. WARNING: No OPTEE provided by BL2 boot loader, Booting device without OPTEE initialization. SMC`s destined for OPTEE will return SMC_UNK
  521. ERROR: Error initializing runtime service opteed_fast
  522. INFO: BL31: Preparing for EL3 exit to normal world
  523. INFO: Entry point address = 0x200000
  524. INFO: SPSR = 0x3c9
  525. fdtdec_get_addr_size_fixed: reg: addr=ff770000, size=10000
  526. fdtdec_get_addr_size_fixed: reg: addr=ff320000, size=1000
  527.  
  528.  
  529. U-Boot 2017.09-04112-gb8e0774-dirty (Feb 07 2020 - 12:45:13 -0500)
  530.  
  531. Model: Pine64 RK3399 Pinebook Pro
  532. PreSerial: 2
  533. DRAM: 3.9 GiB
  534. Sysmem: init
  535. Relocation Offset: f5be7000, fdt: f3dd2238
  536. I2c0 speed: 400000Hz
  537. PMIC: RK808
  538. vdd_center 900000 uV
  539. vdd_log init 900000 uV
  540. rk_board_init PWM2 pinctrl init fail!
  541. rk_board_init: vcc3v0_sdio cannot set regulator value -38
  542. vdd_center 900000 uV
  543. DCDC_REG1@ vdd_center: 750000uV <-> 1400000uV, set 900000uV, enabling | suspend -61uV, disabled
  544. DCDC_REG4@ vcc_1v8: 1800000uV <-> 1800000uV, set 1800000uV, enabling | suspend 1800000uV, enabling
  545. LDO_REG1@ vcc1v8_dvp: 1800000uV <-> 1800000uV, set 1800000uV, enabling | suspend 1800000uV, enabling
  546. LDO_REG4@ vcc_sd: 3300000uV <-> 3300000uV, set 3300000uV, enabling | suspend 3300000uV, enabling
  547. LDO_REG5@ vcca3v0_codec: 3000000uV <-> 3000000uV, set 3000000uV, enabling | suspend 3000000uV, enabling
  548. LDO_REG7@ vcca1v8_codec: 1800000uV <-> 1800000uV, set 1800000uV, enabling | suspend 1800000uV, enabling
  549. LDO_REG8@ vcc_3v0: 3000000uV <-> 3000000uV, set 3000000uV, enabling | suspend 3000000uV, enabling
  550. SWITCH_REG2@ vcc3v3_s0: -61uV <-> -61uV, set 0uV, enabling | suspend -61uV, disabled
  551. dc-12v@ dc_12v: 12000000uV <-> 12000000uV, set 12000000uV, enabling | suspend -61uV, enabling (ret: -38)
  552. vcc-sys@ vcc_sys: 5000000uV <-> 5000000uV, set 5000000uV, enabling | suspend -61uV, enabling (ret: -38)
  553. vcc3v3-sys@ vcc3v3_sys: 3300000uV <-> 3300000uV, set 3300000uV, enabling | suspend -61uV, enabling (ret: -38)
  554. vcc-phy-regulator@ vcc_phy: -61uV <-> -61uV, set -61uV, enabling | suspend -61uV, enabling
  555. led-regulator@ led_regulator: -61uV <-> -61uV, set -61uV, enabling | suspend -61uV, enabling
  556. vcc5v0-host-en@ vcc5v0_host: 5000000uV <-> 5000000uV, set 5000000uV, enabling | suspend -61uV, enabling (ret: -38)
  557. vcc5v0-usb3-host-regulator@vcc5v0_usb3_host: -61uV <-> -61uV, set -61uV, enabling | suspend -61uV, enabling
  558. vcc5v0-typec0-en@ vcc5v0_typec0: -61uV <-> -61uV, set -61uV, enabling | suspend -61uV, enabling
  559. vcc3v3-pcie-regulator@ vcc3v3_pcie: 3300000uV <-> 3300000uV, set 3300000uV, disabled | suspend -61uV, enabling
  560. vcc1v8-sdio@ vcc1v8_sdio: 1800000uV <-> 1800000uV, set 1800000uV, enabling | suspend -61uV, enabling (ret: -38)
  561. vcc3v0-sdio@ vcc3v0_sdio: 3000000uV <-> 3000000uV, set 3000000uV, enabling | suspend -61uV, enabling ; init 3000000uV (ret: -38)
  562. vdd_log init 900000 uV
  563. vdd_log@ vdd_log: 800000uV <-> 1400000uV, set 900000uV, enabling | suspend -61uV, enabling ; init 900000uV
  564. MMC: dwmmc@fe310000: 2, sdhci@fe330000: 0, dwmmc@fe320000: 1
  565. Invalid bus 0 (err=-19)
  566. *** Warning - spi_flash_probe_bus_cs() failed, using default environment
  567.  
  568. In: serial
  569. Out: serial
  570. Err: serial
  571. Model: Pine64 RK3399 Pinebook Pro
  572. switch to partitions #0, OK
  573. mmc1 is current device
  574. Found IDB in SDcard
  575. Bootdev(atags): mmc 1
  576. PartType: EFI
  577. rockchip_get_boot_mode: Could not found misc partition
  578. boot mode: None
  579. init_resource_list: failed to get resource part, ret=-1
  580. Can't find file:logo.bmp
  581. failed to display uboot logo
  582. CLK: (uboot. arml: enter 816000 KHz, init 816000 KHz, kernel 0N/A)
  583. CLK: (uboot. armb: enter 816000 KHz, init 816000 KHz, kernel 0N/A)
  584. aplll 816000 KHz
  585. apllb 816000 KHz
  586. dpll 800000 KHz
  587. cpll 24000 KHz
  588. gpll 800000 KHz
  589. npll 600000 KHz
  590. vpll 24000 KHz
  591. aclk_perihp 133333 KHz
  592. hclk_perihp 66666 KHz
  593. pclk_perihp 33333 KHz
  594. aclk_perilp0 266666 KHz
  595. hclk_perilp0 88888 KHz
  596. pclk_perilp0 44444 KHz
  597. hclk_perilp1 100000 KHz
  598. pclk_perilp1 50000 KHz
  599. Net: No ethernet found.
  600. Hit key to stop autoboot('CTRL+C'): 0
  601. do_boot_rockchip: Could not find EFI-SYSTEM part
  602. Checking for mmc dev 1...
  603. switch to partitions #0, OK
  604. mmc1 is current device
  605. Scanning mmc 1 for bootable partitions...
  606. Scanning mmc 1:c for extlinux or boot scripts...
  607. Found /extlinux/extlinux.conf
  608. Retrieving file: /extlinux/extlinux.conf
  609. reading /extlinux/extlinux.conf
  610. 274 bytes read in 3 ms (88.9 KiB/s)
  611. Boot Menu
  612. 1: 5.9.0-rc4-00034-g7fe10096c150
  613. Enter choice: 1: 5.9.0-rc4-00034-g7fe10096c150
  614. Retrieving file: /Image-5.9.0-rc4-00034-g7fe10096c150
  615. reading /Image-5.9.0-rc4-00034-g7fe10096c150
  616. 26139136 bytes read in 1095 ms (22.8 MiB/s)
  617. append: earlyprintk console=ttyS2,1500000n8 rw root=/dev/p rootfstype=ext4 init=/sbin/init rootwait cros_debug loglevel=7
  618. "Synchronous Abort" handler, esr 0x96000010
  619.  
  620. * Reason: Exception from a Data abort, from current exception level
  621. * PC = 000000000027ac74
  622. * LR = 0000000000224830
  623. * SP = 00000000f3dcfa60
  624. * ESR_EL2 = 0000000096000010
  625. * Reloc Off = 00000000f5be7000
  626.  
  627. x0 : 0000000000000000 x1 : 0000000000000000
  628. x2 : 0000000000000001 x3 : 00000000f3dcfe28
  629. x4 : 0000000000000710 x5 : 00000000f5ec1cb0
  630. x6 : 0000000000000001 x7 : 00000000f5ea3118
  631. x8 : 00000000f3e198d0 x9 : 0000000000000008
  632. x10: 00000000f3e09e20 x11: 00000000f3e15148
  633. x12: 0000000000000000 x13: 0000000000000200
  634. x14: 000000000000000e x15: 00000000ffffffff
  635. x16: 000000009ddab770 x17: 0000000000233e68
  636. x18: 00000000f3ddecf8 x19: 0000000000000000
  637. x20: 0000000000000710 x21: 0000000000000001
  638. x22: 00000000f3dcfe28 x23: 00000000f5eaa190
  639. x24: 00000000f5ec1df0 x25: 00000000f5e90000
  640. x26: 00000000f5e90000 x27: 0000000000000002
  641. x28: 0000000000000001 x29: 00000000f3dcfc40
  642.  
  643.  
  644. Call trace:
  645. PC: [< 0027ac74 >]
  646. LR: [< 00224830 >]
  647.  
  648. Stack:
  649. [< 0027ac74 >]
  650. [< 0021b5bc >]
  651. [< 00211c58 >]
  652. [< 00211d60 >]
  653. [< 002120c4 >]
  654. [< 002289d4 >]
  655. [< 00219d60 >]
  656. [< 00219f04 >]
  657. [< 0021965c >]
  658. [< 00219b1c >]
  659. [< 00219f04 >]
  660. [< 00219618 >]
  661. [< 00227f90 >]
  662. [< 002289d4 >]
  663. [< 00219d60 >]
  664. [< 002199d8 >]
  665. [< 00219f04 >]
  666. [< 00219618 >]
  667. [< 00227f90 >]
  668. [< 002289d4 >]
  669. [< 00219d60 >]
  670. [< 002199d8 >]
  671. [< 00219f04 >]
  672. [< 00219618 >]
  673. [< 00227f90 >]
  674. [< 002289d4 >]
  675. [< 00219d60 >]
  676. [< 002199d8 >]
  677. [< 002199d8 >]
  678. [< 00219f04 >]
  679. [< 00219618 >]
  680. [< 00227f90 >]
  681. [< 002289d4 >]
  682. [< 00219d60 >]
  683. [< 002199d8 >]
  684. [< 00219f04 >]
  685. [< 00219618 >]
  686. [< 00227f90 >]
  687. [< 002289d4 >]
  688. [< 00219d60 >]
  689. [< 00219f04 >]
  690. [< 00219618 >]
  691. [< 00227f90 >]
  692. [< 002289d4 >]
  693. [< 00219d60 >]
  694. [< 00219f04 >]
  695. [< 0021965c >]
  696. [< 00219b1c >]
  697. [< 002199d8 >]
  698. [< 00219f04 >]
  699. [< 00219618 >]
  700. [< 00227f90 >]
  701. [< 002289d4 >]
  702. [< 00219d60 >]
  703. [< 00219f04 >]
  704. [< 00219618 >]
  705. [< 00227ef8 >]
  706. [< 00218018 >]
  707. [< 0021ab10 >]
  708. [< 0027d750 >]
  709. [< 0021ad64 >]
  710. [< 002019e4 >]
  711.  
  712. Copy info from "Call trace..." to a file(eg. dump.txt), and run
  713. command in your U-Boot project: ./scripts/stacktrace.sh dump.txt
  714.  
  715. Resetting CPU ...
  716.  
  717. DDR Version 1.20 20190314
  718. In
  719. soft reset
  720. SRX
  721. channel 0
  722. CS = 0
  723. MR0=0x98
  724. MR4=0x1
  725. MR5=0xFF
  726. MR8=0x8
  727. MR12=0x72
  728. MR14=0x72
  729. MR18=0x0
  730. MR19=0x0
  731. MR24=0x8
  732. MR25=0x0
  733. CS = 1
  734. MR0=0x18
  735. MR4=0x1
  736. MR5=0xFF
  737. MR8=0x8
  738. MR12=0x72
  739. MR14=0x72
  740. MR18=0x0
  741. MR19=0x0
  742. MR24=0x8
  743. MR25=0x0
  744. channel 1
  745. CS = 0
  746. MR0=0x98
  747. MR4=0x1
  748. MR5=0xFF
  749. MR8=0x8
  750. MR12=0x72
  751. MR14=0x72
  752. MR18=0x0
  753. MR19=0x0
  754. MR24=0x8
  755. MR25=0x0
  756. CS = 1
  757. MR0=0x18
  758. MR4=0x1
  759. MR5=0xFF
  760. MR8=0x8
  761. MR12=0x72
  762. MR14=0x72
  763. MR18=0x0
  764. MR19=0x0
  765. MR24=0x8
  766. MR25=0x0
  767. channel 0 training pass!
  768. channel 1 training pass!
  769. change freq to 400MHz 0,1
  770. channel 0
  771. CS = 0
  772. MR0=0x98
  773. MR4=0x1
  774. MR5=0xFF
  775. MR8=0x8
  776. MR12=0x72
  777. MR14=0x72
  778. MR18=0x0
  779. MR19=0x0
  780. MR24=0x8
  781. MR25=0x0
  782. CS = 1
  783. MR0=0x18
  784. MR4=0x1
  785. MR5=0xFF
  786. MR8=0x8
  787. MR12=0x72
  788. MR14=0x72
  789. MR18=0x0
  790. MR19=0x0
  791. MR24=0x8
  792. MR25=0x0
  793. channel 1
  794. CS = 0
  795. MR0=0x98
  796. MR4=0x1
  797. MR5=0xFF
  798. MR8=0x8
  799. MR12=0x72
  800. MR14=0x72
  801. MR18=0x0
  802. MR19=0x0
  803. MR24=0x8
  804. MR25=0x0
  805. CS = 1
  806. MR0=0x18
  807. MR4=0x1
  808. MR5=0xFF
  809. MR8=0x8
  810. MR12=0x72
  811. MR14=0x72
  812. MR18=0x0
  813. MR19=0x0
  814. MR24=0x8
  815. MR25=0x0
  816. channel 0 training pass!
  817. channel 1 training pass!
  818. change freq to 800MHz 1,0
  819. Channel 0: LPDDR4,800MHz
  820. Bus Width=32 Col=10 Bank=8 Row=15/15 CS=2 Die Bus-Width=16 Size=2048MB
  821. Channel 1: LPDDR4,800MHz
  822. Bus Width=32 Col=10 Bank=8 Row=15/15 CS=2 Die Bus-Width=16 Size=2048MB
  823. 256B stride
  824. ch 0 ddrconfig = 0x101, ddrsize = 0x2020
  825. ch 1 ddrconfig = 0x101, ddrsize = 0x2020
  826. pmugrf_os_reg[2] = 0x3AA1FAA1, stride = 0xD
  827. OUT
  828. Boot1: 2019-03-14, version: 1.19
  829. CPUId = 0x0
  830. ChipType = 0x10, 314
  831. SdmmcInit=2 0
  832. BootCapSize=100000
  833. UserCapSize=119276MB
  834. FwPartOffset=2000 , 100000
  835. mmc0:cmd5,20
  836. SdmmcInit=0 0
  837. BootCapSize=0
  838. UserCapSize=15103MB
  839. FwPartOffset=2000 , 0
  840. StorageInit ok = 71716
  841. SecureMode = 0
  842. SecureInit read PBA: 0x4
  843. SecureInit read PBA: 0x404
  844. SecureInit read PBA: 0x804
  845. SecureInit read PBA: 0xc04
  846. SecureInit read PBA: 0x1004
  847. SecureInit read PBA: 0x1404
  848. SecureInit read PBA: 0x1804
  849. SecureInit read PBA: 0x1c04
  850. SecureInit ret = 0, SecureMode = 0
  851. atags_set_bootdev: ret:(0)
  852. GPT part: 0, name: STATE, start:0x4ae000, size:0x60006d
  853. GPT part: 1, name: KERN-A, start:0x5000, size:0x20000
  854. GPT part: 2, name: ROOT-A, start:0xae000, size:0x400000
  855. GPT part: 3, name: KERN-B, start:0x25000, size:0x20000
  856. GPT part: 4, name: ROOT-B, start:0xad000, size:0x1000
  857. GPT part: 5, name: KERN-C, start:0x4040, size:0x1
  858. GPT part: 6, name: ROOT-C, start:0x4041, size:0x1
  859. GPT part: 7, name: OEM, start:0x45000, size:0x8000
  860. GPT part: 8, name: reserved, start:0x4042, size:0x1
  861. GPT part: 9, name: reserved, start:0x4043, size:0x1
  862. GPT part: 10, name: RWFW, start:0x40, size:0x4000
  863. GPT part: 11, name: EFI-SYSTEM, start:0x6d000, size:0x40000
  864. no find partition:uboot.
  865. LoadTrust Addr:0x4000
  866. No find bl30.bin
  867. No find bl32.bin
  868. Load uboot, ReadLba = 2000
  869. Load OK, addr=0x200000, size=0xe5970
  870. RunBL31 0x10000
  871. NOTICE: BL31: v1.3(debug):22b599a
  872. NOTICE: BL31: Built : 11:03:32, Jul 10 2019
  873. NOTICE: BL31: Rockchip release version: v1.1
  874. INFO: GICv3 with legacy support detected. ARM GICV3 driver initialized in EL3
  875. INFO: Using opteed sec cpu_context!
  876. INFO: boot cpu mask: 0
  877. INFO: plat_rockchip_pmu_init(1181): pd status 3e
  878. INFO: BL31: Initializing runtime services
  879. WARNING: No OPTEE provided by BL2 boot loader, Booting device without OPTEE initialization. SMC`s destined for OPTEE will return SMC_UNK
  880. ERROR: Error initializing runtime service opteed_fast
  881. INFO: BL31: Preparing for EL3 exit to normal world
  882. INFO: Entry point address = 0x200000
  883. INFO: SPSR = 0x3c9
  884. fdtdec_get_addr_size_fixed: reg: addr=ff770000, size=10000
  885. fdtdec_get_addr_size_fixed: reg: addr=ff320000, size=1000
  886.  
  887.  
  888. U-Boot 2017.09-04112-gb8e0774-dirty (Feb 07 2020 - 12:45:13 -0500)
  889.  
  890. Model: Pine64 RK3399 Pinebook Pro
  891. PreSerial: 2
  892. DRAM: 3.9 GiB
  893. Sysmem: init
  894. Relocation Offset: f5be7000, fdt: f3dd2238
  895. I2c0 speed: 400000Hz
  896. PMIC: RK808
  897. vdd_center 900000 uV
  898. vdd_log init 900000 uV
  899. rk_board_init PWM2 pinctrl init fail!
  900. rk_board_init: vcc3v0_sdio cannot set regulator value -38
  901. vdd_center 900000 uV
  902. DCDC_REG1@ vdd_center: 750000uV <-> 1400000uV, set 900000uV, enabling | suspend -61uV, disabled
  903. DCDC_REG4@ vcc_1v8: 1800000uV <-> 1800000uV, set 1800000uV, enabling | suspend 1800000uV, enabling
  904. LDO_REG1@ vcc1v8_dvp: 1800000uV <-> 1800000uV, set 1800000uV, enabling | suspend 1800000uV, enabling
  905. LDO_REG4@ vcc_sd: 3300000uV <-> 3300000uV, set 3300000uV, enabling | suspend 3300000uV, enabling
  906. LDO_REG5@ vcca3v0_codec: 3000000uV <-> 3000000uV, set 3000000uV, enabling | suspend 3000000uV, enabling
  907. LDO_REG7@ vcca1v8_codec: 1800000uV <-> 1800000uV, set 1800000uV, enabling | suspend 1800000uV, enabling
  908. LDO_REG8@ vcc_3v0: 3000000uV <-> 3000000uV, set 3000000uV, enabling | suspend 3000000uV, enabling
  909. SWITCH_REG2@ vcc3v3_s0: -61uV <-> -61uV, set 0uV, enabling | suspend -61uV, disabled
  910. dc-12v@ dc_12v: 12000000uV <-> 12000000uV, set 12000000uV, enabling | suspend -61uV, enabling (ret: -38)
  911. vcc-sys@ vcc_sys: 5000000uV <-> 5000000uV, set 5000000uV, enabling | suspend -61uV, enabling (ret: -38)
  912. vcc3v3-sys@ vcc3v3_sys: 3300000uV <-> 3300000uV, set 3300000uV, enabling | suspend -61uV, enabling (ret: -38)
  913. vcc-phy-regulator@ vcc_phy: -61uV <-> -61uV, set -61uV, enabling | suspend -61uV, enabling
  914. led-regulator@ led_regulator: -61uV <-> -61uV, set -61uV, enabling | suspend -61uV, enabling
  915. vcc5v0-host-en@ vcc5v0_host: 5000000uV <-> 5000000uV, set 5000000uV, enabling | suspend -61uV, enabling (ret: -38)
  916. vcc5v0-usb3-host-regulator@vcc5v0_usb3_host: -61uV <-> -61uV, set -61uV, enabling | suspend -61uV, enabling
  917. vcc5v0-typec0-en@ vcc5v0_typec0: -61uV <-> -61uV, set -61uV, enabling | suspend -61uV, enabling
  918. vcc3v3-pcie-regulator@ vcc3v3_pcie: 3300000uV <-> 3300000uV, set 3300000uV, disabled | suspend -61uV, enabling
  919. vcc1v8-sdio@ vcc1v8_sdio: 1800000uV <-> 1800000uV, set 1800000uV, enabling | suspend -61uV, enabling (ret: -38)
  920. vcc3v0-sdio@ vcc3v0_sdio: 3000000uV <-> 3000000uV, set 3000000uV, enabling | suspend -61uV, enabling ; init 3000000uV (ret: -38)
  921. vdd_log init 900000 uV
  922. vdd_log@ vdd_log: 800000uV <-> 1400000uV, set 900000uV, enabling | suspend -61uV, enabling ; init 900000uV
  923. MMC: dwmmc@fe310000: 2, sdhci@fe330000: 0, dwmmc@fe320000: 1
  924. Invalid bus 0 (err=-19)
  925. *** Warning - spi_flash_probe_bus_cs() failed, using default environment
  926.  
  927. In: serial
  928. Out: serial
  929. Err: serial
  930. Model: Pine64 RK3399 Pinebook Pro
  931. switch to partitions #0, OK
  932. mmc1 is current device
  933. Found IDB in SDcard
  934. Bootdev(atags): mmc 1
  935. PartType: EFI
  936. rockchip_get_boot_mode: Could not found misc partition
  937. boot mode: None
  938. init_resource_list: failed to get resource part, ret=-1
  939. Can't find file:logo.bmp
  940. failed to display uboot logo
  941. CLK: (uboot. arml: enter 816000 KHz, init 816000 KHz, kernel 0N/A)
  942. CLK: (uboot. armb: enter 816000 KHz, init 816000 KHz, kernel 0N/A)
  943. aplll 816000 KHz
  944. apllb 816000 KHz
  945. dpll 800000 KHz
  946. cpll 24000 KHz
  947. gpll 800000 KHz
  948. npll 600000 KHz
  949. vpll 24000 KHz
  950. aclk_perihp 133333 KHz
  951. hclk_perihp 66666 KHz
  952. pclk_perihp 33333 KHz
  953. aclk_perilp0 266666 KHz
  954. hclk_perilp0 88888 KHz
  955. pclk_perilp0 44444 KHz
  956. hclk_perilp1 100000 KHz
  957. pclk_perilp1 50000 KHz
  958. Net: No ethernet found.
  959. Hit key to stop autoboot('CTRL+C'): 0
  960. do_boot_rockchip: Could not find EFI-SYSTEM part
  961. Checking for mmc dev 1...
  962. switch to partitions #0, OK
  963. mmc1 is current device
  964. Scanning mmc 1 for bootable partitions...
  965. Scanning mmc 1:c for extlinux or boot scripts...
  966. Found /extlinux/extlinux.conf
  967. Retrieving file: /extlinux/extlinux.conf
  968. reading /extlinux/extlinux.conf
  969. 274 bytes read in 4 ms (66.4 KiB/s)
  970. Boot Menu
  971. 1: 5.9.0-rc4-00034-g7fe10096c150
  972. Enter choice: 1: 5.9.0-rc4-00034-g7fe10096c150
  973. Retrieving file: /Image-5.9.0-rc4-00034-g7fe10096c150
  974. reading /Image-5.9.0-rc4-00034-g7fe10096c150
  975. 26139136 bytes read in 1096 ms (22.7 MiB/s)
  976. append: earlyprintk console=ttyS2,1500000n8 rw root=/dev/p rootfstype=ext4 init=/sbin/init rootwait cros_debug loglevel=7
  977. "Synchronous Abort" handler, esr 0x96000010
  978.  
  979. * Reason: Exception from a Data abort, from current exception level
  980. * PC = 000000000027ac74
  981. * LR = 0000000000224830
  982. * SP = 00000000f3dcfa60
  983. * ESR_EL2 = 0000000096000010
  984. * Reloc Off = 00000000f5be7000
  985.  
  986. x0 : 0000000000000000 x1 : 0000000000000000
  987. x2 : 0000000000000001 x3 : 00000000f3dcfe28
  988. x4 : 0000000000000710 x5 : 00000000f5ec1cb0
  989. x6 : 0000000000000001 x7 : 00000000f5ea3118
  990. x8 : 00000000f3e198d0 x9 : 0000000000000008
  991. x10: 00000000f3e09e20 x11: 00000000f3e15148
  992. x12: 0000000000000000 x13: 0000000000000200
  993. x14: 000000000000000e x15: 00000000ffffffff
  994. x16: 000000009ddab770 x17: 0000000000233e68
  995. x18: 00000000f3ddecf8 x19: 0000000000000000
  996. x20: 0000000000000710 x21: 0000000000000001
  997. x22: 00000000f3dcfe28 x23: 00000000f5eaa190
  998. x24: 00000000f5ec1df0 x25: 00000000f5e90000
  999. x26: 00000000f5e90000 x27: 0000000000000002
  1000. x28: 0000000000000001 x29: 00000000f3dcfc40
  1001.  
  1002.  
  1003. Call trace:
  1004. PC: [< 0027ac74 >]
  1005. LR: [< 00224830 >]
  1006.  
  1007. Stack:
  1008. [< 0027ac74 >]
  1009. [< 0021b5bc >]
  1010. [< 00211c58 >]
  1011. [< 00211d60 >]
  1012. [< 002120c4 >]
  1013. [< 002289d4 >]
  1014. [< 00219d60 >]
  1015. [< 00219f04 >]
  1016. [< 0021965c >]
  1017. [< 00219b1c >]
  1018. [< 00219f04 >]
  1019. [< 00219618 >]
  1020. [< 00227f90 >]
  1021. [< 002289d4 >]
  1022. [< 00219d60 >]
  1023. [< 002199d8 >]
  1024. [< 00219f04 >]
  1025. [< 00219618 >]
  1026. [< 00227f90 >]
  1027. [< 002289d4 >]
  1028. [< 00219d60 >]
  1029. [< 002199d8 >]
  1030. [< 00219f04 >]
  1031. [< 00219618 >]
  1032. [< 00227f90 >]
  1033. [< 002289d4 >]
  1034. [< 00219d60 >]
  1035. [< 002199d8 >]
  1036. [< 002199d8 >]
  1037. [< 00219f04 >]
  1038. [< 00219618 >]
  1039. [< 00227f90 >]
  1040. [< 002289d4 >]
  1041. [< 00219d60 >]
  1042. [< 002199d8 >]
  1043. [< 00219f04 >]
  1044. [< 00219618 >]
  1045. [< 00227f90 >]
  1046. [< 002289d4 >]
  1047. [< 00219d60 >]
  1048. [< 00219f04 >]
  1049. [< 00219618 >]
  1050. [< 00227f90 >]
  1051. [< 002289d4 >]
  1052. [< 00219d60 >]
  1053. [< 00219f04 >]
  1054. [< 0021965c >]
  1055. [< 00219b1c >]
  1056. [< 002199d8 >]
  1057. [< 00219f04 >]
  1058. [< 00219618 >]
  1059. [< 00227f90 >]
  1060. [< 002289d4 >]
  1061. [< 00219d60 >]
  1062. [< 00219f04 >]
  1063. [< 00219618 >]
  1064. [< 00227ef8 >]
  1065. [< 00218018 >]
  1066. [< 0021ab10 >]
  1067. [< 0027d750 >]
  1068. [< 0021ad64 >]
  1069. [< 002019e4 >]
  1070.  
  1071. Copy info from "Call trace..." to a file(eg. dump.txt), and run
  1072. command in your U-Boot project: ./scripts/stacktrace.sh dump.txt
  1073.  
  1074. Resetting CPU ...
  1075.  
  1076. DDR Version 1.20 20190314
  1077. In
  1078. soft reset
  1079. SRX
  1080. channel 0
  1081. CS = 0
  1082. MR0=0x98
  1083. MR4=0x1
  1084. MR5=0xFF
  1085. MR8=0x8
  1086. MR12=0x72
  1087. MR14=0x72
  1088. MR18=0x0
  1089. MR19=0x0
  1090. MR24=0x8
  1091. MR25=0x0
  1092. CS = 1
  1093. MR0=0x18
  1094. MR4=0x1
  1095. MR5=0xFF
  1096. MR8=0x8
  1097. MR12=0x72
  1098. MR14=0x72
  1099. MR18=0x0
  1100. MR19=0x0
  1101. MR24=0x8
  1102. MR25=0x0
  1103. channel 1
  1104. CS = 0
  1105. MR0=0x98
  1106. MR4=0x1
  1107. MR5=0xFF
  1108. MR8=0x8
  1109. MR12=0x72
  1110. MR14=0x72
  1111. MR18=0x0
  1112. MR19=0x0
  1113. MR24=0x8
  1114. MR25=0x0
  1115. CS = 1
  1116. MR0=0x18
  1117. MR4=0x1
  1118. MR5=0xFF
  1119. MR8=0x8
  1120. MR12=0x72
  1121. MR14=0x72
  1122. MR18=0x0
  1123. MR19=0x0
  1124. MR24=0x8
  1125. MR25=0x0
  1126. channel 0 training pass!
  1127. channel 1 training pass!
  1128. change freq to 400MHz 0,1
  1129. channel 0
  1130. CS = 0
  1131. MR0=0x98
  1132. MR4=0x1
  1133. MR5=0xFF
  1134. MR8=0x8
  1135. MR12=0x72
  1136. MR14=0x72
  1137. MR18=0x0
  1138. MR19=0x0
  1139. MR24=0x8
  1140. MR25=0x0
  1141. CS = 1
  1142. MR0=0x18
  1143. MR4=0x1
  1144. MR5=0xFF
  1145. MR8=0x8
  1146. MR12=0x72
  1147. MR14=0x72
  1148. MR18=0x0
  1149. MR19=0x0
  1150. MR24=0x8
  1151. MR25=0x0
  1152. channel 1
  1153. CS = 0
  1154. MR0=0x98
  1155. MR4=0x1
  1156. MR5=0xFF
  1157. MR8=0x8
  1158. MR12=0x72
  1159. MR14=0x72
  1160. MR18=0x0
  1161. MR19=0x0
  1162. MR24=0x8
  1163. MR25=0x0
  1164. CS = 1
  1165. MR0=0x18
  1166. MR4=0x1
  1167. MR5=0xFF
  1168. MR8=0x8
  1169. MR12=0x72
  1170. MR14=0x72
  1171. MR18=0x0
  1172. MR19=0x0
  1173. MR24=0x8
  1174. MR25=0x0
  1175. channel 0 training pass!
  1176. channel 1 training pass!
  1177. change freq to 800MHz 1,0
  1178. Channel 0: LPDDR4,800MHz
  1179. Bus Width=32 Col=10 Bank=8 Row=15/15 CS=2 Die Bus-Width=16 Size=2048MB
  1180. Channel 1: LPDDR4,800MHz
  1181. Bus Width=32 Col=10 Bank=8 Row=15/15 CS=2 Die Bus-Width=16 Size=2048MB
  1182. 256B stride
  1183. ch 0 ddrconfig = 0x101, ddrsize = 0x2020
  1184. ch 1 ddrconfig = 0x101, ddrsize = 0x2020
  1185. pmugrf_os_reg[2] = 0x3AA1FAA1, stride = 0xD
  1186. OUT
  1187. Boot1: 2019-03-14, version: 1.19
  1188. CPUId = 0x0
  1189. ChipType = 0x10, 314
  1190. SdmmcInit=2 0
  1191. BootCapSize=100000
  1192. UserCapSize=119276MB
  1193. FwPartOffset=2000 , 100000
  1194. mmc0:cmd5,20
  1195. SdmmcInit=0 0
  1196. BootCapSize=0
  1197. UserCapSize=15103MB
  1198. FwPartOffset=2000 , 0
  1199. StorageInit ok = 69338
  1200. SecureMode = 0
  1201. SecureInit read PBA: 0x4
  1202. SecureInit read PBA: 0x404
  1203. SecureInit read PBA: 0x804
  1204. SecureInit read PBA: 0xc04
  1205. SecureInit read PBA: 0x1004
  1206. SecureInit read PBA: 0x1404
  1207. SecureInit read PBA: 0x1804
  1208. SecureInit read PBA: 0x1c04
  1209. SecureInit ret = 0, SecureMode = 0
  1210. atags_set_bootdev: ret:(0)
  1211. GPT part: 0, name: STATE, start:0x4ae000, size:0x60006d
  1212. GPT part: 1, name: KERN-A, start:0x5000, size:0x20000
  1213. GPT part: 2, name: ROOT-A, start:0xae000, size:0x400000
  1214. GPT part: 3, name: KERN-B, start:0x25000, size:0x20000
  1215. GPT part: 4, name: ROOT-B, start:0xad000, size:0x1000
  1216. GPT part: 5, name: KERN-C, start:0x4040, size:0x1
  1217. GPT part: 6, name: ROOT-C, start:0x4041, size:0x1
  1218. GPT part: 7, name: OEM, start:0x45000, size:0x8000
  1219. GPT part: 8, name: reserved, start:0x4042, size:0x1
  1220. GPT part: 9, name: reserved, start:0x4043, size:0x1
  1221. GPT part: 10, name: RWFW, start:0x40, size:0x4000
  1222. GPT part: 11, name: EFI-SYSTEM, start:0x6d000, size:0x40000
  1223. no find partition:uboot.
  1224. LoadTrust Addr:0x4000
  1225. No find bl30.bin
  1226. No find bl32.bin
  1227. Load uboot, ReadLba = 2000
  1228. Load OK, addr=0x200000, size=0xe5970
  1229. RunBL31 0x10000
  1230. NOTICE: BL31: v1.3(debug):22b599a
  1231. NOTICE: BL31: Built : 11:03:32, Jul 10 2019
  1232. NOTICE: BL31: Rockchip release version: v1.1
  1233. INFO: GICv3 with legacy support detected. ARM GICV3 driver initialized in EL3
  1234. INFO: Using opteed sec cpu_context!
  1235. INFO: boot cpu mask: 0
  1236. INFO: plat_rockchip_pmu_init(1181): pd status 3e
  1237. INFO: BL31: Initializing runtime services
  1238. WARNING: No OPTEE provided by BL2 boot loader, Booting device without OPTEE initialization. SMC`s destined for OPTEE will return SMC_UNK
  1239. ERROR: Error initializing runtime service opteed_fast
  1240. INFO: BL31: Preparing for EL3 exit to normal world
  1241. INFO: Entry point address = 0x200000
  1242. INFO: SPSR = 0x3c9
  1243. fdtdec_get_addr_size_fixed: reg: addr=ff770000, size=10000
  1244. fdtdec_get_addr_size_fixed: reg: addr=ff320000, size=1000
  1245.  
  1246.  
  1247. U-Boot 2017.09-04112-gb8e0774-dirty (Feb 07 2020 - 12:45:13 -0500)
  1248.  
  1249. Model: Pine64 RK3399 Pinebook Pro
  1250. PreSerial: 2
  1251. DRAM: 3.9 GiB
  1252. Sysmem: init
  1253. Relocation Offset: f5be7000, fdt: f3dd2238
  1254. I2c0 speed: 400000Hz
  1255. PMIC: RK808
  1256. vdd_center 900000 uV
  1257. vdd_log init 900000 uV
  1258. rk_board_init PWM2 pinctrl init fail!
  1259. rk_board_init: vcc3v0_sdio cannot set regulator value -38
  1260. vdd_center 900000 uV
  1261. DCDC_REG1@ vdd_center: 750000uV <-> 1400000uV, set 900000uV, enabling | suspend -61uV, disabled
  1262. DCDC_REG4@ vcc_1v8: 1800000uV <-> 1800000uV, set 1800000uV, enabling | suspend 1800000uV, enabling
  1263. LDO_REG1@ vcc1v8_dvp: 1800000uV <-> 1800000uV, set 1800000uV, enabling | suspend 1800000uV, enabling
  1264. LDO_REG4@ vcc_sd: 3300000uV <-> 3300000uV, set 3300000uV, enabling | suspend 3300000uV, enabling
  1265. LDO_REG5@ vcca3v0_codec: 3000000uV <-> 3000000uV, set 3000000uV, enabling | suspend 3000000uV, enabling
  1266. LDO_REG7@ vcca1v8_codec: 1800000uV <-> 1800000uV, set 1800000uV, enabling | suspend 1800000uV, enabling
  1267. LDO_REG8@ vcc_3v0: 3000000uV <-> 3000000uV, set 3000000uV, enabling | suspend 3000000uV, enabling
  1268. SWITCH_REG2@ vcc3v3_s0: -61uV <-> -61uV, set 0uV, enabling | suspend -61uV, disabled
  1269. dc-12v@ dc_12v: 12000000uV <-> 12000000uV, set 12000000uV, enabling | suspend -61uV, enabling (ret: -38)
  1270. vcc-sys@ vcc_sys: 5000000uV <-> 5000000uV, set 5000000uV, enabling | suspend -61uV, enabling (ret: -38)
  1271. vcc3v3-sys@ vcc3v3_sys: 3300000uV <-> 3300000uV, set 3300000uV, enabling | suspend -61uV, enabling (ret: -38)
  1272. vcc-phy-regulator@ vcc_phy: -61uV <-> -61uV, set -61uV, enabling | suspend -61uV, enabling
  1273. led-regulator@ led_regulator: -61uV <-> -61uV, set -61uV, enabling | suspend -61uV, enabling
  1274. vcc5v0-host-en@ vcc5v0_host: 5000000uV <-> 5000000uV, set 5000000uV, enabling | suspend -61uV, enabling (ret: -38)
  1275. vcc5v0-usb3-host-regulator@vcc5v0_usb3_host: -61uV <-> -61uV, set -61uV, enabling | suspend -61uV, enabling
  1276. vcc5v0-typec0-en@ vcc5v0_typec0: -61uV <-> -61uV, set -61uV, enabling | suspend -61uV, enabling
  1277. vcc3v3-pcie-regulator@ vcc3v3_pcie: 3300000uV <-> 3300000uV, set 3300000uV, disabled | suspend -61uV, enabling
  1278. vcc1v8-sdio@ vcc1v8_sdio: 1800000uV <-> 1800000uV, set 1800000uV, enabling | suspend -61uV, enabling (ret: -38)
  1279. vcc3v0-sdio@ vcc3v0_sdio: 3000000uV <-> 3000000uV, set 3000000uV, enabling | suspend -61uV, enabling ; init 3000000uV (ret: -38)
  1280. vdd_log init 900000 uV
  1281. vdd_log@ vdd_log: 800000uV <-> 1400000uV, set 900000uV, enabling | suspend -61uV, enabling ; init 900000uV
  1282. MMC: dwmmc@fe310000: 2, sdhci@fe330000: 0, dwmmc@fe320000: 1
  1283. Invalid bus 0 (err=-19)
  1284. *** Warning - spi_flash_probe_bus_cs() failed, using default environment
  1285.  
  1286. In: serial
  1287. Out: serial
  1288. Err: serial
  1289. Model: Pine64 RK3399 Pinebook Pro
  1290. switch to partitions #0, OK
  1291. mmc1 is current device
  1292. Found IDB in SDcard
  1293. Bootdev(atags): mmc 1
  1294. PartType: EFI
  1295. rockchip_get_boot_mode: Could not found misc partition
  1296. boot mode: None
  1297. init_resource_list: failed to get resource part, ret=-1
  1298. Can't find file:logo.bmp
  1299. failed to display uboot logo
  1300. CLK: (uboot. arml: enter 816000 KHz, init 816000 KHz, kernel 0N/A)
  1301. CLK: (uboot. armb: enter 816000 KHz, init 816000 KHz, kernel 0N/A)
  1302. aplll 816000 KHz
  1303. apllb 816000 KHz
  1304. dpll 800000 KHz
  1305. cpll 24000 KHz
  1306. gpll 800000 KHz
  1307. npll 600000 KHz
  1308. vpll 24000 KHz
  1309. aclk_perihp 133333 KHz
  1310. hclk_perihp 66666 KHz
  1311. pclk_perihp 33333 KHz
  1312. aclk_perilp0 266666 KHz
  1313. hclk_perilp0 88888 KHz
  1314. pclk_perilp0 44444 KHz
  1315. hclk_perilp1 100000 KHz
  1316. pclk_perilp1 50000 KHz
  1317. Net: No ethernet found.
  1318. Hit key to stop autoboot('CTRL+C'): 0
  1319. do_boot_rockchip: Could not find EFI-SYSTEM part
  1320. Checking for mmc dev 1...
  1321. switch to partitions #0, OK
  1322. mmc1 is current device
  1323. Scanning mmc 1 for bootable partitions...
  1324. Scanning mmc 1:c for extlinux or boot scripts...
  1325. Found /extlinux/extlinux.conf
  1326. Retrieving file: /extlinux/extlinux.conf
  1327. reading /extlinux/extlinux.conf
  1328. 274 bytes read in 4 ms (66.4 KiB/s)
  1329. Boot Menu
  1330. 1: 5.9.0-rc4-00034-g7fe10096c150
  1331. Enter choice: 1: 5.9.0-rc4-00034-g7fe10096c150
  1332. Retrieving file: /Image-5.9.0-rc4-00034-g7fe10096c150
  1333. reading /Image-5.9.0-rc4-00034-g7fe10096c150
  1334. 26139136 bytes read in 1096 ms (22.7 MiB/s)
  1335. append: earlyprintk console=ttyS2,1500000n8 rw root=/dev/p rootfstype=ext4 init=/sbin/init rootwait cros_debug loglevel=7
  1336. "Synchronous Abort" handler, esr 0x96000010
  1337.  
  1338. * Reason: Exception from a Data abort, from current exception level
  1339. * PC = 000000000027ac74
  1340. * LR = 0000000000224830
  1341. * SP = 00000000f3dcfa60
  1342. * ESR_EL2 = 0000000096000010
  1343. * Reloc Off = 00000000f5be7000
  1344.  
  1345. x0 : 0000000000000000 x1 : 0000000000000000
  1346. x2 : 0000000000000001 x3 : 00000000f3dcfe28
  1347. x4 : 0000000000000710 x5 : 00000000f5ec1cb0
  1348. x6 : 0000000000000001 x7 : 00000000f5ea3118
  1349. x8 : 00000000f3e198d0 x9 : 0000000000000008
  1350. x10: 00000000f3e09e20 x11: 00000000f3e15148
  1351. x12: 0000000000000000 x13: 0000000000000200
  1352. x14: 000000000000000e x15: 00000000ffffffff
  1353. x16: 000000009ddab770 x17: 0000000000233e68
  1354. x18: 00000000f3ddecf8 x19: 0000000000000000
  1355. x20: 0000000000000710 x21: 0000000000000001
  1356. x22: 00000000f3dcfe28 x23: 00000000f5eaa190
  1357. x24: 00000000f5ec1df0 x25: 00000000f5e90000
  1358. x26: 00000000f5e90000 x27: 0000000000000002
  1359. x28: 0000000000000001 x29: 00000000f3dcfc40
  1360.  
  1361.  
  1362. Call trace:
  1363. PC: [< 0027ac74 >]
  1364. LR: [< 00224830 >]
  1365.  
  1366. Stack:
  1367. [< 0027ac74 >]
  1368. [< 0021b5bc >]
  1369. [< 00211c58 >]
  1370. [< 00211d60 >]
  1371. [< 002120c4 >]
  1372. [< 002289d4 >]
  1373. [< 00219d60 >]
  1374. [< 00219f04 >]
  1375. [< 0021965c >]
  1376. [< 00219b1c >]
  1377. [< 00219f04 >]
  1378. [< 00219618 >]
  1379. [< 00227f90 >]
  1380. [< 002289d4 >]
  1381. [< 00219d60 >]
  1382. [< 002199d8 >]
  1383. [< 00219f04 >]
  1384. [< 00219618 >]
  1385. [< 00227f90 >]
  1386. [< 002289d4 >]
  1387. [< 00219d60 >]
  1388. [< 002199d8 >]
  1389. [< 00219f04 >]
  1390. [< 00219618 >]
  1391. [< 00227f90 >]
  1392. [< 002289d4 >]
  1393. [< 00219d60 >]
  1394. [< 002199d8 >]
  1395. [< 002199d8 >]
  1396. [< 00219f04 >]
  1397. [< 00219618 >]
  1398. [< 00227f90 >]
  1399. [< 002289d4 >]
  1400. [< 00219d60 >]
  1401. [< 002199d8 >]
  1402. [< 00219f04 >]
  1403. [< 00219618 >]
  1404. [< 00227f90 >]
  1405. [< 002289d4 >]
  1406. [< 00219d60 >]
  1407. [< 00219f04 >]
  1408. [< 00219618 >]
  1409. [< 00227f90 >]
  1410. [< 002289d4 >]
  1411. [< 00219d60 >]
  1412. [< 00219f04 >]
  1413. [< 0021965c >]
  1414. [< 00219b1c >]
  1415. [< 002199d8 >]
  1416. [< 00219f04 >]
  1417. [< 00219618 >]
  1418. [< 00227f90 >]
  1419. [< 002289d4 >]
  1420. [< 00219d60 >]
  1421. [< 00219f04 >]
  1422. [< 00219618 >]
  1423. [< 00227ef8 >]
  1424. [< 00218018 >]
  1425. [< 0021ab10 >]
  1426. [< 0027d750 >]
  1427. [< 0021ad64 >]
  1428. [< 002019e4 >]
  1429.  
  1430. Copy info from "Call trace..." to a file(eg. dump.txt), and run
  1431. command in your U-Boot project: ./scripts/stacktrace.sh dump.txt
  1432.  
  1433. Resetting CPU ...
  1434.  
  1435. DDR Version 1.20 20190314
  1436. In
  1437. soft reset
  1438. SRX
  1439. channel 0
  1440. CS = 0
  1441. MR0=0x98
  1442. MR4=0x1
  1443. MR5=0xFF
  1444. MR8=0x8
  1445. MR12=0x72
  1446. MR14=0x72
  1447. MR18=0x0
  1448. MR19=0x0
  1449. MR24=0x8
  1450. MR25=0x0
  1451. CS = 1
  1452. MR0=0x18
  1453. MR4=0x1
  1454. MR5=0xFF
  1455. MR8=0x8
  1456. MR12=0x72
  1457. MR14=0x72
  1458. MR18=0x0
  1459. MR19=0x0
  1460. MR24=0x8
  1461. MR25=0x0
  1462. channel 1
  1463. CS = 0
  1464. MR0=0x98
  1465. MR4=0x1
  1466. MR5=0xFF
  1467. MR8=0x8
  1468. MR12=0x72
  1469. MR14=0x72
  1470. MR18=0x0
  1471. MR19=0x0
  1472. MR24=0x8
  1473. MR25=0x0
  1474. CS = 1
  1475. MR0=0x18
  1476. MR4=0x1
  1477. MR5=0xFF
  1478. MR8=0x8
  1479. MR12=0x72
  1480. MR14=0x72
  1481. MR18=0x0
  1482. MR19=0x0
  1483. MR24=0x8
  1484. MR25=0x0
  1485. channel 0 training pass!
  1486. channel 1 training pass!
  1487. change freq to 400MHz 0,1
  1488. channel 0
  1489. CS = 0
  1490. MR0=0x98
  1491. MR4=0x1
  1492. MR5=0xFF
  1493. MR8=0x8
  1494. MR12=0x72
  1495. MR14=0x72
  1496. MR18=0x0
  1497. MR19=0x0
  1498. MR24=0x8
  1499. MR25=0x0
  1500. CS = 1
  1501. MR0=0x18
  1502. MR4=0x1
  1503. MR5=0xFF
  1504. MR8=0x8
  1505. MR12=0x72
  1506. MR14=0x72
  1507. MR18=0x0
  1508. MR19=0x0
  1509. MR24=0x8
  1510. MR25=0x0
  1511. channel 1
  1512. CS = 0
  1513. MR0=0x98
  1514. MR4=0x1
  1515. MR5=0xFF
  1516. MR8=0x8
  1517. MR12=0x72
  1518. MR14=0x72
  1519. MR18=0x0
  1520. MR19=0x0
  1521. MR24=0x8
  1522. MR25=0x0
  1523. CS = 1
  1524. MR0=0x18
  1525. MR4=0x1
  1526. MR5=0xFF
  1527. MR8=0x8
  1528. MR12=0x72
  1529. MR14=0x72
  1530. MR18=0x0
  1531. MR19=0x0
  1532. MR24=0x8
  1533. MR25=0x0
  1534. channel 0 training pass!
  1535. channel 1 training pass!
  1536. change freq to 800MHz 1,0
  1537. Channel 0: LPDDR4,800MHz
  1538. Bus Width=32 Col=10 Bank=8 Row=15/15 CS=2 Die Bus-Width=16 Size=2048MB
  1539. Channel 1: LPDDR4,800MHz
  1540. Bus Width=32 Col=10 Bank=8 Row=15/15 CS=2 Die Bus-Width=16 Size=2048MB
  1541. 256B stride
  1542. ch 0 ddrconfig = 0x101, ddrsize = 0x2020
  1543. ch 1 ddrconfig = 0x101, ddrsize = 0x2020
  1544. pmugrf_os_reg[2] = 0x3AA1FAA1, stride = 0xD
  1545. OUT
  1546. Boot1: 2019-03-14, version: 1.19
  1547. CPUId = 0x0
  1548. ChipType = 0x10, 315
  1549. SdmmcInit=2 0
  1550. BootCapSize=100000
  1551. UserCapSize=119276MB
  1552. FwPartOffset=2000 , 100000
  1553. mmc0:cmd5,20
  1554. SdmmcInit=0 0
  1555. BootCapSize=0
  1556. UserCapSize=15103MB
  1557. FwPartOffset=2000 , 0
  1558. StorageInit ok = 70258
  1559. SecureMode = 0
  1560. SecureInit read PBA: 0x4
  1561. SecureInit read PBA: 0x404
  1562. SecureInit read PBA: 0x804
  1563. SecureInit read PBA: 0xc04
  1564. SecureInit read PBA: 0x1004
  1565. SecureInit read PBA: 0x1404
  1566. SecureInit read PBA: 0x1804
  1567. SecureInit read PBA: 0x1c04
  1568. SecureInit ret = 0, SecureMode = 0
  1569. atags_set_bootdev: ret:(0)
  1570. GPT part: 0, name: STATE, start:0x4ae000, size:0x60006d
  1571. GPT part: 1, name: KERN-A, start:0x5000, size:0x20000
  1572. GPT part: 2, name: ROOT-A, start:0xae000, size:0x400000
  1573. GPT part: 3, name: KERN-B, start:0x25000, size:0x20000
  1574. GPT part: 4, name: ROOT-B, start:0xad000, size:0x1000
  1575. GPT part: 5, name: KERN-C, start:0x4040, size:0x1
  1576. GPT part: 6, name: ROOT-C, start:0x4041, size:0x1
  1577. GPT part: 7, name: OEM, start:0x45000, size:0x8000
  1578. GPT part: 8, name: reserved, start:0x4042, size:0x1
  1579. GPT part: 9, name: reserved, start:0x4043, size:0x1
  1580. GPT part: 10, name: RWFW, start:0x40, size:0x4000
  1581. GPT part: 11, name: EFI-SYSTEM, start:0x6d000, size:0x40000
  1582. no find partition:uboot.
  1583. LoadTrust Addr:0x4000
  1584. No find bl30.bin
  1585. No find bl32.bin
  1586. Load uboot, ReadLba = 2000
  1587. Load OK, addr=0x200000, size=0xe5970
  1588. RunBL31 0x10000
  1589. NOTICE: BL31: v1.3(debug):22b599a
  1590. NOTICE: BL31: Built : 11:03:32, Jul 10 2019
  1591. NOTICE: BL31: Rockchip release version: v1.1
  1592. INFO: GICv3 with legacy support detected. ARM GICV3 driver initialized in EL3
  1593. INFO: Using opteed sec cpu_context!
  1594. INFO: boot cpu mask: 0
  1595. INFO: plat_rockchip_pmu_init(1181): pd status 3e
  1596. INFO: BL31: Initializing runtime services
  1597. WARNING: No OPTEE provided by BL2 boot loader, Booting device without OPTEE initialization. SMC`s destined for OPTEE will return SMC_UNK
  1598. ERROR: Error initializing runtime service opteed_fast
  1599. INFO: BL31: Preparing for EL3 exit to normal world
  1600. INFO: Entry point address = 0x200000
  1601. INFO: SPSR = 0x3c9
  1602. fdtdec_get_addr_size_fixed: reg: addr=ff770000, size=10000
  1603. fdtdec_get_addr_size_fixed: reg: addr=ff320000, size=1000
  1604.  
  1605.  
  1606. U-Boot 2017.09-04112-gb8e0774-dirty (Feb 07 2020 - 12:45:13 -0500)
  1607.  
  1608. Model: Pine64 RK3399 Pinebook Pro
  1609. PreSerial: 2
  1610. DRAM: 3.9 GiB
  1611. Sysmem: init
  1612. Relocation Offset: f5be7000, fdt: f3dd2238
  1613. I2c0 speed: 400000Hz
  1614. PMIC: RK808
  1615. vdd_center 900000 uV
  1616. vdd_log init 900000 uV
  1617. rk_board_init PWM2 pinctrl init fail!
  1618. rk_board_init: vcc3v0_sdio cannot set regulator value -38
  1619. vdd_center 900000 uV
  1620. DCDC_REG1@ vdd_center: 750000uV <-> 1400000uV, set 900000uV, enabling | suspend -61uV, disabled
  1621. DCDC_REG4@ vcc_1v8: 1800000uV <-> 1800000uV, set 1800000uV, enabling | suspend 1800000uV, enabling
  1622. LDO_REG1@ vcc1v8_dvp: 1800000uV <-> 1800000uV, set 1800000uV, enabling | suspend 1800000uV, enabling
  1623. LDO_REG4@ vcc_sd: 3300000uV <-> 3300000uV, set 3300000uV, enabling | suspend 3300000uV, enabling
  1624. LDO_REG5@ vcca3v0_codec: 3000000uV <-> 3000000uV, set 3000000uV, enabling | suspend 3000000uV, enabling
  1625. LDO_REG7@ vcca1v8_codec: 1800000uV <-> 1800000uV, set 1800000uV, enabling | suspend 1800000uV, enabling
  1626. LDO_REG8@ vcc_3v0: 3000000uV <-> 3000000uV, set 3000000uV, enabling | suspend 3000000uV, enabling
  1627. SWITCH_REG2@ vcc3v3_s0: -61uV <-> -61uV, set 0uV, enabling | suspend -61uV, disabled
  1628. dc-12v@ dc_12v: 12000000uV <-> 12000000uV, set 12000000uV, enabling | suspend -61uV, enabling (ret: -38)
  1629. vcc-sys@ vcc_sys: 5000000uV <-> 5000000uV, set 5000000uV, enabling | suspend -61uV, enabling (ret: -38)
  1630. vcc3v3-sys@ vcc3v3_sys: 3300000uV <-> 3300000uV, set 3300000uV, enabling | suspend -61uV, enabling (ret: -38)
  1631. vcc-phy-regulator@ vcc_phy: -61uV <-> -61uV, set -61uV, enabling | suspend -61uV, enabling
  1632. led-regulator@ led_regulator: -61uV <-> -61uV, set -61uV, enabling | suspend -61uV, enabling
  1633. vcc5v0-host-en@ vcc5v0_host: 5000000uV <-> 5000000uV, set 5000000uV, enabling | suspend -61uV, enabling (ret: -38)
  1634. vcc5v0-usb3-host-regulator@vcc5v0_usb3_host: -61uV <-> -61uV, set -61uV, enabling | suspend -61uV, enabling
  1635. vcc5v0-typec0-en@ vcc5v0_typec0: -61uV <-> -61uV, set -61uV, enabling | suspend -61uV, enabling
  1636. vcc3v3-pcie-regulator@ vcc3v3_pcie: 3300000uV <-> 3300000uV, set 3300000uV, disabled | suspend -61uV, enabling
  1637. vcc1v8-sdio@ vcc1v8_sdio: 1800000uV <-> 1800000uV, set 1800000uV, enabling | suspend -61uV, enabling (ret: -38)
  1638. vcc3v0-sdio@ vcc3v0_sdio: 3000000uV <-> 3000000uV, set 3000000uV, enabling | suspend -61uV, enabling ; init 3000000uV (ret: -38)
  1639. vdd_log init 900000 uV
  1640. vdd_log@ vdd_log: 800000uV <-> 1400000uV, set 900000uV, enabling | suspend -61uV, enabling ; init 900000uV
  1641. MMC: dwmmc@fe310000: 2, sdhci@fe330000: 0, dwmmc@fe320000: 1
  1642. Invalid bus 0 (err=-19)
  1643. *** Warning - spi_flash_probe_bus_cs() failed, using default environment
  1644.  
  1645. In: serial
  1646. Out: serial
  1647. Err: serial
  1648. Model: Pine64 RK3399 Pinebook Pro
  1649. switch to partitions #0, OK
  1650. mmc1 is current device
  1651. Found IDB in SDcard
  1652. Bootdev(atags): mmc 1
  1653. PartType: EFI
  1654. rockchip_get_boot_mode: Could not found misc partition
  1655. boot mode: None
  1656. init_resource_list: failed to get resource part, ret=-1
  1657. Can't find file:logo.bmp
  1658. failed to display uboot logo
  1659. CLK: (uboot. arml: enter 816000 KHz, init 816000 KHz, kernel 0N/A)
  1660. CLK: (uboot. armb: enter 816000 KHz, init 816000 KHz, kernel 0N/A)
  1661. aplll 816000 KHz
  1662. apllb 816000 KHz
  1663. dpll 800000 KHz
  1664. cpll 24000 KHz
  1665. gpll 800000 KHz
  1666. npll 600000 KHz
  1667. vpll 24000 KHz
  1668. aclk_perihp 133333 KHz
  1669. hclk_perihp 66666 KHz
  1670. pclk_perihp 33333 KHz
  1671. aclk_perilp0 266666 KHz
  1672. hclk_perilp0 88888 KHz
  1673. pclk_perilp0 44444 KHz
  1674. hclk_perilp1 100000 KHz
  1675. pclk_perilp1 50000 KHz
  1676. Net: No ethernet found.
  1677. Hit key to stop autoboot('CTRL+C'): 0
  1678. do_boot_rockchip: Could not find EFI-SYSTEM part
  1679. Checking for mmc dev 1...
  1680. switch to partitions #0, OK
  1681. mmc1 is current device
  1682. Scanning mmc 1 for bootable partitions...
  1683. Scanning mmc 1:c for extlinux or boot scripts...
  1684. Found /extlinux/extlinux.conf
  1685. Retrieving file: /extlinux/extlinux.conf
  1686. reading /extlinux/extlinux.conf
  1687. 274 bytes read in 3 ms (88.9 KiB/s)
  1688. Boot Menu
  1689. 1: 5.9.0-rc4-00034-g7fe10096c150
  1690. Enter choice: 1: 5.9.0-rc4-00034-g7fe10096c150
  1691. Retrieving file: /Image-5.9.0-rc4-00034-g7fe10096c150
  1692. reading /Image-5.9.0-rc4-00034-g7fe10096c150
  1693. 26139136 bytes read in 1096 ms (22.7 MiB/s)
  1694. append: earlyprintk console=ttyS2,1500000n8 rw root=/dev/p rootfstype=ext4 init=/sbin/init rootwait cros_debug loglevel=7
  1695. "Synchronous Abort" handler, esr 0x96000010
  1696.  
  1697. * Reason: Exception from a Data abort, from current exception level
  1698. * PC = 000000000027ac74
  1699. * LR = 0000000000224830
  1700. * SP = 00000000f3dcfa60
  1701. * ESR_EL2 = 0000000096000010
  1702. * Reloc Off = 00000000f5be7000
  1703.  
  1704. x0 : 0000000000000000 x1 : 0000000000000000
  1705. x2 : 0000000000000001 x3 : 00000000f3dcfe28
  1706. x4 : 0000000000000710 x5 : 00000000f5ec1cb0
  1707. x6 : 0000000000000001 x7 : 00000000f5ea3118
  1708. x8 : 00000000f3e198d0 x9 : 0000000000000008
  1709. x10: 00000000f3e09e20 x11: 00000000f3e15148
  1710. x12: 0000000000000000 x13: 0000000000000200
  1711. x14: 000000000000000e x15: 00000000ffffffff
  1712. x16: 000000009ddab770 x17: 0000000000233e68
  1713. x18: 00000000f3ddecf8 x19: 0000000000000000
  1714. x20: 0000000000000710 x21: 0000000000000001
  1715. x22: 00000000f3dcfe28 x23: 00000000f5eaa190
  1716. x24: 00000000f5ec1df0 x25: 00000000f5e90000
  1717. x26: 00000000f5e90000 x27: 0000000000000002
  1718. x28: 0000000000000001 x29: 00000000f3dcfc40
  1719.  
  1720.  
  1721. Call trace:
  1722. PC: [< 0027ac74 >]
  1723. LR: [< 00224830 >]
  1724.  
  1725. Stack:
  1726. [< 0027ac74 >]
  1727. [< 0021b5bc >]
  1728. [< 00211c58 >]
  1729. [< 00211d60 >]
  1730. [< 002120c4 >]
  1731. [< 002289d4 >]
  1732. [< 00219d60 >]
  1733. [< 00219f04 >]
  1734. [< 0021965c >]
  1735. [< 00219b1c >]
  1736. [< 00219f04 >]
  1737. [< 00219618 >]
  1738. [< 00227f90 >]
  1739. [< 002289d4 >]
  1740. [< 00219d60 >]
  1741. [< 002199d8 >]
  1742. [< 00219f04 >]
  1743. [< 00219618 >]
  1744. [< 00227f90 >]
  1745. [< 002289d4 >]
  1746. [< 00219d60 >]
  1747. [< 002199d8 >]
  1748. [< 00219f04 >]
  1749. [< 00219618 >]
  1750. [< 00227f90 >]
  1751. [< 002289d4 >]
  1752. [< 00219d60 >]
  1753. [< 002199d8 >]
  1754. [< 002199d8 >]
  1755. [< 00219f04 >]
  1756. [< 00219618 >]
  1757. [< 00227f90 >]
  1758. [< 002289d4 >]
  1759. [< 00219d60 >]
  1760. [< 002199d8 >]
  1761. [< 00219f04 >]
  1762. [< 00219618 >]
  1763. [< 00227f90 >]
  1764. [< 002289d4 >]
  1765. [< 00219d60 >]
  1766. [< 00219f04 >]
  1767. [< 00219618 >]
  1768. [< 00227f90 >]
  1769. [< 002289d4 >]
  1770. [< 00219d60 >]
  1771. [< 00219f04 >]
  1772. [< 0021965c >]
  1773. [< 00219b1c >]
  1774. [< 002199d8 >]
  1775. [< 00219f04 >]
  1776. [< 00219618 >]
  1777. [< 00227f90 >]
  1778. [< 002289d4 >]
  1779. [< 00219d60 >]
  1780. [< 00219f04 >]
  1781. [< 00219618 >]
  1782. [< 00227ef8 >]
  1783. [< 00218018 >]
  1784. [< 0021ab10 >]
  1785. [< 0027d750 >]
  1786. [< 0021ad64 >]
  1787. [< 002019e4 >]
  1788.  
  1789. Copy info from "Call trace..." to a file(eg. dump.txt), and run
  1790. command in your U-Boot project: ./scripts/stacktrace.sh dump.txt
  1791.  
  1792. Resetting CPU ...
  1793.  
  1794. DDR Version 1.20 20190314
  1795. In
  1796. soft reset
  1797. SRX
  1798. channel 0
  1799. CS = 0
  1800. MR0=0x98
  1801. MR4=0x1
  1802. MR5=0xFF
  1803. MR8=0x8
  1804. MR12=0x72
  1805. MR14=0x72
  1806. MR18=0x0
  1807. MR19=0x0
  1808. MR24=0x8
  1809. MR25=0x0
  1810. CS = 1
  1811. MR0=0x18
  1812. MR4=0x1
  1813. MR5=0xFF
  1814. MR8=0x8
  1815. MR12=0x72
  1816. MR14=0x72
  1817. MR18=0x0
  1818. MR19=0x0
  1819. MR24=0x8
  1820. MR25=0x0
  1821. channel 1
  1822. CS = 0
  1823. MR0=0x98
  1824. MR4=0x1
  1825. MR5=0xFF
  1826. MR8=0x8
  1827. MR12=0x72
  1828. MR14=0x72
  1829. MR18=0x0
  1830. MR19=0x0
  1831. MR24=0x8
  1832. MR25=0x0
  1833. CS = 1
  1834. MR0=0x18
  1835. MR4=0x1
  1836. MR5=0xFF
  1837. MR8=0x8
  1838. MR12=0x72
  1839. MR14=0x72
  1840. MR18=0x0
  1841. MR19=0x0
  1842. MR24=0x8
  1843. MR25=0x0
  1844. channel 0 training pass!
  1845. channel 1 training pass!
  1846. change freq to 400MHz 0,1
  1847. channel 0
  1848. CS = 0
  1849. MR0=0x98
  1850. MR4=0x1
  1851. MR5=0xFF
  1852. MR8=0x8
  1853. MR12=0x72
  1854. MR14=0x72
  1855. MR18=0x0
  1856. MR19=0x0
  1857. MR24=0x8
  1858. MR25=0x0
  1859. CS = 1
  1860. MR0=0x18
  1861. MR4=0x1
  1862. MR5=0xFF
  1863. MR8=0x8
  1864. MR12=0x72
  1865. MR14=0x72
  1866. MR18=0x0
  1867. MR19=0x0
  1868. MR24=0x8
  1869. MR25=0x0
  1870. channel 1
  1871. CS = 0
  1872. MR0=0x98
  1873. MR4=0x1
  1874. MR5=0xFF
  1875. MR8=0x8
  1876. MR12=0x72
  1877. MR14=0x72
  1878. MR18=0x0
  1879. MR19=0x0
  1880. MR24=0x8
  1881. MR25=0x0
  1882. CS = 1
  1883. MR0=0x18
  1884. MR4=0x1
  1885. MR5=0xFF
  1886. MR8=0x8
  1887. MR12=0x72
  1888. MR14=0x72
  1889. MR18=0x0
  1890. MR19=0x0
  1891. MR24=0x8
  1892. MR25=0x0
  1893. channel 0 training pass!
  1894. channel 1 training pass!
  1895. change freq to 800MHz 1,0
  1896. Channel 0: LPDDR4,800MHz
  1897. Bus Width=32 Col=10 Bank=8 Row=15/15 CS=2 Die Bus-Width=16 Size=2048MB
  1898. Channel 1: LPDDR4,800MHz
  1899. Bus Width=32 Col=10 Bank=8 Row=15/15 CS=2 Die Bus-Width=16 Size=2048MB
  1900. 256B stride
  1901. ch 0 ddrconfig = 0x101, ddrsize = 0x2020
  1902. ch 1 ddrconfig = 0x101, ddrsize = 0x2020
  1903. pmugrf_os_reg[2] = 0x3AA1FAA1, stride = 0xD
  1904. OUT
  1905. Boot1: 2019-03-14, version: 1.19
  1906. CPUId = 0x0
  1907. ChipType = 0x10, 314
  1908. SdmmcInit=2 0
  1909. BootCapSize=100000
  1910. UserCapSize=119276MB
  1911. FwPartOffset=2000 , 100000
  1912. mmc0:cmd5,20
  1913. SdmmcInit=0 0
  1914. BootCapSize=0
  1915. UserCapSize=15103MB
  1916. FwPartOffset=2000 , 0
  1917. StorageInit ok = 69801
  1918. SecureMode = 0
  1919. SecureInit read PBA: 0x4
  1920. SecureInit read PBA: 0x404
  1921. SecureInit read PBA: 0x804
  1922. SecureInit read PBA: 0xc04
  1923. SecureInit read PBA: 0x1004
  1924. SecureInit read PBA: 0x1404
  1925. SecureInit read PBA: 0x1804
  1926. SecureInit read PBA: 0x1c04
  1927. SecureInit ret = 0, SecureMode = 0
  1928. atags_set_bootdev: ret:(0)
  1929. GPT part: 0, name: STATE, start:0x4ae000, size:0x60006d
  1930. GPT part: 1, name: KERN-A, start:0x5000, size:0x20000
  1931. GPT part: 2, name: ROOT-A, start:0xae000, size:0x400000
  1932. GPT part: 3, name: KERN-B, start:0x25000, size:0x20000
  1933. GPT part: 4, name: ROOT-B, start:0xad000, size:0x1000
  1934. GPT part: 5, name: KERN-C, start:0x4040, size:0x1
  1935. GPT part: 6, name: ROOT-C, start:0x4041, size:0x1
  1936. GPT part: 7, name: OEM, start:0x45000, size:0x8000
  1937. GPT part: 8, name: reserved, start:0x4042, size:0x1
  1938. GPT part: 9, name: reserved, start:0x4043, size:0x1
  1939. GPT part: 10, name: RWFW, start:0x40, size:0x4000
  1940. GPT part: 11, name: EFI-SYSTEM, start:0x6d000, size:0x40000
  1941. no find partition:uboot.
  1942. LoadTrust Addr:0x4000
  1943. No find bl30.bin
  1944. No find bl32.bin
  1945. Load uboot, ReadLba = 2000
  1946. Load OK, addr=0x200000, size=0xe5970
  1947. RunBL31 0x10000
  1948. NOTICE: BL31: v1.3(debug):22b599a
  1949. NOTICE: BL31: Built : 11:03:32, Jul 10 2019
  1950. NOTICE: BL31: Rockchip release version: v1.1
  1951. INFO: GICv3 with legacy support detected. ARM GICV3 driver initialized in EL3
  1952. INFO: Using opteed sec cpu_context!
  1953. INFO: boot cpu mask: 0
  1954. INFO: plat_rockchip_pmu_init(1181): pd status 3e
  1955. INFO: BL31: Initializing runtime services
  1956. WARNING: No OPTEE provided by BL2 boot loader, Booting device without OPTEE initialization. SMC`s destined for OPTEE will return SMC_UNK
  1957. ERROR: Error initializing runtime service opteed_fast
  1958. INFO: BL31: Preparing for EL3 exit to normal world
  1959. INFO: Entry point address = 0x200000
  1960. INFO: SPSR = 0x3c9
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