...
          fclk_div2_div               1        1        0   999999985          0     0  50000
             fclk_div2                5        5        0   999999985          0     0  50000
                cpu_clk_dyn0_sel       0        0        0   999999985          0     0  50000
                   cpu_clk_dyn0_div       0        0        0   249999997          0     0  50000
                      cpu_clk_dyn0       0        0        0   249999997          0     0  50000
                         cpu_clk_dyn       0        0        0   249999997          0     0  50000
                ffe05000.sd#mux       1        1        0   999999985          0     0  50000
                   ffe05000.sd#div       1        1        0    50000000          0     0  50000
                ff3f0000.ethernet#m250_sel       1        1        0   999999985          0     0  50000
                   ff3f0000.ethernet#m250_div       1        1        0   249999997          0     0  50000
                      ff3f0000.ethernet#fixed_div2       1        1        0   124999998          0     0  50000
                         ff3f0000.ethernet#rgmii_tx_en       1        1        0   124999998          0     0  50000
...