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  1. agtiapi_ProbeCard: start
  2. agtiapi_ProbeCard: We've got PMC SAS, probe successful 0xfffff8000d0f9300 / 0xffffffff81bb2320
  3. agtiapi_ProbeCard: start
  4. agtiapi_ProbeCard: We've got PMC SAS, probe successful 0xfffff8000d0f9300 / 0xffffffff81bb2320
  5. pmspcv0: <PMC Sierra SPC SAS-SATA Card> mem 0xfd2c0000-0xfd2cffff,0xfd2d0000-0xfd2dffff,0xfd2e0000-0xfd2effff,0xfd2f0000-0xfd2fffff irq 16 at device 0.0 on pci5
  6. agtiapi_attach: start dev 0xfffff8000d0f9300 thisCard 0
  7. agtiapi_attach: deviceID: 0x800111f8
  8. agtiapi_attach: ag_portal_count=16
  9. tiCOMGetResource start
  10. tiCOMGetResource: loResource 0xffffffff81bee458
  11. tdsaLoLevelGetResource: start
  12. tdsaLoLevelGetResource: loResource 0xffffffff81bee458
  13. tdsaLoLevelGetResource:
  14. SwConfig->maxActiveIOs 128
  15. SwConfig->smpReqTimeout 65535
  16. saGetRequirements:agRoot 0xffffffff826b7360 swConfig 0xffffffff826b7390 memoryRequirement 0xffffffff81cabf30 usecsPerTick 0xffffffff826b7400 maxNumLocks 0xffffffff826b7404
  17. saGetRequirements: usecsPerTick 0x0 (0)
  18. siConfiguration: si_memset mpiConfig
  19. sidump_swConfig:swConfig->maxActiveIOs 0x80
  20. sidump_swConfig:swConfig->numDevHandles 0x100
  21. sidump_swConfig:swConfig->smpReqTimeout 0xffff
  22. sidump_swConfig:swConfig->numberOfEventRegClients 0x100
  23. sidump_swConfig:swConfig->sizefEventLog1 0x80
  24. sidump_swConfig:swConfig->sizefEventLog2 0x80
  25. sidump_swConfig:swConfig->eventLog1Option 0x3
  26. sidump_swConfig:swConfig->eventLog2Option 0x3
  27. sidump_swConfig:swConfig->fatalErrorInterruptEnable 0x1
  28. sidump_swConfig:swConfig->fatalErrorInterruptVector 0x0
  29. sidump_swConfig:swConfig->max_MSI_InterruptVectors 0xdc
  30. sidump_swConfig:swConfig->max_MSIX_InterruptVectors 0x9a
  31. sidump_swConfig:swConfig->legacyInt_X 0x0
  32. sidump_swConfig:swConfig->hostDirectAccessSupport 0x0
  33. sidump_swConfig:swConfig->hostDirectAccessMode 0x0
  34. sidump_swConfig:swConfig->param1 0x80
  35. sidump_swConfig:swConfig->param2 0x0
  36. sidump_swConfig:swConfig->param3 0xffffffff81cab9d0
  37. sidump_swConfig:swConfig->param4 0x656372756f736552
  38. siConfiguration:custset 0 0
  39. sidump_Q_config: queueConfig->generalEventQueue 0x0
  40. sidump_Q_config: queueConfig->numInboundQueues 0x1
  41. sidump_Q_config: queueConfig->numOutboundQueues 0x1
  42. sidump_Q_config: queueConfig->iqHighPriorityProcessingDepth 0x0
  43. sidump_Q_config: queueConfig->iqNormalPriorityProcessingDepth 0x0
  44. sidump_Q_config: queueConfig->queueOption 0x0
  45. sidump_Q_config: queueConfig->tgtDeviceRemovedEventQueue 0x0
  46. sidump_Q_config: queueConfig->inboundQueues[0].elementCount 0x200
  47. sidump_Q_config: queueConfig->inboundQueues[0].elementSize 0x80
  48. sidump_Q_config: queueConfig->outboundQueues[0].elementCount 0x200
  49. sidump_Q_config: queueConfig->outboundQueues[0].elementSize 0x80
  50. siConfiguration: swConfig->param3 == 0xffffffff81cab9d0
  51. siConfiguration: swConfig->fatalErrorInterruptEnable 1
  52. siConfiguration: swConfig->fatalErrorInterruptVector 0
  53. siConfiguration: numInboundQueues=1 numOutboundQueues=1
  54. siConfiguration: IBQ0:elementCount=512 elementSize=128 priority=0 Total Size 0x10000
  55. siConfiguration: OBQ0:elementCount=512 elementSize=128 interruptCount=1 interruptEnable=1
  56. siConfiguration:mpiConfig->mainConfig.FatalErrorInterrupt 0x25
  57. siConfiguration:swConfig->fatalErrorInterruptVector 0x0
  58. siConfiguration:enable64 0x0
  59. siConfiguration:PortRecoveryResetTimer 0x65637275
  60. Entering function:mpiRequirementsGet
  61. mpiRequirementsGet:eventLogSize region[0] 0x20000
  62. mpiRequirementsGet:eventLogSize region[1] 0x0
  63. mpiRequirementsGet:IOPeventLogSize region[1] 0x20000
  64. mpiRequirementsGet:numInboundQueues region[2] 0x4
  65. mpiRequirementsGet:numOutboundQueues region[3] 0x4
  66. mpiRequirementsGet: (inboundQueues) memoryMap->region[4].elementSize = 65536
  67. mpiRequirementsGet: (inboundQueues) memoryMap->region[4].numElements = 1
  68. mpiRequirementsGet: (outboundQueues) memoryMap->region[5].elementSize = 65536
  69. mpiRequirementsGet: (outboundQueues) memoryMap->region[5].numElements = 1
  70. saGetRequirements: agMemory[LLROOT_MEM_INDEX] singleElementLength = 0x41ed8 totalLength = 0x41ed8 align = 0x8 type 0
  71. saGetRequirements: agMemory[DEVICELINK_MEM_INDEX] singleElementLength = 0x98 totalLength = 0x9800 align = 0x8 type 0
  72. saGetRequirements: agMemory[IOREQLINK_MEM_INDEX] singleElementLength = 0x50 totalLength = 0x2d00 align = 0x8 type 0
  73. saGetRequirements: agMemory[TIMERLINK_MEM_INDEX] singleElementLength = 0x38 totalLength = 0x70 align = 0x8 type 0
  74. saGetRequirements: agMemory[HDA_DMA_BUFFER] singleElementLength = 0x100000 totalLength = 0x100000 align = 0x20 type 1
  75. saGetRequirements:MPI agMemory[5] singleElementLength = 0x20000 totalLength = 0x20000 align = 0x20 type 1
  76. saGetRequirements:MPI agMemory[6] singleElementLength = 0x20000 totalLength = 0x20000 align = 0x20 type 1
  77. saGetRequirements:MPI agMemory[7] singleElementLength = 0x4 totalLength = 0x4 align = 0x4 type 1
  78. saGetRequirements:MPI agMemory[8] singleElementLength = 0x4 totalLength = 0x4 align = 0x4 type 1
  79. saGetRequirements:MPI agMemory[9] singleElementLength = 0x10000 totalLength = 0x10000 align = 0x80 type 2
  80. saGetRequirements:MPI agMemory[10] singleElementLength = 0x10000 totalLength = 0x10000 align = 0x80 type 2
  81. saGetRequirements: maxNumLocks 7
  82. saGetRequirements: swConfig->stallUsec 1869357114
  83. saGetRequirements: swConfig->disableMDF 0
  84. dmGetRequirements: start
  85. dmGetRequirements: max_expander 32
  86. dmGetRequirements: swConfig->itNexusTimeout 0x7D0
  87. dmGetRequirements: memoryReqCount 6
  88. tdsaLoLevelGetResource:MAX_LL_LAYER_MEM_DESCRIPTORS 64
  89. tdsaLoLevelGetResource:memRequirement.count 11
  90. tdsaLoLevelGetResource: index 0 numElements 1 totalLength 270040 singleElementLength 270040 alignment 8
  91. tdsaLoLevelGetResource: index 0 TI_CACHED_MEM
  92. tdsaLoLevelGetResource: index 1 numElements 256 totalLength 38912 singleElementLength 152 alignment 8
  93. tdsaLoLevelGetResource: index 1 TI_CACHED_MEM
  94. tdsaLoLevelGetResource: index 2 numElements 144 totalLength 11520 singleElementLength 80 alignment 8
  95. tdsaLoLevelGetResource: index 2 TI_CACHED_MEM
  96. tdsaLoLevelGetResource: index 3 numElements 1 totalLength 1048576 singleElementLength 1048576 alignment 32
  97. tdsaLoLevelGetResource: index 3 TI_DMA_MEM
  98. tdsaLoLevelGetResource: index 4 numElements 2 totalLength 112 singleElementLength 56 alignment 8
  99. tdsaLoLevelGetResource: index 4 TI_CACHED_MEM
  100. tdsaLoLevelGetResource: index 5 numElements 1 totalLength 131072 singleElementLength 131072 alignment 32
  101. tdsaLoLevelGetResource: index 5 TI_DMA_MEM
  102. tdsaLoLevelGetResource: index 6 numElements 1 totalLength 131072 singleElementLength 131072 alignment 32
  103. tdsaLoLevelGetResource: index 6 TI_DMA_MEM
  104. tdsaLoLevelGetResource: index 7 numElements 1 totalLength 4 singleElementLength 4 alignment 4
  105. tdsaLoLevelGetResource: index 7 TI_DMA_MEM
  106. tdsaLoLevelGetResource: index 8 numElements 1 totalLength 4 singleElementLength 4 alignment 4
  107. tdsaLoLevelGetResource: index 8 TI_DMA_MEM
  108. tdsaLoLevelGetResource: index 9 numElements 1 totalLength 65536 singleElementLength 65536 alignment 128
  109. tdsaLoLevelGetResource: index 9 TI_CACHED_DMA_MEM
  110. tdsaLoLevelGetResource: index 10 numElements 1 totalLength 65536 singleElementLength 65536 alignment 128
  111. tdsaLoLevelGetResource: index 10 TI_CACHED_DMA_MEM
  112. tdsaLoLevelGetResource:dmMemRequirement.count 6
  113. tdsaLoLevelGetResource: index 11 numElements 1 totalLength 256 singleElementLength 256 alignment 4
  114. tdsaLoLevelGetResource: index 11 TI_CACHED_MEM
  115. tdsaLoLevelGetResource: index 12 numElements 16 totalLength 13184 singleElementLength 824 alignment 4
  116. tdsaLoLevelGetResource: index 12 TI_CACHED_MEM
  117. tdsaLoLevelGetResource: index 13 numElements 2048 totalLength 540672 singleElementLength 264 alignment 4
  118. tdsaLoLevelGetResource: index 13 TI_CACHED_MEM
  119. tdsaLoLevelGetResource: index 14 numElements 32 totalLength 570624 singleElementLength 17832 alignment 4
  120. tdsaLoLevelGetResource: index 14 TI_CACHED_MEM
  121. tdsaLoLevelGetResource: index 15 numElements 32 totalLength 15616 singleElementLength 488 alignment 4
  122. tdsaLoLevelGetResource: index 15 TI_CACHED_MEM
  123. tdsaLoLevelGetResource: index 16 numElements 32 totalLength 16384 singleElementLength 512 alignment 4
  124. tdsaLoLevelGetResource: index 16 TI_DMA_MEM
  125. tdsaLoLevelGetResource:smMemRequirement.count 3
  126. tdsaLoLevelGetResource: index 17 numElements 1 totalLength 160 singleElementLength 160 alignment 4
  127. tdsaLoLevelGetResource: index 17 TI_CACHED_MEM
  128. tdsaLoLevelGetResource: index 18 numElements 256 totalLength 1163264 singleElementLength 4544 alignment 4
  129. tdsaLoLevelGetResource: index 18 TI_CACHED_MEM
  130. tdsaLoLevelGetResource: index 19 numElements 1024 totalLength 548864 singleElementLength 536 alignment 4
  131. tdsaLoLevelGetResource: index 19 TI_CACHED_MEM
  132. tdsaLoLevelGetResource: asking maxInterruptVectors(MSIX) 64
  133. tdsaLoLevelGetResource: asking max_MSI_InterruptVectors 32
  134. tdsaLoLevelGetResource: asking flag - legacyInt_X 1
  135. tdsaLoLevelGetResource: total memRequirement count 20 TI_DMA_MEM
  136. tdssGetMaxTargetsParams: start
  137. tdsaSharedMemCalculate: MaxTargets 256
  138. itdssGetResource: start
  139. itdssGetOperatingOptionParams: start
  140. itdssGetResource: sizeof(tdssSMPRequestBody_t) 1792
  141. itdssGetResource: end
  142. agtiapi_ScopeDMARes: set ALIGN 7
  143. agtiapi_ScopeDMARes: set ALIGN 8
  144. agtiapi_ScopeDMARes: set ALIGN 11
  145. agtiapi_ScopeDMARes: set ALIGN 12
  146. agtiapi_ScopeDMARes: set ALIGN 13
  147. agtiapi_ScopeDMARes: set ALIGN 14
  148. agtiapi_ScopeDMARes: set ALIGN 15
  149. agtiapi_ScopeDMARes: set ALIGN 16
  150. agtiapi_ScopeDMARes: set ALIGN 17
  151. agtiapi_ScopeDMARes: set ALIGN 18
  152. agtiapi_ScopeDMARes: set ALIGN 19
  153. agtiapi_attach: size from the call agtiapi_ScopeDMARes 0x164180
  154. agtiapi_MemoryCB: start
  155. agtiapi_InitResource: dma alloc MemSpan 0xd600000 -- 0xd764180
  156. agtiapi_InitResource: bus_alloc_resource_any rtn 0xfffff8000d134900
  157. agtiapi_InitResource: PCI: bar 0, lBar 0 VirtAddr=fffff800fd2c0000, len=65536
  158. agtiapi_InitResource: bus_alloc_resource_any rtn 0xfffff8000d134800
  159. agtiapi_InitResource: PCI: bar 2, lBar 1 VirtAddr=fffff800fd2d0000, len=65536
  160. agtiapi_InitResource: bus_alloc_resource_any rtn 0xfffff8000d134780
  161. agtiapi_InitResource: PCI: bar 4, lBar 2 VirtAddr=fffff800fd2e0000, len=65536
  162. agtiapi_InitResource: bus_alloc_resource_any rtn 0xfffff8000d134880
  163. agtiapi_InitResource: PCI: bar 5, lBar 3 VirtAddr=fffff800fd2f0000, len=65536
  164. agtiapi_InitResource: pRscInfo->tiLoLevelResource.loLevelOption.usecsPerTick 0x64
  165. agtiapi_InitResource: set ALIGN 7
  166. agtiapi_InitResource: set ALIGN 8
  167. agtiapi_InitResource: set ALIGN 11
  168. agtiapi_InitResource: set ALIGN 12
  169. agtiapi_InitResource: set ALIGN 13
  170. agtiapi_InitResource: set ALIGN 14
  171. agtiapi_InitResource: set ALIGN 15
  172. agtiapi_InitResource: set ALIGN 16
  173. agtiapi_InitResource: set ALIGN 17
  174. agtiapi_InitResource: set ALIGN 18
  175. agtiapi_InitResource: set ALIGN 19
  176. agtiapi_InitResource: SharedMem cacheIndex=13 CACHED vaddr 0xfffffe000189e000 / 0xfffffe000189e000, length 2132800 align 0x8
  177. supported MSIX 16
  178. pmspcv0: attempting to allocate 16 MSI-X vectors (16 supported)
  179. msi: routing MSI-X IRQ 292 to local APIC 21 vector 49
  180. msi: routing MSI-X IRQ 293 to local APIC 22 vector 49
  181. msi: routing MSI-X IRQ 294 to local APIC 23 vector 49
  182. msi: routing MSI-X IRQ 295 to local APIC 24 vector 49
  183. msi: routing MSI-X IRQ 296 to local APIC 25 vector 49
  184. msi: routing MSI-X IRQ 297 to local APIC 26 vector 49
  185. msi: routing MSI-X IRQ 298 to local APIC 27 vector 49
  186. msi: routing MSI-X IRQ 299 to local APIC 0 vector 51
  187. msi: routing MSI-X IRQ 300 to local APIC 1 vector 50
  188. msi: routing MSI-X IRQ 301 to local APIC 2 vector 49
  189. msi: routing MSI-X IRQ 302 to local APIC 3 vector 50
  190. msi: routing MSI-X IRQ 303 to local APIC 4 vector 50
  191. msi: routing MSI-X IRQ 304 to local APIC 5 vector 50
  192. msi: routing MSI-X IRQ 305 to local APIC 6 vector 50
  193. msi: routing MSI-X IRQ 306 to local APIC 7 vector 50
  194. msi: routing MSI-X IRQ 307 to local APIC 8 vector 50
  195. pmspcv0: using IRQs 292-307 for MSI-X
  196. agtiapi_InitCardSW: maxInterruptVectors set to 16agtiapi_InitCardSW: tiCOMInit root 0xfffffe000157f320, dev 0xfffff8000d0f9300, pmsc 0xfffffe000157f000
  197. ticominit: tdsaroot
  198. ticominit: tdsaRoot_t 9536
  199. ticominit: tdsaEsglAllInfo_t 72
  200. ticominit: portcontext
  201. ticominit: tdsaPortContext_t 864
  202. ticominit: device data
  203. ticominit: tdsaDeviceData_t 4784
  204. ticominit: agsaSASDeviceInfo_t 32
  205. ticominit: satDeviceData_t 4344
  206. ticominit: agsaSATAIdentifyData_t 512
  207. ticominit: IO request body
  208. ticominit: tdIORequestBody_t 1296
  209. ticominit: tdssIOCompleted_t 8
  210. ticominit: agsaIORequest_t 16
  211. ticominit: FOR SAS
  212. ticominit: agsaSASRequestBody_t 168
  213. ticominit: FOR SATA
  214. ticominit: agsaSATAInitiatorRequest_t 160
  215. ticominit: scsiRspSense_t 18
  216. ticominit: tiSenseData_t 16
  217. ticominit: satIOContext_t 176
  218. ticominit: satInternalIo_t 224
  219. ticominit: start
  220. tdssGetMaxTargetsParams: start
  221. tiCOMInit: MaxTargets 256
  222. tiCOMInit: ******* tdsaRoot 0xfffffe000189e000 tdsaPortContext 0xfffffe00018a0540 tdsaDeviceData 0xfffffe00018a3b40
  223. tiCOMInit: IniAddr 0xfffff8000d134180 TgtAddr 0
  224. tiCOMInit: tdsaRoot 0xfffffe000189e000 tdsaAllShared 0xfffffe000189e000
  225. dmGetRequirements: start
  226. dmGetRequirements: max_expander 32
  227. dmGetRequirements: swConfig->itNexusTimeout 0x7D0
  228. dmGetRequirements: memoryReqCount 6
  229. tiCOMInit: DM MaxNumDMLocks 0x5
  230. tiCOMInit: SM MaxNumSMLocks 0x6
  231. tiCOMInit: LL MaxNumLLLocks 0x7
  232. tdsaGetCardIDString: start
  233. tdsaGetCardIDString: thisCardID 0x0
  234. tdsaGetCardIDString: CardNum is CardNum0
  235. tdsaGetCardIDString: tdsaAllShared->CardIDString is CardNum0
  236. tdsaJumpTableInit: start
  237. tdsaJumpTableInit:: ******* tdsaRoot 0xfffffe000189e000
  238. tdsaJumpTableInit:: ******* tdsaPortContext 0xfffffe00018a0540
  239. tdssInitSASPortStartInfo: start
  240. tdssInitSASPortStartInfo: ******* tdsaRoot 0xfffffe000189e000
  241. tdssInitSASPortStartInfo: ******* tdsaPortContext 0xfffffe00018a0540
  242. tdsaResetComMemFlags: start
  243. tdsaResetComMemFlag:: ******* tdsaRoot 0xfffffe000189e000
  244. tdsaResetComMemFlag:: ******* tdsaPortContext 0xfffffe00018a0540
  245. tdsaInitTimers: start
  246. tdsaInitTimers: ******* tdsaRoot 0xfffffe000189e000
  247. tdsaInitTimers: ******* tdsaPortContext 0xfffffe00018a0540
  248. ticominit: ******* before tdsaRoot 0xfffffe000189e000 tdsaPortContext 0xfffffe00018a0540 tdsaDeviceData 0xfffffe00018a3b40
  249. tdsaPortContextInit: start
  250. tdsaPortContextInit: ******* sizeof(tdsaPortContext) 864 360
  251. tdsaPortContextInit: ******* tdsaRoot 0xfffffe000189e000
  252. tdsaPortContextInit: ******* tdsaPortContext 0xfffffe00018a0540
  253. tdsaPortContextInit: ******* tdsaPortContext+1 0xfffffe00018a08a0
  254. tdsaPortContextInit: ******* &tdsaPortContext[0] 0xfffffe00018a0540 &tdsaPortContext[1] 0xfffffe00018a08a0
  255. tdsaDeviceDataInit: start
  256. tdsaDeviceDataInit: ******* tdsaPortContext 0xfffffe00018a0540
  257. tdsaDeviceDataInit: ******* tdsaDeviceData 0xfffffe00018a3b40
  258. tdsaDeviceDataInit: ******* tdsaDeviceData+1 0xfffffe00018a4df0
  259. tdsaDeviceDataInit: ******* &tdsaDeviceData[0] 0xfffffe00018a3b40 &tdsaDeviceData[1] 0xfffffe00018a4df0
  260. tdssGetMaxTargetsParams: start
  261. tdsaDeviceDataInit: MaxTargets 256
  262. tdsaExpanderInit: start
  263. tdssGetMaxTargetsParams: start
  264. tdsaExpanderInit: MaxTargets 256
  265. tdsaQueueConfigInit: start
  266. tdsaGetSwConfigParams: start
  267. tdsaGetSwConfigParams: tdsaRoot 0xfffffe000189e000 tdsaAllShared 0xfffffe000189e000
  268. tdsaGetSwConfigParams: $$$$$$$$$$$$$$$$$ merge $$$$$$$$$$$$$
  269. tdsaGetSwConfigParams: SwConfig->sallDebugLevel 1
  270. tiCOMInit: calling itdssInit
  271. itdssInit: start
  272. itdssGetOperatingOptionParams: start
  273. itdssInit: end
  274. tiCOMPortInit: start
  275. tiCOMPortInit: sizeof agsaMemoryRequirement_t 6632
  276. tdsaGetSwConfigParams: start
  277. tdsaGetSwConfigParams: tdsaRoot 0xfffffe000189e000 tdsaAllShared 0xfffffe000189e000
  278. tdsaGetSwConfigParams: $$$$$$$$$$$$$$$$$ merge $$$$$$$$$$$$$
  279. tdsaGetSwConfigParams: SwConfig->sallDebugLevel 1
  280. SwConfig->maxActiveIOs 128
  281. SwConfig->smpReqTimeout 65535
  282. tiCOMPortInit: got max_MSIX_InterruptVectors 16
  283. tiCOMPortInit: got max_MSI_InterruptVectors 0
  284. tiCOMPortInit: got flag - legacyInt_X 0
  285. tiCOMPortInit: InboundQueuePriroity 0
  286. tiCOMPortInit: OutboundQueueInterruptDelay 0 OutboundQueueInterruptCount 1 OutboundQueueInterruptEnable 1
  287. tdsaGetHwConfigParams: start
  288. tdsaGetHwConfigParams: tdsaRoot 0xfffffe000189e000 tdsaAllShared 0xfffffe000189e000
  289. tdsaGetHwConfigParams: phyReg spaReg00
  290. tdsaGetHwConfigParams: phyReg spaReg01
  291. tdsaGetHwConfigParams: phyReg spaReg02
  292. tdsaGetHwConfigParams: phyReg spaReg03
  293. tdsaGetHwConfigParams: phyReg spaReg04
  294. tdsaGetHwConfigParams: phyReg spaReg05
  295. tdsaGetHwConfigParams: phyReg spaReg06
  296. tdsaGetHwConfigParams: phyReg spaReg07
  297. tdsaGetHwConfigParams: phyReg spaReg08
  298. tdsaGetHwConfigParams: phyReg spaReg09
  299. tdsaGetHwConfigParams: phyReg spaReg10
  300. tdsaGetHwConfigParams: phyReg spaReg11
  301. tdsaGetHwConfigParams: phyReg spaReg12
  302. tdsaGetHwConfigParams: phyReg spaReg13
  303. tdsaGetHwConfigParams: phyReg spaReg14
  304. tdsaGetHwConfigParams: phyReg spaReg15
  305. tdsaGetHwConfigParams: phyReg spaReg16
  306. tdsaGetHwConfigParams: phyReg spaReg17
  307. tdsaGetHwConfigParams: phyReg spaReg18
  308. tdsaGetHwConfigParams: phyReg spaReg19
  309. tdsaGetHwConfigParams: phyReg spaReg20
  310. tdsaGetHwConfigParams: phyReg spaReg21
  311. tdsaGetHwConfigParams: phyReg spaReg22
  312. tdsaGetHwConfigParams: phyReg spaReg23
  313. tdsaGetHwConfigParams: phyReg spaReg24
  314. tdsaGetHwConfigParams: phyReg spaReg25
  315. tdsaGetHwConfigParams: phyReg spaReg26
  316. tdsaGetHwConfigParams: phyReg spaReg27
  317. tdsaGetHwConfigParams: phyReg spaReg28
  318. tdsaGetHwConfigParams: phyReg spaReg29
  319. tdsaGetHwConfigParams: phyReg spaReg30
  320. tdsaGetHwConfigParams: phyReg spaReg31
  321. tdsaGetHwConfigParams: phyReg spaReg32
  322. tdsaGetHwConfigParams: phyReg spaReg33
  323. tdsaGetHwConfigParams: phyReg spaReg34
  324. tdsaGetHwConfigParams: phyReg spaReg35
  325. tdsaGetHwConfigParams: phyReg spaReg36
  326. tdsaGetHwConfigParams: phyReg spaReg37
  327. tdsaGetHwConfigParams: phyReg spaReg38
  328. tdsaGetHwConfigParams: phyReg spaReg39
  329. tdsaGetHwConfigParams: phyReg spaReg40
  330. tdsaGetHwConfigParams: phyReg spaReg41
  331. tdsaGetHwConfigParams: phyReg spaReg42
  332. tdsaGetHwConfigParams: phyReg spaReg43
  333. tdsaGetHwConfigParams: phyReg spaReg44
  334. tdsaGetHwConfigParams: phyReg spaReg45
  335. tdsaGetHwConfigParams: phyReg spaReg46
  336. tdsaGetHwConfigParams: phyReg spaReg47
  337. tdsaGetHwConfigParams: phyReg spaReg48
  338. tdsaGetHwConfigParams: phyReg spaReg49
  339. tdsaGetHwConfigParams: phyReg spaReg50
  340. tdsaGetHwConfigParams: phyReg spaReg51
  341. tdsaGetHwConfigParams: phyReg spaReg52
  342. tdsaGetHwConfigParams: phyReg spaReg53
  343. tdsaGetHwConfigParams: phyReg spaReg54
  344. tdsaGetHwConfigParams: phyReg spaReg55
  345. tdsaGetHwConfigParams: phyReg spaReg56
  346. tdsaGetHwConfigParams: phyReg spaReg57
  347. tdsaGetHwConfigParams: phyReg spaReg58
  348. tdsaGetHwConfigParams: phyReg spaReg59
  349. tdsaGetHwConfigParams: phyReg spaReg60
  350. tdsaGetHwConfigParams: phyReg spaReg61
  351. tdsaGetHwConfigParams: phyReg spaReg62
  352. tdsaGetHwConfigParams: phyReg spaReg63
  353. tdsaGetHwConfigParams: phyReg spaReg64
  354. tdsaGetHwConfigParams: phyReg spaReg65
  355. tdsaGetHwConfigParams: phyReg spaReg66
  356. tdsaGetHwConfigParams: phyReg spaReg67
  357. tdsaGetHwConfigParams: phyReg spaReg68
  358. tdsaGetHwConfigParams: phyReg spaReg69
  359. tdsaGetHwConfigParams: phyReg spaReg70
  360. tdsaGetHwConfigParams: phyReg spaReg71
  361. tdsaGetHwConfigParams: phyReg spaReg72
  362. tdsaGetHwConfigParams: phyReg spaReg73
  363. tdsaGetHwConfigParams: phyReg spaReg74
  364. tdsaGetHwConfigParams: phyReg spaReg75
  365. tdsaGetHwConfigParams: phyReg spaReg76
  366. tdsaGetHwConfigParams: phyReg spaReg77
  367. tdsaGetHwConfigParams: phyReg spaReg78
  368. tdsaGetHwConfigParams: phyReg spaReg79
  369. tdsaGetHwConfigParams: phyReg spaReg80
  370. tdsaGetHwConfigParams: phyReg spaReg81
  371. tdsaGetHwConfigParams: phyReg spaReg82
  372. tdsaGetHwConfigParams: phyReg spaReg83
  373. tdsaGetHwConfigParams: phyReg spaReg84
  374. tdsaGetHwConfigParams: phyReg spaReg85
  375. tdsaGetHwConfigParams: phyReg spaReg86
  376. tdsaGetHwConfigParams: phyReg spaReg87
  377. tdsaGetHwConfigParams: phyReg spaReg88
  378. tdsaGetHwConfigParams: phyReg spaReg89
  379. tdsaGetHwConfigParams: phyReg spaReg90
  380. tdsaGetHwConfigParams: phyReg spaReg91
  381. tdsaGetHwConfigParams: phyReg spaReg92
  382. tdsaGetHwConfigParams: phyReg spaReg93
  383. tdsaGetHwConfigParams: phyReg spaReg94
  384. tdsaGetHwConfigParams: phyReg spaReg95
  385. tdsaGetHwConfigParams: phyReg spaReg96
  386. tdsaGetHwConfigParams: phyReg spaReg97
  387. tdsaGetHwConfigParams: phyReg spaReg98
  388. tdsaGetHwConfigParams: phyReg spaReg99
  389. HwConfig->phyCount 16
  390. saGetRequirements:agRoot 0xfffffe000189e088 swConfig 0xffffffff81cb1948 memoryRequirement 0xffffffff81caff60 usecsPerTick 0xffffffff826b7480 maxNumLocks 0xffffffff826b7468
  391. saGetRequirements: usecsPerTick 0x0 (0)
  392. siConfiguration: si_memset mpiConfig
  393. sidump_swConfig:swConfig->maxActiveIOs 0x80
  394. sidump_swConfig:swConfig->numDevHandles 0x100
  395. sidump_swConfig:swConfig->smpReqTimeout 0xffff
  396. sidump_swConfig:swConfig->numberOfEventRegClients 0x100
  397. sidump_swConfig:swConfig->sizefEventLog1 0x80
  398. sidump_swConfig:swConfig->sizefEventLog2 0x80
  399. sidump_swConfig:swConfig->eventLog1Option 0x3
  400. sidump_swConfig:swConfig->eventLog2Option 0x3
  401. sidump_swConfig:swConfig->fatalErrorInterruptEnable 0x1
  402. sidump_swConfig:swConfig->fatalErrorInterruptVector 0x0
  403. sidump_swConfig:swConfig->max_MSI_InterruptVectors 0x0
  404. sidump_swConfig:swConfig->max_MSIX_InterruptVectors 0x10
  405. sidump_swConfig:swConfig->legacyInt_X 0x0
  406. sidump_swConfig:swConfig->hostDirectAccessSupport 0x0
  407. sidump_swConfig:swConfig->hostDirectAccessMode 0x0
  408. sidump_swConfig:swConfig->param1 0x0
  409. sidump_swConfig:swConfig->param2 0x0
  410. sidump_swConfig:swConfig->param3 0xfffffe000189e108
  411. sidump_swConfig:swConfig->param4 0
  412. siConfiguration:custset 0 0
  413. sidump_Q_config: queueConfig->generalEventQueue 0x0
  414. sidump_Q_config: queueConfig->numInboundQueues 0x1
  415. sidump_Q_config: queueConfig->numOutboundQueues 0x1
  416. sidump_Q_config: queueConfig->iqHighPriorityProcessingDepth 0x0
  417. sidump_Q_config: queueConfig->iqNormalPriorityProcessingDepth 0x0
  418. sidump_Q_config: queueConfig->queueOption 0x0
  419. sidump_Q_config: queueConfig->tgtDeviceRemovedEventQueue 0x0
  420. sidump_Q_config: queueConfig->inboundQueues[0].elementCount 0x200
  421. sidump_Q_config: queueConfig->inboundQueues[0].elementSize 0x80
  422. sidump_Q_config: queueConfig->outboundQueues[0].elementCount 0x200
  423. sidump_Q_config: queueConfig->outboundQueues[0].elementSize 0x80
  424. siConfiguration: swConfig->param3 == 0xfffffe000189e108
  425. siConfiguration: swConfig->fatalErrorInterruptEnable 1
  426. siConfiguration: swConfig->fatalErrorInterruptVector 0
  427. siConfiguration: numInboundQueues=1 numOutboundQueues=1
  428. siConfiguration: IBQ0:elementCount=512 elementSize=128 priority=0 Total Size 0x10000
  429. siConfiguration: OBQ0:elementCount=512 elementSize=128 interruptCount=1 interruptEnable=1
  430. siConfiguration:mpiConfig->mainConfig.FatalErrorInterrupt 0x25
  431. siConfiguration:swConfig->fatalErrorInterruptVector 0x0
  432. siConfiguration:enable64 0x0
  433. siConfiguration:PortRecoveryResetTimer 0x0
  434. Entering function:mpiRequirementsGet
  435. mpiRequirementsGet:eventLogSize region[0] 0x20000
  436. mpiRequirementsGet:eventLogSize region[1] 0x0
  437. mpiRequirementsGet:IOPeventLogSize region[1] 0x20000
  438. mpiRequirementsGet:numInboundQueues region[2] 0x4
  439. mpiRequirementsGet:numOutboundQueues region[3] 0x4
  440. mpiRequirementsGet: (inboundQueues) memoryMap->region[4].elementSize = 65536
  441. mpiRequirementsGet: (inboundQueues) memoryMap->region[4].numElements = 1
  442. mpiRequirementsGet: (outboundQueues) memoryMap->region[5].elementSize = 65536
  443. mpiRequirementsGet: (outboundQueues) memoryMap->region[5].numElements = 1
  444. saGetRequirements: agMemory[LLROOT_MEM_INDEX] singleElementLength = 0x41ed8 totalLength = 0x41ed8 align = 0x8 type 0
  445. saGetRequirements: agMemory[DEVICELINK_MEM_INDEX] singleElementLength = 0x98 totalLength = 0x9800 align = 0x8 type 0
  446. saGetRequirements: agMemory[IOREQLINK_MEM_INDEX] singleElementLength = 0x50 totalLength = 0x2d00 align = 0x8 type 0
  447. saGetRequirements: agMemory[TIMERLINK_MEM_INDEX] singleElementLength = 0x38 totalLength = 0x70 align = 0x8 type 0
  448. saGetRequirements: agMemory[HDA_DMA_BUFFER] singleElementLength = 0x100000 totalLength = 0x100000 align = 0x20 type 1
  449. saGetRequirements:MPI agMemory[5] singleElementLength = 0x20000 totalLength = 0x20000 align = 0x20 type 1
  450. saGetRequirements:MPI agMemory[6] singleElementLength = 0x20000 totalLength = 0x20000 align = 0x20 type 1
  451. saGetRequirements:MPI agMemory[7] singleElementLength = 0x4 totalLength = 0x4 align = 0x4 type 1
  452. saGetRequirements:MPI agMemory[8] singleElementLength = 0x4 totalLength = 0x4 align = 0x4 type 1
  453. saGetRequirements:MPI agMemory[9] singleElementLength = 0x10000 totalLength = 0x10000 align = 0x80 type 2
  454. saGetRequirements:MPI agMemory[10] singleElementLength = 0x10000 totalLength = 0x10000 align = 0x80 type 2
  455. saGetRequirements: maxNumLocks 7
  456. saGetRequirements: swConfig->stallUsec 10
  457. saGetRequirements: swConfig->disableMDF 0
  458. tiCOMPortInit: usecsPerTick 1000000
  459. tiCOMPortInit: LL memRequirement.count 11
  460. tiCOMPortInit: loResource->loLevelMem.count 20
  461. dmGetRequirements: start
  462. dmGetRequirements: max_expander 32
  463. dmGetRequirements: swConfig->itNexusTimeout 0x7D0
  464. dmGetRequirements: memoryReqCount 6
  465. tiCOMPortInit: DM dmmemRequirement.count 6
  466. tiCOMPortInit: loResource->loLevelMem.count 20
  467. tiCOMPortInit: SMMemCount 3
  468. tiCOMPortInit: index 0 phyAddrUpper 0x0 phyAddrLower 0x0 totalLength 270040 alignment 8
  469. tiCOMPortInit: index 0 virtPtr 0xfffffe000158f000
  470. tiCOMPortInit: index 1 phyAddrUpper 0x0 phyAddrLower 0x0 totalLength 38912 alignment 8
  471. tiCOMPortInit: index 1 virtPtr 0xfffffe00015d1000
  472. tiCOMPortInit: index 2 phyAddrUpper 0x0 phyAddrLower 0x0 totalLength 11520 alignment 8
  473. tiCOMPortInit: index 2 virtPtr 0xfffffe00014ef000
  474. tiCOMPortInit: index 3 phyAddrUpper 0x0 phyAddrLower 0xd600000 totalLength 1048576 alignment 32
  475. tiCOMPortInit: index 3 virtPtr 0xfffffe0863e00000
  476. tiCOMPortInit: index 4 phyAddrUpper 0x0 phyAddrLower 0x0 totalLength 112 alignment 8
  477. tiCOMPortInit: index 4 virtPtr 0xfffff8000d134200
  478. tiCOMPortInit: index 5 phyAddrUpper 0x0 phyAddrLower 0xd700000 totalLength 131072 alignment 32
  479. tiCOMPortInit: index 5 virtPtr 0xfffffe0863f00000
  480. tiCOMPortInit: index 6 phyAddrUpper 0x0 phyAddrLower 0xd720000 totalLength 131072 alignment 32
  481. tiCOMPortInit: index 6 virtPtr 0xfffffe0863f20000
  482. tiCOMPortInit: index 7 phyAddrUpper 0x0 phyAddrLower 0xd740000 totalLength 4 alignment 8
  483. tiCOMPortInit: index 7 virtPtr 0xfffffe0863f40000
  484. tiCOMPortInit: index 8 phyAddrUpper 0x0 phyAddrLower 0xd740008 totalLength 4 alignment 8
  485. tiCOMPortInit: index 8 virtPtr 0xfffffe0863f40008
  486. tiCOMPortInit: index 9 phyAddrUpper 0x0 phyAddrLower 0xd740080 totalLength 65536 alignment 128
  487. tiCOMPortInit: index 9 virtPtr 0xfffffe0863f40080
  488. tiCOMPortInit: index 10 phyAddrUpper 0x0 phyAddrLower 0xd750080 totalLength 65536 alignment 128
  489. tiCOMPortInit: index 10 virtPtr 0xfffffe0863f50080
  490. tiCOMPortInit: index 11 phyAddrUpper 0x0 phyAddrLower 0x0 totalLength 256 alignment 8
  491. tiCOMPortInit: index 11 virtPtr 0xfffff8000d03a400
  492. tiCOMPortInit: index 12 phyAddrUpper 0x0 phyAddrLower 0x0 totalLength 13184 alignment 8
  493. tiCOMPortInit: index 12 virtPtr 0xfffffe00015e1000
  494. tiCOMPortInit: index 13 phyAddrUpper 0x0 phyAddrLower 0x0 totalLength 540672 alignment 8
  495. tiCOMPortInit: index 13 virtPtr 0xfffffe00015e5000
  496. tiCOMPortInit: index 14 phyAddrUpper 0x0 phyAddrLower 0x0 totalLength 570624 alignment 8
  497. tiCOMPortInit: index 14 virtPtr 0xfffffe000166a000
  498. tiCOMPortInit: index 15 phyAddrUpper 0x0 phyAddrLower 0x0 totalLength 15616 alignment 8
  499. tiCOMPortInit: index 15 virtPtr 0xfffffe00016f6000
  500. tiCOMPortInit: index 16 phyAddrUpper 0x0 phyAddrLower 0xd760080 totalLength 16384 alignment 8
  501. tiCOMPortInit: index 16 virtPtr 0xfffffe0863f60080
  502. tiCOMPortInit: index 17 phyAddrUpper 0x0 phyAddrLower 0x0 totalLength 160 alignment 8
  503. tiCOMPortInit: index 17 virtPtr 0xfffff8000d0f9000
  504. tiCOMPortInit: index 18 phyAddrUpper 0x0 phyAddrLower 0x0 totalLength 1163264 alignment 8
  505. tiCOMPortInit: index 18 virtPtr 0xfffffe00016fa000
  506. tiCOMPortInit: index 19 phyAddrUpper 0x0 phyAddrLower 0x0 totalLength 548864 alignment 8
  507. tiCOMPortInit: index 19 virtPtr 0xfffffe0001817000
  508. tiCOMPortInit: AGSA_NUM_MEM_CHUNKS 138
  509. tiCOMPortInit: LL copying loResource.loLevelMem to agsaMemoryRequirement_t index 0
  510. tiCOMPortInit: index 0 virtPtr 0xfffffe000158f000 osHandle 0
  511. tiCOMPortInit: index 0 phyAddrUpper 0x0 phyAddrLower 0x0 totalLength 270040 numElements 1
  512. tiCOMPortInit: index 0 singleElementLength 0x41ed8 alignment 0x8 type 1 reserved 0
  513. tiCOMPortInit: LL copying loResource.loLevelMem to agsaMemoryRequirement_t index 1
  514. tiCOMPortInit: index 1 virtPtr 0xfffffe00015d1000 osHandle 0
  515. tiCOMPortInit: index 1 phyAddrUpper 0x0 phyAddrLower 0x0 totalLength 38912 numElements 256
  516. tiCOMPortInit: index 1 singleElementLength 0x98 alignment 0x8 type 1 reserved 0
  517. tiCOMPortInit: LL copying loResource.loLevelMem to agsaMemoryRequirement_t index 2
  518. tiCOMPortInit: index 2 virtPtr 0xfffffe00014ef000 osHandle 0
  519. tiCOMPortInit: index 2 phyAddrUpper 0x0 phyAddrLower 0x0 totalLength 11520 numElements 144
  520. tiCOMPortInit: index 2 singleElementLength 0x50 alignment 0x8 type 1 reserved 0
  521. tiCOMPortInit: LL copying loResource.loLevelMem to agsaMemoryRequirement_t index 3
  522. tiCOMPortInit: index 3 virtPtr 0xfffffe0863e00000 osHandle 0
  523. tiCOMPortInit: index 3 phyAddrUpper 0x0 phyAddrLower 0xd600000 totalLength 1048576 numElements 1
  524. tiCOMPortInit: index 3 singleElementLength 0x100000 alignment 0x20 type 0 reserved 0
  525. tiCOMPortInit: LL copying loResource.loLevelMem to agsaMemoryRequirement_t index 4
  526. tiCOMPortInit: index 4 virtPtr 0xfffff8000d134200 osHandle 0
  527. tiCOMPortInit: index 4 phyAddrUpper 0x0 phyAddrLower 0x0 totalLength 112 numElements 2
  528. tiCOMPortInit: index 4 singleElementLength 0x38 alignment 0x8 type 1 reserved 0
  529. tiCOMPortInit: LL copying loResource.loLevelMem to agsaMemoryRequirement_t index 5
  530. tiCOMPortInit: index 5 virtPtr 0xfffffe0863f00000 osHandle 0
  531. tiCOMPortInit: index 5 phyAddrUpper 0x0 phyAddrLower 0xd700000 totalLength 131072 numElements 1
  532. tiCOMPortInit: index 5 singleElementLength 0x20000 alignment 0x20 type 0 reserved 0
  533. tiCOMPortInit: LL copying loResource.loLevelMem to agsaMemoryRequirement_t index 6
  534. tiCOMPortInit: index 6 virtPtr 0xfffffe0863f20000 osHandle 0
  535. tiCOMPortInit: index 6 phyAddrUpper 0x0 phyAddrLower 0xd720000 totalLength 131072 numElements 1
  536. tiCOMPortInit: index 6 singleElementLength 0x20000 alignment 0x20 type 0 reserved 0
  537. tiCOMPortInit: LL copying loResource.loLevelMem to agsaMemoryRequirement_t index 7
  538. tiCOMPortInit: index 7 virtPtr 0xfffffe0863f40000 osHandle 0
  539. tiCOMPortInit: index 7 phyAddrUpper 0x0 phyAddrLower 0xd740000 totalLength 4 numElements 1
  540. tiCOMPortInit: index 7 singleElementLength 0x4 alignment 0x8 type 0 reserved 0
  541. tiCOMPortInit: LL copying loResource.loLevelMem to agsaMemoryRequirement_t index 8
  542. tiCOMPortInit: index 8 virtPtr 0xfffffe0863f40008 osHandle 0
  543. tiCOMPortInit: index 8 phyAddrUpper 0x0 phyAddrLower 0xd740008 totalLength 4 numElements 1
  544. tiCOMPortInit: index 8 singleElementLength 0x4 alignment 0x8 type 0 reserved 0
  545. tiCOMPortInit: LL copying loResource.loLevelMem to agsaMemoryRequirement_t index 9
  546. tiCOMPortInit: index 9 virtPtr 0xfffffe0863f40080 osHandle 0
  547. tiCOMPortInit: index 9 phyAddrUpper 0x0 phyAddrLower 0xd740080 totalLength 65536 numElements 1
  548. tiCOMPortInit: index 9 singleElementLength 0x10000 alignment 0x80 type 2 reserved 0
  549. tiCOMPortInit: LL copying loResource.loLevelMem to agsaMemoryRequirement_t index 10
  550. tiCOMPortInit: index 10 virtPtr 0xfffffe0863f50080 osHandle 0
  551. tiCOMPortInit: index 10 phyAddrUpper 0x0 phyAddrLower 0xd750080 totalLength 65536 numElements 1
  552. tiCOMPortInit: index 10 singleElementLength 0x10000 alignment 0x80 type 2 reserved 0
  553. tiCOMPortInit: tdsaAllShared->tdDeviceIdVendId 0
  554. tiCOMPortInit: tdsaAllShared->tdSubVendorId= SUB_VEN_ID 0
  555. tiCOMPortInit: swConfig->param1 hwDEVICE_ID_VENDID 0
  556. tiCOMPortInit: swConfig->param2 hwSVID 0
  557. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  558. t_MacroCheck:tIsSPC 1
  559. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  560. t_MacroCheck:tIsSPCHIL 0
  561. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  562. t_MacroCheck:tIsSPCv 0
  563. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  564. t_MacroCheck:tIsSPCve 0
  565. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  566. t_MacroCheck:tIsSPCvplus 0
  567. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  568. t_MacroCheck:tIsSPCveplus 0
  569. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  570. t_MacroCheck:tIsSPCADAPvplus 0
  571. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  572. t_MacroCheck:tIsSPCADAPveplus 0
  573. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  574. t_MacroCheck:tIsSPC12Gv 0
  575. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  576. t_MacroCheck:tIsSPC12Gve 0
  577. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  578. t_MacroCheck:tIsSPC12Gvplus 0
  579. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  580. t_MacroCheck:tIsSPC12Gveplus 0
  581. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  582. t_MacroCheck:tiIS_SPC 1
  583. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  584. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  585. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  586. t_MacroCheck:tiIS_HIL 0
  587. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  588. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  589. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  590. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  591. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  592. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  593. t_MacroCheck:tiIS_SPC6V 0
  594. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  595. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  596. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  597. t_MacroCheck:tiIS_SPC_ENC 0
  598. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  599. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  600. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  601. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  602. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  603. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  604. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  605. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  606. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  607. t_MacroCheck:tIsSPCV12G 0
  608. tiCOMPortInit: HDA off
  609. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  610. tiCOMPortInit:only for SPC FWConfig set
  611. tiCOMPortInit: SwConfig->FWConfig 0x0
  612. tiCOMPortInit: SwConfig->fatalErrorInterruptVector 0xf
  613. tiCOMPortInit: loResource->loLevelOption.usecsPerTick 100
  614. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  615. si_macro_check:smIS_SPC 1
  616. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  617. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  618. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  619. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  620. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  621. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  622. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  623. si_macro_check:smIS_HIL 0
  624. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  625. si_macro_check:smIS_SFC 0
  626. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  627. si_macro_check:smIS_spc8001 1
  628. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  629. si_macro_check:smIS_spc8081 0
  630. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  631. si_macro_check:smIS_SPCV8008 0
  632. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  633. si_macro_check:smIS_SPCV8009 0
  634. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  635. si_macro_check:smIS_SPCV8018 0
  636. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  637. si_macro_check:smIS_SPCV8019 0
  638. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  639. si_macro_check:smIS_ADAP8088 0
  640. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  641. si_macro_check:smIS_ADAP8089 0
  642. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  643. si_macro_check:smIS_SPCV8070 0
  644. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  645. si_macro_check:smIS_SPCV8071 0
  646. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  647. si_macro_check:smIS_SPCV8072 0
  648. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  649. si_macro_check:smIS_SPCV8073 0
  650. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  651. si_macro_check:smIS_SPCV8074 0
  652. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  653. si_macro_check:smIS_SPCV8075 0
  654. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  655. si_macro_check:smIS_SPCV8076 0
  656. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  657. si_macro_check:smIS_SPCV8077 0
  658. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  659. si_macro_check:smIS_SPCV9015 0
  660. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  661. si_macro_check:smIS_SPCV9060 0
  662. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  663. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  664. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  665. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  666. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  667. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  668. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  669. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  670. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  671. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  672. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  673. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  674. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  675. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  676. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  677. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  678. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  679. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  680. si_macro_check:smIS_SPCV 0
  681. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  682. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  683. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  684. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  685. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  686. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  687. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  688. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  689. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  690. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  691. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  692. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  693. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  694. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  695. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  696. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  697. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  698. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  699. si_macro_check:smIS64bInt 0
  700. saInitialize: WAIT_INCREMENT 1000
  701. saInitialize: usecsPerTick 100
  702. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  703. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  704. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  705. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  706. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  707. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  708. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  709. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  710. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  711. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  712. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  713. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  714. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  715. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  716. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  717. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  718. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  719. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  720. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  721. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  722. saInitialize: Memory[0] singleElementLength = 0x41ed8 numElements = 0x1 allocated 0xfffffe000158f000
  723. saInitialize: Memory[1] singleElementLength = 0x98 numElements = 0x100 allocated 0xfffffe00015d1000
  724. saInitialize: Memory[2] singleElementLength = 0x50 numElements = 0x90 allocated 0xfffffe00014ef000
  725. saInitialize: Memory[3] singleElementLength = 0x100000 numElements = 0x1 allocated 0xfffffe0863e00000
  726. saInitialize: Memory[4] singleElementLength = 0x38 numElements = 0x2 allocated 0xfffff8000d134200
  727. saInitialize: Memory[5] singleElementLength = 0x20000 numElements = 0x1 allocated 0xfffffe0863f00000
  728. saInitialize: Memory[6] singleElementLength = 0x20000 numElements = 0x1 allocated 0xfffffe0863f20000
  729. saInitialize: Memory[7] singleElementLength = 0x4 numElements = 0x1 allocated 0xfffffe0863f40000
  730. saInitialize: Memory[8] singleElementLength = 0x4 numElements = 0x1 allocated 0xfffffe0863f40008
  731. saInitialize: Memory[9] singleElementLength = 0x10000 numElements = 0x1 allocated 0xfffffe0863f40080
  732. saInitialize: Memory[10] singleElementLength = 0x10000 numElements = 0x1 allocated 0xfffffe0863f50080
  733. saInitialize: saRoot 0xfffffe000158f000
  734. saInitialize: gLLDebugLevel 1
  735. saInitialize: swConfig->PortRecoveryResetTimer 30032
  736. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  737. saInitialize: hwDEVICE_ID_VENDID 0x800111f8
  738. ossaHwRegReadConfig32: regOffset 0x4 returns 0x100403
  739. saInitialize: CFGSTAT CFGCMD 0x00100403
  740. ossaHwRegReadConfig32: regOffset 0x8 returns 0x1070005
  741. saInitialize: CLSCODE REVID 0x01070005
  742. ossaHwRegReadConfig32: regOffset 0xc returns 0x4010
  743. saInitialize: BIST DT HDRTYPE LATTIM CLSIZE 0x00004010
  744. ossaHwRegReadConfig32: regOffset 0x2c returns 0x0
  745. saInitialize: hwSVID 0x00000000
  746. ossaHwRegReadConfig32: regOffset 0x0 returns 0x800111f8
  747. saInitialize: saRoot->ChipId 0x80010000
  748. saInitialize: SPC
  749. ossaHwRegReadConfig32: regOffset 0x8 returns 0x1070005
  750. ossaHwRegReadConfig32: regOffset 0x8 returns 0x1070005
  751. ossaHwRegReadConfig32: regOffset 0x8 returns 0x1070005
  752. saInitialize: Rev is A 0 B 0 C 1
  753. ossaHwRegReadConfig32: regOffset 0x80 returns 0x2020000
  754. ossaHwRegReadConfig32: regOffset 0x80 returns 0x2020000
  755. ossaHwRegReadConfig32: regOffset 0x80 returns 0x2020000
  756. saInitialize: LINK_CTRL 0x02020000 Speed 0x2 Lanes 0x20
  757. saInitialize: V_SoftResetRegister 9FCB7258
  758. saInitialize: WAIT_INCREMENT 10
  759. siConfiguration: si_memset mpiConfig
  760. siConfiguration:custset 0 0
  761. siConfiguration: swConfig->param3 == 0xfffffe000189e108
  762. siConfiguration: swConfig->fatalErrorInterruptEnable 1
  763. siConfiguration: swConfig->fatalErrorInterruptVector F
  764. siConfiguration:mpiConfig->mainConfig.FatalErrorInterrupt 0xF25
  765. siConfiguration:swConfig->fatalErrorInterruptVector 0xF
  766. siConfiguration:enable64 0x0
  767. siConfiguration:PortRecoveryResetTimer 0x30032
  768. saInitialize: Zero memory region 0 virt 0xfffffe0863f00000 allocated 131072
  769. saInitialize: Zero memory region 1 virt 0xfffffe0863f20000 allocated 131072
  770. saInitialize: Zero memory region 2 virt 0xfffffe0863f40000 allocated 4
  771. saInitialize: Zero memory region 3 virt 0xfffffe0863f40008 allocated 4
  772. saInitialize: Zero memory region 4 virt 0xfffffe0863f40080 allocated 65536
  773. saInitialize: Zero memory region 5 virt 0xfffffe0863f50080 allocated 65536
  774. saInitialize: swConfig->max_MSI_InterruptVectors 0
  775. saInitialize: swConfig->max_MSIX_InterruptVectors 16
  776. saInitialize: SPC interrupts
  777. saInitialize: Use 32 bits for interrupts 0 1
  778. saInitialize: Inbound locking defined since LL_IOREQ_IBQ0_LOCK 6
  779. saInitialize: DisableInterrupts sysIntsActive 0
  780. saInitialize: SCRATCH_PAD0 value = 0x9000e600
  781. saInitialize: SCRATCH_PAD1 value = 0x7
  782. saInitialize: SCRATCH_PAD2 value = 0x3
  783. saInitialize: SCRATCH_PAD3 value = 0xf
  784. siSpcSoftReset: start
  785. siSpcSoftReset: ResetCount = 0x1
  786. MBIC(A) - NMI Enable VPE0 (IOP): = 0x0
  787. MBIC(A) - NMI Enable VPE0 (AAP1): = 0x0
  788. PCIE - Event Interrupt Enable Register: = 0x0
  789. PCIE - Event Interrupt Register: = 0x0
  790. PCIE - Error Interrupt Enable Register: = 0x0
  791. PCIE - Error Interrupt Register: = 0x0
  792. GSM 0x0 (0x00007b88) - GSM Configuration and Reset = 0x7b88
  793. GSM 0x0 (0x00007b88 ==> 0x00004088) - GSM Configuration and Reset is set to = 0x4088
  794. GSM 0x700018 - RAM ECC Double Bit Error Indication = 0x0
  795. GSM 0x700058 - Read Address Parity Error Indication = 0x0
  796. GSM 0x700060 - Write Address Parity Error Indication = 0x0
  797. GSM 0x700068 - Write Data Parity Error Indication = 0x0
  798. GSM 0x700038 - Read Address Parity Check Enable = 0xffffff
  799. GSM 0x700038 - Read Address Parity Check Enable is set to = 0x0
  800. GSM 0x700040 - Write Address Parity Check Enable = 0xffffff
  801. GSM 0x700040 - Write Address Parity Check Enable is set to = 0x0
  802. GSM 0x300048 - Write Data Parity Check Enable = 0xffffff
  803. GSM 0x700048 - Write Data Parity Check Enable is set to = 0x0
  804. GPIO Output Control Register: = 0x0
  805. Top Register before resetting IOP/AAP1: = 0x87fe01ff
  806. Top Register before resetting BDMA/OSSP: = 0x87fe01e7
  807. Top Register before bringing up BDMA/OSSP: = 0x87fc01e6
  808. GSM 0x0 (0x00007b88) - GSM Configuration and Reset = 0x4088
  809. GSM 0x0 (0x00004088 ==> 0x00007b88) - GSM Configuration and Reset is set to = 0x7b88
  810. GSM 0x700018 - RAM ECC Double Bit Error Indication = 0x0
  811. GSM 0x700058 - Read Address Parity Error Indication = 0x0
  812. GSM 0x700060 - Write Address Parity Error Indication = 0x0
  813. GSM 0x700068 - Write Data Parity Error Indication = 0x0
  814. GSM 0x700038 - Read Address Parity Check Enable = 0x0
  815. GSM 0x700038 - Read Address Parity Check Enable is set to = 0xffffff
  816. GSM 0x700040 - Write Address Parity Check Enable = 0x0
  817. GSM 0x700040 - Write Address Parity Check Enable is set to = 0xffffff
  818. GSM 0x700048 - Write Data Parity Check Enable = 0x0
  819. GSM 0x700048 - Write Data Parity Check Enable is set to = 0xffffff
  820. Top Register before bringing up IOP/AAP1: = 0x87fe01e7
  821. mpiWaitForConfigTable: Waiting for SPC FW becoming ready.P1 0x1 P2 0x1
  822. mpiWaitForConfigTable: FW Ready, SCRATCH_PAD1/2 value = 0x3 0x3
  823. mpiWaitForConfigTable: Interface Revision value = 0x00000001
  824. mpiWaitForConfigTable: FW Revision value = 0x01110000
  825. mpiWaitForConfigTable: sTSDK ver. 0x01100000
  826. mpiWaitForConfigTable: MaxOutstandingIO value = 0x00001000
  827. mpiWaitForConfigTable: MDevMaxSGL value = 0x04000000
  828. mpiWaitForConfigTable: ContrlCapFlag value = 0x0c454040
  829. mpiWaitForConfigTable: GSTOffset value = 0x0000008c
  830. mpiWaitForConfigTable: inboundQueueOffset value = 0x000000f0
  831. mpiWaitForConfigTable: outboundQueueOffset value = 0x000008f0
  832. mpiWaitForConfigTable: FatalErrorDumpOffset0 value = 0x00000000
  833. mpiWaitForConfigTable: FatalErrorDumpLength0 value = 0x00000000
  834. mpiWaitForConfigTable: FatalErrorDumpOffset1 value = 0x00000000
  835. mpiWaitForConfigTable: FatalErrorDumpLength1 value = 0x00000000
  836. mpiWaitForConfigTable: HDAModeFlags value = 0x00000001
  837. mpiWaitForConfigTable: analogSetupTblOffset value = 0x000011f0
  838. mpiWaitForConfigTable: ILA version 0x00000000
  839. mpiWaitForConfigTable: MaxOutstandingIO 0x1000 swConfig->maxActiveIOs 0x80
  840. mpiWaitForConfigTable: Signature = 0x53434d50
  841. mpiWaitForConfigTable: hwRevision = 0x2
  842. mpiWaitForConfigTable: FW Revision = 0x1110000
  843. mpiWaitForConfigTable: Max Sgl = 0x0
  844. mpiWaitForConfigTable: Max Device = 0x400
  845. mpiWaitForConfigTable: Queue Support = 0x54040
  846. mpiWaitForConfigTable: Phy Count = 0x8
  847. mpiWaitForConfigTable: sas Specs Support = 0x6
  848. siSpcSoftReset: Soft Reset Complete
  849. mpiInitialize: Entering
  850. mpiWaitForConfigTable: Waiting for SPC FW becoming ready.P1 0x3 P2 0x3
  851. mpiWaitForConfigTable: FW Ready, SCRATCH_PAD1/2 value = 0x3 0x3
  852. mpiWaitForConfigTable: Interface Revision value = 0x00000001
  853. mpiWaitForConfigTable: FW Revision value = 0x01110000
  854. mpiWaitForConfigTable: sTSDK ver. 0x01100000
  855. mpiWaitForConfigTable: MaxOutstandingIO value = 0x00001000
  856. mpiWaitForConfigTable: MDevMaxSGL value = 0x04000000
  857. mpiWaitForConfigTable: ContrlCapFlag value = 0x0c454040
  858. mpiWaitForConfigTable: GSTOffset value = 0x0000008c
  859. mpiWaitForConfigTable: inboundQueueOffset value = 0x000000f0
  860. mpiWaitForConfigTable: outboundQueueOffset value = 0x000008f0
  861. mpiWaitForConfigTable: FatalErrorDumpOffset0 value = 0x00000000
  862. mpiWaitForConfigTable: FatalErrorDumpLength0 value = 0x00000000
  863. mpiWaitForConfigTable: FatalErrorDumpOffset1 value = 0x00000000
  864. mpiWaitForConfigTable: FatalErrorDumpLength1 value = 0x00000000
  865. mpiWaitForConfigTable: HDAModeFlags value = 0x00000001
  866. mpiWaitForConfigTable: analogSetupTblOffset value = 0x000011f0
  867. mpiWaitForConfigTable: ILA version 0x00000000
  868. mpiWaitForConfigTable: MaxOutstandingIO 0x1000 swConfig->maxActiveIOs 0x80
  869. mpiWaitForConfigTable: Signature = 0x53434d50
  870. mpiWaitForConfigTable: hwRevision = 0x2
  871. mpiWaitForConfigTable: FW Revision = 0x1110000
  872. mpiWaitForConfigTable: Max Sgl = 0x0
  873. mpiWaitForConfigTable: Max Device = 0x400
  874. mpiWaitForConfigTable: Queue Support = 0x54040
  875. mpiWaitForConfigTable: Phy Count = 0x8
  876. mpiWaitForConfigTable: sas Specs Support = 0x6
  877. mpiInitialize: MSGUCfgTblBase = 0x24
  878. mpiInitialize: Number of PHYs = 0x8
  879. mpiInitialize: High Priority IQ support from SPC
  880. mpiInitialize: Interrupt Coalescing support from SPC
  881. mpiInitialize: Number of IQ 1
  882. mpiInitialize: Number of OQ 1
  883. mpiInitialize:custset spc 0
  884. mpiInitialize: iQNPPD_HPPD_GEvent 0x0
  885. mpiInitialize: A saveOffset 0xe600 MSGUCfgTblDWIdx 0xe6f0
  886. mpiInitialize: queue 0 PI CI zero
  887. mpiInitialize: mpiContextTable TableOffset 0x0000E600 contains 0x53434D50
  888. mpiInitialize: AGSA_MPI_MAIN_CONFIGURATION_TABLE 0x00000000
  889. mpiInitialize: AGSA_MPI_GENERAL_STATUS_TABLE 0x0000008C
  890. mpiInitialize: AGSA_MPI_INBOUND_QUEUE_CONFIGURATION_TABLE 0x000000F0
  891. mpiInitialize: AGSA_MPI_OUTBOUND_QUEUE_CONFIGURATION_TABLE 0x000008F0
  892. mpiInitialize: AGSA_MPI_SAS_PHY_ANALOG_SETUP_TABLE 0x000011F0
  893. mpiInitialize: AGSA_MPI_INTERRUPT_VECTOR_TABLE 0x00000190
  894. mpiInitialize: AGSA_MPI_PER_SAS_PHY_ATTRIBUTE_TABLE 0x00000000
  895. mpiInitialize: AGSA_MPI_OUTBOUND_QUEUE_FAILOVER_TABLE 0x00000000
  896. mpiInitialize: SPC_MSGU_CFG_TABLE_UPDATE (0x1)
  897. mpiInitialize: upperEventLogAddress 0x0
  898. mpiInitialize: lowerEventLogAddress 0xd700000
  899. mpiInitialize: eventLogSize 0x20000
  900. mpiInitialize: eventLogOption 0x3
  901. mpiInitialize: EventLog dd /p 00000000`0D700000 L 8000
  902. mpiInitialize: upperIOPLogAddress 0x0
  903. mpiInitialize: lowerIOPLogAddress 0xd720000
  904. mpiInitialize: IOPLog dd /p 00000000`0D720000 L 8000
  905. mpiInitialize: IOPeventLogSize 0x20000
  906. mpiInitialize: IOPeventLogOption 0x3
  907. mpiInitialize: hwConfig->hwOption 0
  908. mpiInitialize: FatalErrorInterrupt 0xf25
  909. mpiInitialize: FatalErrorDumpOffset0 0x1c
  910. mpiInitialize: FatalErrorDumpLength0 0x3fc0
  911. mpiInitialize: FatalErrorDumpOffset1 0x401c
  912. mpiInitialize: FatalErrorDumpLength1 0x3fc0
  913. mpiInitialize: PortRecoveryTimerPortResetTimer 0x0
  914. mpiInitialize: InterruptReassertionDelay 0x0
  915. saInitialize: MaxOutstandingIO 0x1000 swConfig->maxActiveIOs 0x80
  916. saInitialize: swConfig->fatalErrorInterruptEnable 1
  917. saInitialize: saRoot->swConfig.fatalErrorInterruptVector F
  918. saInitialize: swConfig->max_MSI_InterruptVectors 0
  919. saInitialize: swConfig->max_MSIX_InterruptVectors 10
  920. saInitialize: swConfig->legacyInt_X 0
  921. saInitialize: swConfig->hostDirectAccessSupport 0
  922. saInitialize: swConfig->hostDirectAccessMode 0
  923. saInitialize: swConfig->disableMDF 0
  924. saInitialize: swConfig.fatalErrorInterruptEnable 1
  925. saInitialize: swConfig.fatalErrorInterruptVector 15
  926. saInitialize: swConfig->max_MSIX_InterruptVectors 10
  927. saInitialize: Doorbell_Set 00000000 U 00000082
  928. saInitialize: Doorbell_Mask 00020002 U 00020002
  929. saInitialize: Doorbell_Set 00000000 U 00000082
  930. saInitialize: Doorbell_Mask 00020002 U 00020002
  931. saInitialize: siDumpActiveIORequests
  932. siDumpActiveIORequests: Current Time: 0 ticks (usecpertick=100)
  933. siDumpActiveIORequests: 0 found active
  934. tiCOMPortInit: loResource->loLevelOption.usecsPerTick 100 0x64
  935. tiCOMPortInit: calling saRegisterEventCallback for device registration
  936. tiCOMPortInit: saRegisterEventCallback Device Register succeeded
  937. tiCOMPortInit: calling saRegisterEventCallback for device de-registration
  938. tiCOMPortInit: saRegisterEventCallback Device Deregister succeeded
  939. tiCOMPortInit: DM copying loResource.loLevelMem to agsaMemoryRequirement_t index 11
  940. tiCOMPortInit: index 11 virtPtr 0xfffff8000d03a400 osHandle 0
  941. tiCOMPortInit: index 11 phyAddrUpper 0x0 phyAddrLower 0x0 totalLength 256 numElements 1
  942. tiCOMPortInit: index 11 singleElementLength 0x100 alignment 0x8 type 1 reserved 0
  943. tiCOMPortInit: DM copying loResource.loLevelMem to agsaMemoryRequirement_t index 12
  944. tiCOMPortInit: index 12 virtPtr 0xfffffe00015e1000 osHandle 0
  945. tiCOMPortInit: index 12 phyAddrUpper 0x0 phyAddrLower 0x0 totalLength 13184 numElements 16
  946. tiCOMPortInit: index 12 singleElementLength 0x338 alignment 0x8 type 1 reserved 0
  947. tiCOMPortInit: DM copying loResource.loLevelMem to agsaMemoryRequirement_t index 13
  948. tiCOMPortInit: index 13 virtPtr 0xfffffe00015e5000 osHandle 0
  949. tiCOMPortInit: index 13 phyAddrUpper 0x0 phyAddrLower 0x0 totalLength 540672 numElements 2048
  950. tiCOMPortInit: index 13 singleElementLength 0x108 alignment 0x8 type 1 reserved 0
  951. tiCOMPortInit: DM copying loResource.loLevelMem to agsaMemoryRequirement_t index 14
  952. tiCOMPortInit: index 14 virtPtr 0xfffffe000166a000 osHandle 0
  953. tiCOMPortInit: index 14 phyAddrUpper 0x0 phyAddrLower 0x0 totalLength 570624 numElements 32
  954. tiCOMPortInit: index 14 singleElementLength 0x45a8 alignment 0x8 type 1 reserved 0
  955. tiCOMPortInit: DM copying loResource.loLevelMem to agsaMemoryRequirement_t index 15
  956. tiCOMPortInit: index 15 virtPtr 0xfffffe00016f6000 osHandle 0
  957. tiCOMPortInit: index 15 phyAddrUpper 0x0 phyAddrLower 0x0 totalLength 15616 numElements 32
  958. tiCOMPortInit: index 15 singleElementLength 0x1e8 alignment 0x8 type 1 reserved 0
  959. tiCOMPortInit: DM copying loResource.loLevelMem to agsaMemoryRequirement_t index 16
  960. tiCOMPortInit: index 16 virtPtr 0xfffffe0863f60080 osHandle 0
  961. tiCOMPortInit: index 16 phyAddrUpper 0x0 phyAddrLower 0xd760080 totalLength 16384 numElements 32
  962. tiCOMPortInit: index 16 singleElementLength 0x200 alignment 0x8 type 0 reserved 0
  963. dmInitialize: start
  964. dmPortContextInit: start
  965. dmDeviceDataInit: start
  966. dmAllShared->itNexusTimeout 2000
  967. dmAllShared->MaxRetryDiscovery 3
  968. dmAllShared->RateAdjust 0
  969. dmExpanderDeviceDataInit: start
  970. dmExpanderDeviceDataInit: exp id 0
  971. dmExpanderDeviceDataInit: exp id 1
  972. dmExpanderDeviceDataInit: exp id 2
  973. dmExpanderDeviceDataInit: exp id 3
  974. dmExpanderDeviceDataInit: exp id 4
  975. dmExpanderDeviceDataInit: exp id 5
  976. dmExpanderDeviceDataInit: exp id 6
  977. dmExpanderDeviceDataInit: exp id 7
  978. dmExpanderDeviceDataInit: exp id 8
  979. dmExpanderDeviceDataInit: exp id 9
  980. dmExpanderDeviceDataInit: exp id 10
  981. dmExpanderDeviceDataInit: exp id 11
  982. dmExpanderDeviceDataInit: exp id 12
  983. dmExpanderDeviceDataInit: exp id 13
  984. dmExpanderDeviceDataInit: exp id 14
  985. dmExpanderDeviceDataInit: exp id 15
  986. dmExpanderDeviceDataInit: exp id 16
  987. dmExpanderDeviceDataInit: exp id 17
  988. dmExpanderDeviceDataInit: exp id 18
  989. dmExpanderDeviceDataInit: exp id 19
  990. dmExpanderDeviceDataInit: exp id 20
  991. dmExpanderDeviceDataInit: exp id 21
  992. dmExpanderDeviceDataInit: exp id 22
  993. dmExpanderDeviceDataInit: exp id 23
  994. dmExpanderDeviceDataInit: exp id 24
  995. dmExpanderDeviceDataInit: exp id 25
  996. dmExpanderDeviceDataInit: exp id 26
  997. dmExpanderDeviceDataInit: exp id 27
  998. dmExpanderDeviceDataInit: exp id 28
  999. dmExpanderDeviceDataInit: exp id 29
  1000. dmExpanderDeviceDataInit: exp id 30
  1001. dmExpanderDeviceDataInit: exp id 31
  1002. dmSMPInit: start
  1003. tiCOMPortInit: SM copying loResource.loLevelMem to agsaMemoryRequirement_t index 17
  1004. tiCOMPortInit: index 17 virtPtr 0xfffff8000d0f9000 osHandle 0
  1005. tiCOMPortInit: index 17 phyAddrUpper 0x0 phyAddrLower 0x0 totalLength 160 numElements 1
  1006. tiCOMPortInit: index 17 singleElementLength 0xa0 alignment 0x8 type 1 reserved 0
  1007. tiCOMPortInit: SM copying loResource.loLevelMem to agsaMemoryRequirement_t index 18
  1008. tiCOMPortInit: index 18 virtPtr 0xfffffe00016fa000 osHandle 0
  1009. tiCOMPortInit: index 18 phyAddrUpper 0x0 phyAddrLower 0x0 totalLength 1163264 numElements 256
  1010. tiCOMPortInit: index 18 singleElementLength 0x11c0 alignment 0x8 type 1 reserved 0
  1011. tiCOMPortInit: SM copying loResource.loLevelMem to agsaMemoryRequirement_t index 19
  1012. tiCOMPortInit: index 19 virtPtr 0xfffffe0001817000 osHandle 0
  1013. tiCOMPortInit: index 19 phyAddrUpper 0x0 phyAddrLower 0x0 totalLength 548864 numElements 1024
  1014. tiCOMPortInit: index 19 singleElementLength 0x218 alignment 0x8 type 1 reserved 0
  1015. tdsaSGpioIoctlSetup: start
  1016. ossaCachePreFlush: start
  1017. ossaCacheFlush: start
  1018. tdsaGpioPinSetup: End
  1019. Waiting for SGPIO Response
  1020. tiCOMDelayedInterruptHandler: processedMsgCount zero
  1021. tiCOMDelayedInterruptHandler: processedMsgCount zero
  1022. tiCOMDelayedInterruptHandler: processedMsgCount zero
  1023. tiCOMDelayedInterruptHandler: processedMsgCount zero
  1024. tiCOMDelayedInterruptHandler: processedMsgCount zero
  1025. tiCOMDelayedInterruptHandler: processedMsgCount zero
  1026. tiCOMDelayedInterruptHandler: processedMsgCount zero
  1027. tiCOMDelayedInterruptHandler: processedMsgCount zero
  1028. ...
  1029. goes on forever
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