1> ( x64 Assembler 1/1 )
  2
  3  : h. 16 base ! . 10 base ! ;
  4  : toggle  .@ rot xor swap ! ;
  5  : .var  var ;
  6
  7  .var regs   .var frame  .var ram
  8  .var bytes  .var index  .var target
  9
 10  .: clear  regs 40 0 fill 3 bytes ! x:C00148 frame ! ;
 11
 12  .: reg  builds> rot , does> regs 1+! @ ;
 13
 14   0 reg rax   1 reg rcx   2 reg rdx   3 reg rbx
 15   4 reg rsp   5 reg rbp   6 reg rsi   7 reg rdi
 16   8 reg r8    9 reg r9   10 reg r10  11 reg r11
 17  12 reg r12  13 reg r13  14 reg r14  15 reg r15
 18
 19  .: bytes+!  bytes 1+! 128 .u<; 3 bytes +! ;
 20  : s[]  swap ram 1+! x:c00200 frame toggle ;
 21  : d[]  ram 1+! x:c00000 frame toggle ;
 22  .: [i]  bytes+! 24 << index ! x:400000 frame toggle ;
 23  : s[i]  [i] s[] ;
 24  : d[i]  [i] d[] ;
 25
 26  .: index<<  index @ 8 << index ! ;
 27  .: index;  index @ 0>;; ;
 28  .: ([rsp]?)  bytes 1+! x:24000000 xor index<< ;
 29  .: [rsp]?  ram @ 0=; over 8 % 4 !=; ([rsp]?) ;
 30  .: ([rbp]?)  index; bytes 1+! x:400000  xor index<< ;
 31  .: [rbp]?  ram @ 0=; over 8 % 5 !=; ([rbp]?) ;
 32
 33  .: bits>  rot and swap >> or ;
 34  .: <bits  rot and swap << or ;
 35  .: dest  [rsp]? [rbp]? over 16 7 <bits swap 3 8 bits> ;
 36  .: src  over 19 7 <bits swap 1 8 bits> ;
 37  .: final  bytes @ 5 <=; x:c00000 xor ;
 38  .: post  dup h. target @ ! bytes @ target +! clear ;
 39  .: comp  index @ or final post ;
 40  .: op  builds> rot 8 << , does> @ frame @ or src dest comp ;
 41
 42    0 op .add    8 op .or     16 op .adc   24 op .sbb
 43   32 op .and   40 op .sub    48 op .xor   56 op .cmp
 44  136 op .mov  132 op .test
 45
 46  .: .unary  dup 8 and 3 >> swap 7 and 16 << or ;
 47  .: unary  builds> rot , does> @ swap .unary or comp ;
 48
 49  x:c0ff48 unary inc  x:c8ff48 unary dec
 50  x:d8f748 unary neg  x:d0f748 unary not
 51
 52  : ret  1 bytes ! x:c3 post ;
 53
 54  : org  target ! ;
 55
 56  clear
 57 ○