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  1. diff --git a/software/glasgow/applet/debug/msp430/__init__.py b/software/glasgow/applet/debug/msp430/__init__.py
  2. index 493dc9f..a123120 100644
  3. --- a/software/glasgow/applet/debug/msp430/__init__.py
  4. +++ b/software/glasgow/applet/debug/msp430/__init__.py
  5. @@ -41,6 +41,7 @@ import struct
  6.  from ....support.aobject import *
  7.  from ....support.bits import *
  8.  from ....arch.msp430.jtag import *
  9. +from ....database.ti.msp430 import *
  10.  from ...interface.jtag_probe import JTAGProbeApplet
  11.  from ...interface.sbw_probe import SpyBiWireProbeApplet
  12.  from ... import *
  13. @@ -57,6 +58,7 @@ class MSP430DebugInterface(aobject):
  14.          self._level  = logging.DEBUG if self._logger.name == __name__ else logging.TRACE
  15.  
  16.          self.jtag_id   = None
  17. +        self._dev      = None
  18.          self._family   = None
  19.          self.device_id = None
  20.          self._core     = None
  21. @@ -70,7 +72,7 @@ class MSP430DebugInterface(aobject):
  22.  
  23.          jtag_id_bits = await self.lower.read_ir(8)
  24.          self.jtag_id = int(jtag_id_bits.reversed())
  25. -        if self.jtag_id not in (0x89, 0x91, 0x98, 0x99):
  26. +        if self.jtag_id not in devices_tree.keys():
  27.              raise MSP430DebugError("unknown JTAG ID {:#04x}".format(self.jtag_id))
  28.          self._log("found core with JTAG ID %#04x", self.jtag_id,
  29.                    level=logging.INFO)
  30. @@ -81,6 +83,31 @@ class MSP430DebugInterface(aobject):
  31.          self._log("discover family=%s", self._family)
  32.          # self._core will be set later, in target_stop().
  33.  
  34. +    async def _probe_device(self):
  35. +        dev_id_addr = 0x0ff0 if self.jtag_id == 0x89 else 0x1a04
  36. +        dev_id_data = await self.target_read_memory(dev_id_addr, 2)
  37. +        dev_id = struct.unpack(">H", dev_id_data)[0]
  38. +        self._log("discover device-id=%#06x at %#06x", dev_id, dev_id_addr)
  39. +
  40. +        if dev_id not in devices_tree[self.jtag_id]:
  41. +            raise  MSP430DebugError("unknown Device ID {:#06x} with JTAG ID {:#04x}".format(dev_id, self.jtag_id))
  42. +
  43. +        dev_list = devices_tree[self.jtag_id][dev_id]
  44. +
  45. +        if (len(dev_list) == 1) and (None in dev_list):
  46. +            self._dev = dev_list[None]
  47. +        else:
  48. +            ext_id = (await self.target_read_memory(0x0ffd, 1))[0]
  49. +            if ext_id not in dev_list:
  50. +                if None in dev_list:
  51. +                    self._dev = dev_list[None]
  52. +                else:
  53. +                    raise  MSP430DebugError("unknown Device ID {:#06x}:{:#04x} with JTAG ID {:#04x}".format(dev_id, ext_id, self.jtag_id))
  54. +            else:
  55. +                self._dev = dev_list[ext_id]
  56. +
  57. +        self._log("probed device=%s (core=%s)", self._dev.device, self._dev.core)
  58. +
  59.      @property
  60.      def _DR_CNTRL_SIG(self):
  61.          if self._family == "124":
  62. @@ -93,14 +120,14 @@ class MSP430DebugInterface(aobject):
  63.          if self._family == "124":
  64.              cntrl_sig = self._DR_CNTRL_SIG(R_W=1, TAGFUNCSAT=1, TCE1=1)
  65.          elif self._family == "56":
  66. -            raise NotImplementedError # FIXME
  67. +            cntrl_sig = self._DR_CNTRL_SIG(R_W=1, TCE1=1)
  68.          else:
  69.              assert False
  70.          for arg, value in kwargs.items():
  71.              setattr(cntrl_sig, arg, value)
  72.          cntrl_sig_bits = cntrl_sig.to_bits()
  73. -        self._log("write CNTRL_SIG %s", cntrl_sig.bits_repr(omit_zero=True),
  74. -                  level=logging.TRACE)
  75. +        self._log("write CNTRL_SIG %04x %s", cntrl_sig.to_int(), cntrl_sig.bits_repr(omit_zero=True),
  76. +                  level=logging.INFO)
  77.          await self.lower.write_ir(IR_CNTRL_SIG_16BIT)
  78.          await self.lower.write_dr(cntrl_sig_bits.reversed())
  79.  
  80. @@ -108,8 +135,8 @@ class MSP430DebugInterface(aobject):
  81.          await self.lower.write_ir(IR_CNTRL_SIG_CAPTURE)
  82.          cntrl_sig_bits = await self.lower.read_dr(16)
  83.          cntrl_sig = self._DR_CNTRL_SIG.from_bits(cntrl_sig_bits.reversed())
  84. -        self._log("read CNTRL_SIG %s", cntrl_sig.bits_repr(omit_zero=True),
  85. -                  level=logging.TRACE)
  86. +        self._log("read CNTRL_SIG %04x %s", cntrl_sig.to_int(), cntrl_sig.bits_repr(omit_zero=True),
  87. +                  level=logging.INFO)
  88.          return cntrl_sig
  89.  
  90.      @property
  91. @@ -124,10 +151,18 @@ class MSP430DebugInterface(aobject):
  92.          assert False
  93.  
  94.      async def _write_address_dr(self, address):
  95. -        # FIXME: mangle address bits
  96.          address_bits = bits(address & 0xfffff, self._address_width)
  97. +        if self._address_width == 20:
  98. +            address_bits = address_bits[16:20] + address_bits[0:16]
  99.          await self.lower.write_dr(address_bits.reversed())
  100.  
  101. +    async def _read_address_dr(self):
  102. +        address_bits = await self.lower.read_dr(self._address_width)
  103. +        address_bits = address_bits.reversed()
  104. +        if self._address_width == 20:
  105. +            address_bits = address_bits[4:20] + address_bits[0:4]
  106. +        return int(address_bits)
  107. +
  108.      async def _write_data_dr(self, data):
  109.          data_bits = bits(data & 0xffff, 16)
  110.          await self.lower.write_dr(data_bits.reversed())
  111. @@ -210,12 +245,36 @@ class MSP430DebugInterface(aobject):
  112.              await self._write_control(TCE1=1)
  113.          elif self._family == "56":
  114.              # Reference function: GetDevice_430Xv2
  115. -            raise NotImplementedError # FIXME
  116. +            await self._write_control(TCE1=1, CPUSUSP=1, RELEASE_LBYTE=1)
  117.          else:
  118.              assert False
  119.          cntrl_sig = await self._read_control()
  120.          if not cntrl_sig.TCE:
  121.              raise MSP430DebugError("cannot stop target")
  122. +        if self._family == "56":
  123. +            await self.lower.set_tclk(0)
  124. +            await self.lower.set_tclk(1)
  125. +            await self.lower.write_ir(IR_CNTRL_SIG_16BIT)
  126. +            await self._write_control(POR=1)
  127. +            await self._write_control(POR=0)
  128. +            for i in range(5):
  129. +                await self.lower.set_tclk(0)
  130. +                await self.lower.set_tclk(1)
  131. +            await self._write_control(CPUSUSP=1)
  132. +            await self.lower.set_tclk(0)
  133. +            await self.lower.set_tclk(1)
  134. +
  135. +        await self.lower.write_ir(IR_COREIP_ID)
  136. +        core_ip = await self._read_data_dr()
  137. +        await self.lower.write_ir(IR_DEVICE_ID)
  138. +        addr = await self._read_address_dr()
  139. +
  140. +        self._log("%#08x %#010x", core_ip, addr)
  141. +
  142. +        for i in range(16):
  143. +            device_id_bytes = await self.target_read_memory(addr, 16)
  144. +
  145. +#        await self._probe_device()
  146.          if self.device_id is None:
  147.              # And now we can determine which specific device it is.
  148.              if self._family == "124":
  149. @@ -290,7 +349,25 @@ class MSP430DebugInterface(aobject):
  150.              await self._release_bus()
  151.          elif self._family == "56":
  152.              # Reference function: ReadMem_430Xv2
  153. -            raise NotImplementedError # FIXME
  154. +            await self.lower.set_tclk(0)
  155. +            #await self._write_control(RELEASE_LBYTE=0, TCE1=1, CPUSUSP=1, R_W=1)
  156. +            await self.lower.write_ir(IR_CNTRL_SIG_16BIT)
  157. +            await self._write_data_dr(0x2409)
  158. +
  159. +            offset = 0
  160. +            while offset < length:
  161. +                await self.lower.write_ir(IR_ADDR_16BIT)
  162. +                await self._write_address_dr(address + offset)
  163. +                await self.lower.write_ir(IR_DATA_TO_ADDR)
  164. +                await self.lower.set_tclk(1)
  165. +                await self.lower.set_tclk(0)
  166. +                data_word = await self._read_data_dr()
  167. +                self._log("read memory [%#07x]=%#06x", address + offset, data_word)
  168. +                data   += struct.pack("<H", data_word)
  169. +                offset += 2
  170. +            await self.lower.set_tclk(1)
  171. +            await self.lower.set_tclk(0)
  172. +            await self.lower.set_tclk(1)
  173.          else:
  174.              assert False
  175.          return data
  176. @@ -328,6 +405,11 @@ class DebugMSP430AppletMixin:
  177.  
  178.      async def interact(self, device, args, msp430_iface):
  179.          await msp430_iface.target_stop()
  180. +        self.logger.info("attached to target %#06x", msp430_iface.device_id)
  181. +
  182. +        x = await msp430_iface.target_read_memory(0xfc00, 1024)
  183. +        #open('/tmp/dump.bin', 'wb').write(x)
  184. +
  185.          await msp430_iface.target_detach(reset=True)
  186.  
  187.  
  188. diff --git a/software/glasgow/arch/msp430/jtag.py b/software/glasgow/arch/msp430/jtag.py
  189. index 4968b7c..070e37c 100644
  190. --- a/software/glasgow/arch/msp430/jtag.py
  191. +++ b/software/glasgow/arch/msp430/jtag.py
  192. @@ -7,9 +7,10 @@ from ...support.bitstruct import *
  193.  
  194.  __all__ = [
  195.      # IR
  196. -    "IR_ADDR_16BIT", "IR_ADDR_CAPTURE", "IR_DATA_TO_ADDR", "IR_DATA_16BIT", "IR_DATA_QUICK",
  197. -    "IR_BYPASS", "IR_CNTRL_SIG_16BIT", "IR_CNTRL_SIG_CAPTURE", "IR_CNTRL_SIG_RELEASE",
  198. -    "IR_DATA_PSA", "IR_SHIFT_OUT_PSA", "IR_PREPARE_BLOW", "IR_EX_BLOW", "IR_JMB_EXCHANGE",
  199. +    "IR_ADDR_16BIT", "IR_ADDR_CAPTURE", "IR_DATA_TO_ADDR", "IR_DATA_16BIT", "IR_DATA_CAPTURE",
  200. +   "IR_DATA_QUICK", "IR_BYPASS", "IR_CNTRL_SIG_16BIT", "IR_CNTRL_SIG_CAPTURE",
  201. +   "IR_CNTRL_SIG_RELEASE", "IR_DATA_PSA", "IR_SHIFT_OUT_PSA", "IR_PREPARE_BLOW", "IR_EX_BLOW",
  202. +   "IR_JMB_EXCHANGE", "IR_COREIP_ID", "IR_DEVICE_ID",
  203.      # DR
  204.      "DR_CNTRL_SIG_124", "DR_CNTRL_SIG_56",
  205.  ]
  206. @@ -23,6 +24,7 @@ IR_ADDR_CAPTURE         = bits(0x84, 8)
  207.  # Controlling the Memory Data Bus (MDB)
  208.  IR_DATA_TO_ADDR         = bits(0x85, 8)
  209.  IR_DATA_16BIT           = bits(0x41, 8)
  210. +IR_DATA_CAPTURE         = bits(0x42, 8)
  211.  IR_DATA_QUICK           = bits(0x43, 8)
  212.  IR_BYPASS               = bits(0xFF, 8)
  213.  # Controlling the CPU
  214. @@ -37,6 +39,9 @@ IR_PREPARE_BLOW         = bits(0x22, 8)
  215.  IR_EX_BLOW              = bits(0x24, 8)
  216.  # JTAG Mailbox System
  217.  IR_JMB_EXCHANGE         = bits(0x61, 8)
  218. +# Misc
  219. +IR_COREIP_ID            = bits(0x17, 8)
  220. +IR_DEVICE_ID            = bits(0x87, 8)
  221.  
  222.  
  223.  # CNTRL_SIG DR layout
  224. diff --git a/software/glasgow/database/ti/msp430.py b/software/glasgow/database/ti/msp430.py
  225. index 1121d58..6ee3258 100644
  226. --- a/software/glasgow/database/ti/msp430.py
  227. +++ b/software/glasgow/database/ti/msp430.py
  228. @@ -459,3 +459,13 @@ devices_tree = {}
  229.  
  230.  for dev in devices:
  231.      devices_tree.setdefault(dev.jtag_id, {}).setdefault(dev.device_id, {})[dev.ext_id] = dev
  232. +
  233. +# Dummy devices when all we have is the JTAG ID
  234. +#devices_dummy = {
  235. +#   0x89: MSP430Device('Generic MSP430/MSP430X', 0x89, 0xffff, None, core='430',    type='flash', features=[]),
  236. +#       # We default to FRAM for 0x91 because even if the device is flash, the couple extra steps used for
  237. +#       # FRAM won't hurt (at least for the process used before the actual device ID can be read)
  238. +#   0x91: MSP430Device('Generic MSP430Xv2',      0x91, 0xffff, None, core='430Xv2', type='fram', features=[]),
  239. +#   0x98: MSP430Device('Generic MSP430Xv2',      0x91, 0xffff, None, core='430Xv2', type='fram', features=[]),
  240. +#   0x99: MSP430Device('Generic MSP430Xv2',      0x91, 0xffff, None, core='430Xv2', type='fram', features=[]),
  241. +#}
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