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  1. /dts-v1/;
  2.  
  3. / {
  4. compatible = "raspberrypi,3-compute-module\0brcm,bcm2837";
  5. serial-number = "00000000aa50a33f";
  6. model = "Raspberry Pi Compute Module 3 Plus Rev 1.0";
  7. memreserve = < 0x3b400000 0x4c00000 >;
  8. interrupt-parent = < 0x01 >;
  9. #address-cells = < 0x01 >;
  10. #size-cells = < 0x01 >;
  11.  
  12. clocks {
  13. compatible = "simple-bus";
  14. #address-cells = < 0x01 >;
  15. #size-cells = < 0x00 >;
  16.  
  17. clock@3 {
  18. compatible = "fixed-clock";
  19. #clock-cells = < 0x00 >;
  20. phandle = < 0x04 >;
  21. reg = < 0x03 >;
  22. clock-output-names = "osc";
  23. clock-frequency = < 0x124f800 >;
  24. };
  25.  
  26. clock@4 {
  27. compatible = "fixed-clock";
  28. #clock-cells = < 0x00 >;
  29. phandle = < 0x14 >;
  30. reg = < 0x04 >;
  31. clock-output-names = "otg";
  32. clock-frequency = < 0x1c9c3800 >;
  33. };
  34. };
  35.  
  36. memory@0 {
  37. device_type = "memory";
  38. reg = < 0x00 0x3b400000 >;
  39. };
  40.  
  41. __overrides__ {
  42. cam0-led-ctrl;
  43. i2c1 = "\0\0\0#status";
  44. i2c_vc = "\0\0\0\"status";
  45. sd_overclock = "\0\0\0'brcm,overclock-50:0";
  46. sdio_overclock = "\0\0\0(brcm,overclock-50:0\0\0\0\0)brcm,overclock-50:0";
  47. i2c0_baudrate = "\0\0\0\"clock-frequency:0";
  48. sd_pio_limit = "\0\0\0'brcm,pio-limit:0";
  49. act_led_trigger = "\0\0\0+linux,default-trigger";
  50. audio = "\0\0\0$status";
  51. sd_debug = "\0\0\0'brcm,debug";
  52. cam0-pwdn-ctrl;
  53. cache_line_size;
  54. cam0-led;
  55. i2c1_baudrate = "\0\0\0#clock-frequency:0";
  56. spi = "\0\0\0!status";
  57. i2c_arm = "\0\0\0#status";
  58. uart0 = [ 00 00 00 1e 73 74 61 74 75 73 00 ];
  59. i2c2_iknowwhatimdoing = [ 00 00 00 12 73 74 61 74 75 73 00 ];
  60. i2s = "\0\0\0 status";
  61. i2c0 = "\0\0\0\"status";
  62. arm_freq = < 0x1a 0x636c6f63 0x6b2d6672 0x65717565 0x6e63793a 0x30000000 0x1b636c 0x6f636b2d 0x66726571 0x75656e63 0x793a3000 0x1c 0x636c6f63 0x6b2d6672 0x65717565 0x6e63793a 0x30000000 0x1d636c 0x6f636b2d 0x66726571 0x75656e63 0x793a3000 >;
  63. watchdog = "\0\0\0%status";
  64. i2c_baudrate = "\0\0\0#clock-frequency:0";
  65. i2c_vc_baudrate = "\0\0\0\"clock-frequency:0";
  66. sd_poll_once = "\0\0\0'non-removable?";
  67. axiperf = "\0\0\0*status";
  68. act_led_activelow = "\0\0\0+gpios:8";
  69. i2c2_baudrate = [ 00 00 00 12 63 6c 6f 63 6b 2d 66 72 65 71 75 65 6e 63 79 3a 30 00 ];
  70. sd_force_pio = "\0\0\0'brcm,force-pio?";
  71. cam0-pwdn;
  72. uart1 = [ 00 00 00 1f 73 74 61 74 75 73 00 ];
  73. i2c_arm_baudrate = "\0\0\0#clock-frequency:0";
  74. random = "\0\0\0&status";
  75. act_led_gpio = "\0\0\0+gpios:4";
  76. i2c = "\0\0\0#status";
  77. };
  78.  
  79. arm-pmu {
  80. compatible = "arm,cortex-a7-pmu";
  81. interrupt-parent = < 0x16 >;
  82. interrupts = < 0x09 0x04 >;
  83. };
  84.  
  85. system {
  86. linux,serial = < 0x00 0xaa50a33f >;
  87. linux,revision = < 0xa02100 >;
  88. };
  89.  
  90. __symbols__ {
  91. uart0_gpio14 = "/soc/gpio@7e200000/uart0_gpio14";
  92. pwm = "/soc/pwm@7e20c000";
  93. gpclk1_gpio5 = "/soc/gpio@7e200000/gpclk1_gpio5";
  94. clk_usb = "/clocks/clock@4";
  95. pixelvalve0 = "/soc/pixelvalve@7e206000";
  96. uart0_ctsrts_gpio30 = "/soc/gpio@7e200000/uart0_ctsrts_gpio30";
  97. uart1_ctsrts_gpio16 = "/soc/gpio@7e200000/uart1_ctsrts_gpio16";
  98. uart0_gpio32 = "/soc/gpio@7e200000/uart0_gpio32";
  99. intc = "/soc/interrupt-controller@7e00b200";
  100. spi2 = "/soc/spi@7e2150c0";
  101. jtag_gpio4 = "/soc/gpio@7e200000/jtag_gpio4";
  102. dsi1 = "/soc/dsi@7e700000";
  103. clocks = "/soc/cprman@7e101000";
  104. i2c1 = "/soc/i2c@7e804000";
  105. i2c_vc = "/soc/i2c@7e205000";
  106. alt0 = "/soc/gpio@7e200000/alt0";
  107. firmwarekms = "/soc/firmwarekms@7e600000";
  108. smi = "/soc/smi@7e600000";
  109. uart1_ctsrts_gpio42 = "/soc/gpio@7e200000/uart1_ctsrts_gpio42";
  110. spi0 = "/soc/spi@7e204000";
  111. thermal = "/soc/thermal@7e212000";
  112. vdd_5v0_reg = "/fixedregulator_5v0";
  113. vchiq = "/soc/mailbox@7e00b840";
  114. sdhost = "/soc/mmc@7e202000";
  115. aux = "/soc/aux@7e215000";
  116. gpio = "/soc/gpio@7e200000";
  117. gpclk0_gpio4 = "/soc/gpio@7e200000/gpclk0_gpio4";
  118. pwm0_gpio12 = "/soc/gpio@7e200000/pwm0_gpio12";
  119. pwm1_gpio19 = "/soc/gpio@7e200000/pwm1_gpio19";
  120. sdhci = "/soc/mmc@7e300000";
  121. pwm0_gpio40 = "/soc/gpio@7e200000/pwm0_gpio40";
  122. gpclk2_gpio43 = "/soc/gpio@7e200000/gpclk2_gpio43";
  123. dpi = "/soc/dpi@7e208000";
  124. vcsm = "/soc/vcsm";
  125. v3d = "/soc/v3d@7ec00000";
  126. audio = "/soc/audio";
  127. vdd_3v3_reg = "/fixedregulator_3v3";
  128. uart1_ctsrts_gpio30 = "/soc/gpio@7e200000/uart1_ctsrts_gpio30";
  129. gpioout = "/soc/gpio@7e200000/gpioout";
  130. dma = "/soc/dma@7e007000";
  131. spidev1 = "/soc/spi@7e204000/spidev@1";
  132. mmcnr = "/soc/mmcnr@7e300000";
  133. spi0_gpio35 = "/soc/gpio@7e200000/spi0_gpio35";
  134. vc4 = "/soc/gpu";
  135. pwm1_gpio45 = "/soc/gpio@7e200000/pwm1_gpio45";
  136. cpu3 = "/cpus/cpu@3";
  137. pcm_gpio28 = "/soc/gpio@7e200000/pcm_gpio28";
  138. dpi_gpio0 = "/soc/gpio@7e200000/dpi_gpio0";
  139. power = "/soc/power";
  140. soc = "/soc";
  141. i2c0_gpio0 = "/soc/gpio@7e200000/i2c0_gpio0";
  142. pcm_gpio18 = "/soc/gpio@7e200000/pcm_gpio18";
  143. leds = "/leds";
  144. csi1 = "/soc/csi@7e801000";
  145. i2s_pins = "/soc/gpio@7e200000/i2s";
  146. firmware = "/soc/firmware";
  147. cpu1 = "/cpus/cpu@1";
  148. mmc = "/soc/mmc@7e300000";
  149. usbphy = "/phy";
  150. pixelvalve1 = "/soc/pixelvalve@7e207000";
  151. spi = "/soc/spi@7e204000";
  152. spi0_pins = "/soc/gpio@7e200000/spi0_pins";
  153. i2c_arm = "/soc/i2c@7e804000";
  154. clk_osc = "/clocks/clock@3";
  155. rng = "/soc/rng@7e104000";
  156. uart0 = "/soc/serial@7e201000";
  157. pwm1_gpio13 = "/soc/gpio@7e200000/pwm1_gpio13";
  158. i2c1_pins = "/soc/gpio@7e200000/i2c1";
  159. cpu_thermal = "/thermal-zones/cpu-thermal";
  160. fb = "/soc/fb";
  161. pwm1_gpio41 = "/soc/gpio@7e200000/pwm1_gpio41";
  162. txp = "/soc/txp@7e004000";
  163. sdhost_pins = "/soc/gpio@7e200000/sdhost_gpio48";
  164. dpi_18bit_gpio0 = "/soc/gpio@7e200000/dpi_18bit_gpio0";
  165. spi0_gpio7 = "/soc/gpio@7e200000/spi0_gpio7";
  166. i2c2 = "/soc/i2c@7e805000";
  167. i2c1_gpio44 = "/soc/gpio@7e200000/i2c1_gpio44";
  168. i2c0_gpio28 = "/soc/gpio@7e200000/i2c0_gpio28";
  169. i2c_slave_gpio18 = "/soc/gpio@7e200000/i2c_slave_gpio18";
  170. i2s = "/soc/i2s@7e203000";
  171. emmc_gpio48 = "/soc/gpio@7e200000/emmc_gpio48";
  172. spi1 = "/soc/spi@7e215080";
  173. virtgpio = "/soc/virtgpio";
  174. usb = "/soc/usb@7e980000";
  175. dsi0 = "/soc/dsi@7e209000";
  176. i2c1_gpio2 = "/soc/gpio@7e200000/i2c1_gpio2";
  177. expgpio = "/soc/firmware/expgpio";
  178. uart0_ctsrts_gpio38 = "/soc/gpio@7e200000/uart0_ctsrts_gpio38";
  179. audio_pins = "/soc/gpio@7e200000/audio_pins";
  180. i2c0 = "/soc/i2c@7e205000";
  181. spi1_gpio16 = "/soc/gpio@7e200000/spi1_gpio16";
  182. i2c0_pins = "/soc/gpio@7e200000/i2c0";
  183. watchdog = "/soc/watchdog@7e100000";
  184. jtag_gpio22 = "/soc/gpio@7e200000/jtag_gpio22";
  185. spi2_gpio40 = "/soc/gpio@7e200000/spi2_gpio40";
  186. vec = "/soc/vec@7e806000";
  187. local_intc = "/soc/local_intc@40000000";
  188. i2c0_gpio44 = "/soc/gpio@7e200000/i2c0_gpio44";
  189. axiperf = "/soc/axiperf";
  190. spi0_cs_pins = "/soc/gpio@7e200000/spi0_cs_pins";
  191. sound = "/soc/sound";
  192. hvs = "/soc/hvs@7e400000";
  193. uart0_ctsrts_gpio16 = "/soc/gpio@7e200000/uart0_ctsrts_gpio16";
  194. act_led = "/leds/act";
  195. gpclk2_gpio6 = "/soc/gpio@7e200000/gpclk2_gpio6";
  196. spidev0 = "/soc/spi@7e204000/spidev@0";
  197. sdhost_gpio48 = "/soc/gpio@7e200000/sdhost_gpio48";
  198. emmc_gpio34 = "/soc/gpio@7e200000/emmc_gpio34";
  199. gpclk1_gpio44 = "/soc/gpio@7e200000/gpclk1_gpio44";
  200. uart1_gpio14 = "/soc/gpio@7e200000/uart1_gpio14";
  201. uart0_gpio36 = "/soc/gpio@7e200000/uart0_gpio36";
  202. cpus = "/cpus";
  203. cpu2 = "/cpus/cpu@2";
  204. uart1_gpio32 = "/soc/gpio@7e200000/uart1_gpio32";
  205. hdmi = "/soc/hdmi@7e902000";
  206. pixelvalve2 = "/soc/pixelvalve@7e807000";
  207. pwm0_gpio18 = "/soc/gpio@7e200000/pwm0_gpio18";
  208. gpclk1_gpio42 = "/soc/gpio@7e200000/gpclk1_gpio42";
  209. mailbox = "/soc/mailbox@7e00b880";
  210. uart1_gpio40 = "/soc/gpio@7e200000/uart1_gpio40";
  211. emmc_gpio22 = "/soc/gpio@7e200000/emmc_gpio22";
  212. uart1 = "/soc/serial@7e215040";
  213. csi0 = "/soc/csi@7e800000";
  214. random = "/soc/rng@7e104000";
  215. i2c = "/soc/i2c@7e804000";
  216. cpu0 = "/cpus/cpu@0";
  217. };
  218.  
  219. soc {
  220. compatible = "simple-bus";
  221. ranges = < 0x7e000000 0x3f000000 0x1000000 0x40000000 0x40000000 0x1000 >;
  222. #address-cells = < 0x01 >;
  223. #size-cells = < 0x01 >;
  224. phandle = < 0x2e >;
  225. dma-ranges = < 0xc0000000 0x00 0x3f000000 >;
  226.  
  227. serial@7e201000 {
  228. compatible = "brcm,bcm2835-pl011\0arm,pl011\0arm,primecell";
  229. clocks = < 0x03 0x13 0x03 0x14 >;
  230. clock-names = "uartclk\0apb_pclk";
  231. status = "okay";
  232. interrupts = < 0x02 0x19 >;
  233. phandle = < 0x1e >;
  234. arm,primecell-periphid = < 0x241011 >;
  235. reg = < 0x7e201000 0x200 >;
  236. cts-event-workaround;
  237. };
  238.  
  239. pixelvalve@7e207000 {
  240. compatible = "brcm,bcm2835-pixelvalve1";
  241. status = "disabled";
  242. interrupts = < 0x02 0x0e >;
  243. phandle = < 0x60 >;
  244. reg = < 0x7e207000 0x100 >;
  245. };
  246.  
  247. cprman@7e101000 {
  248. compatible = "brcm,bcm2835-cprman";
  249. clocks = < 0x04 0x05 0x00 0x05 0x01 0x05 0x02 0x06 0x00 0x06 0x01 0x06 0x02 >;
  250. firmware = < 0x07 >;
  251. #clock-cells = < 0x01 >;
  252. phandle = < 0x03 >;
  253. reg = < 0x7e101000 0x2000 >;
  254. };
  255.  
  256. csi@7e801000 {
  257. power-domains = < 0x0f 0x0d >;
  258. compatible = "brcm,bcm2835-unicam";
  259. clocks = < 0x03 0x2e >;
  260. clock-names = "lp";
  261. status = "disabled";
  262. #address-cells = < 0x01 >;
  263. interrupts = < 0x02 0x07 >;
  264. #size-cells = < 0x00 >;
  265. #clock-cells = < 0x01 >;
  266. phandle = < 0x67 >;
  267. reg = < 0x7e801000 0x800 0x7e802004 0x04 >;
  268.  
  269. port {
  270.  
  271. endpoint {
  272. data-lanes = < 0x01 0x02 0x03 0x04 >;
  273. };
  274. };
  275. };
  276.  
  277. thermal@7e212000 {
  278. compatible = "brcm,bcm2837-thermal";
  279. clocks = < 0x03 0x1b >;
  280. #thermal-sensor-cells = < 0x00 >;
  281. status = "okay";
  282. phandle = < 0x02 >;
  283. reg = < 0x7e212000 0x08 >;
  284. };
  285.  
  286. hvs@7e400000 {
  287. compatible = "brcm,bcm2835-hvs";
  288. status = "disabled";
  289. interrupts = < 0x02 0x01 >;
  290. phandle = < 0x65 >;
  291. reg = < 0x7e400000 0x6000 >;
  292. };
  293.  
  294. gpio@7e200000 {
  295. compatible = "brcm,bcm2835-gpio";
  296. gpio-controller;
  297. #interrupt-cells = < 0x02 >;
  298. interrupts = < 0x02 0x11 0x02 0x12 >;
  299. phandle = < 0x0d >;
  300. reg = < 0x7e200000 0xb4 >;
  301. #gpio-cells = < 0x02 >;
  302. pinctrl-names = "default";
  303. interrupt-controller;
  304.  
  305. uart0_gpio14 {
  306. brcm,pins = < 0x0e 0x0f >;
  307. phandle = < 0x4c >;
  308. brcm,function = < 0x04 >;
  309. };
  310.  
  311. gpclk1_gpio5 {
  312. brcm,pins = < 0x05 >;
  313. phandle = < 0x34 >;
  314. brcm,function = < 0x04 >;
  315. };
  316.  
  317. uart0_ctsrts_gpio30 {
  318. brcm,pins = < 0x1e 0x1f >;
  319. phandle = < 0x4e >;
  320. brcm,pull = < 0x02 0x00 >;
  321. brcm,function = < 0x07 >;
  322. };
  323.  
  324. uart1_ctsrts_gpio16 {
  325. brcm,pins = < 0x10 0x11 >;
  326. phandle = < 0x53 >;
  327. brcm,function = < 0x02 >;
  328. };
  329.  
  330. uart0_gpio32 {
  331. brcm,pins = < 0x20 0x21 >;
  332. phandle = < 0x4f >;
  333. brcm,pull = < 0x00 0x02 >;
  334. brcm,function = < 0x07 >;
  335. };
  336.  
  337. jtag_gpio4 {
  338. brcm,pins = < 0x04 0x05 0x06 0x0c 0x0d >;
  339. phandle = < 0x59 >;
  340. brcm,function = < 0x02 >;
  341. };
  342.  
  343. i2c1 {
  344. brcm,pins = < 0x02 0x03 >;
  345. phandle = < 0x11 >;
  346. brcm,function = < 0x04 >;
  347. };
  348.  
  349. alt0 {
  350. brcm,pins = < 0x04 0x05 0x07 0x08 0x09 0x0a 0x0b >;
  351. phandle = < 0x5c >;
  352. brcm,function = < 0x04 >;
  353. };
  354.  
  355. uart1_ctsrts_gpio42 {
  356. brcm,pins = < 0x2a 0x2b >;
  357. phandle = < 0x57 >;
  358. brcm,function = < 0x02 >;
  359. };
  360.  
  361. sdio_ovl_pins {
  362. brcm,pins = < 0x22 0x23 0x24 0x25 0x26 0x27 >;
  363. phandle = < 0x78 >;
  364. brcm,pull = < 0x00 0x02 0x02 0x02 0x02 0x02 >;
  365. brcm,function = < 0x07 >;
  366. };
  367.  
  368. gpclk0_gpio4 {
  369. brcm,pins = < 0x04 >;
  370. phandle = < 0x33 >;
  371. brcm,function = < 0x04 >;
  372. };
  373.  
  374. pwm0_gpio12 {
  375. brcm,pins = < 0x0c >;
  376. phandle = < 0x41 >;
  377. brcm,function = < 0x04 >;
  378. };
  379.  
  380. pwm1_gpio19 {
  381. brcm,pins = < 0x13 >;
  382. phandle = < 0x45 >;
  383. brcm,function = < 0x02 >;
  384. };
  385.  
  386. pwm0_gpio40 {
  387. brcm,pins = < 0x28 >;
  388. phandle = < 0x43 >;
  389. brcm,function = < 0x04 >;
  390. };
  391.  
  392. gpclk2_gpio43 {
  393. brcm,pins = < 0x2b >;
  394. phandle = < 0x38 >;
  395. brcm,pull = < 0x00 >;
  396. brcm,function = < 0x04 >;
  397. };
  398.  
  399. uart1_ctsrts_gpio30 {
  400. brcm,pins = < 0x1e 0x1f >;
  401. phandle = < 0x55 >;
  402. brcm,function = < 0x02 >;
  403. };
  404.  
  405. gpioout {
  406. brcm,pins = < 0x06 >;
  407. phandle = < 0x5b >;
  408. brcm,function = < 0x01 >;
  409. };
  410.  
  411. spi0_gpio35 {
  412. brcm,pins = < 0x23 0x24 0x25 0x26 0x27 >;
  413. phandle = < 0x49 >;
  414. brcm,function = < 0x04 >;
  415. };
  416.  
  417. pwm1_gpio45 {
  418. brcm,pins = < 0x2d >;
  419. phandle = < 0x47 >;
  420. brcm,function = < 0x04 >;
  421. };
  422.  
  423. pcm_gpio28 {
  424. brcm,pins = < 0x1c 0x1d 0x1e 0x1f >;
  425. phandle = < 0x40 >;
  426. brcm,function = < 0x06 >;
  427. };
  428.  
  429. dpi_gpio0 {
  430. brcm,pins = < 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b >;
  431. phandle = < 0x30 >;
  432. brcm,function = < 0x06 >;
  433. };
  434.  
  435. i2c0_gpio0 {
  436. brcm,pins = < 0x00 0x01 >;
  437. phandle = < 0x39 >;
  438. brcm,function = < 0x04 >;
  439. };
  440.  
  441. pcm_gpio18 {
  442. brcm,pins = < 0x12 0x13 0x14 0x15 >;
  443. phandle = < 0x3f >;
  444. brcm,function = < 0x04 >;
  445. };
  446.  
  447. spi0_pins {
  448. brcm,pins = < 0x09 0x0a 0x0b >;
  449. phandle = < 0x0b >;
  450. brcm,function = < 0x04 >;
  451. };
  452.  
  453. pwm1_gpio13 {
  454. brcm,pins = < 0x0d >;
  455. phandle = < 0x44 >;
  456. brcm,function = < 0x04 >;
  457. };
  458.  
  459. pwm1_gpio41 {
  460. brcm,pins = < 0x29 >;
  461. phandle = < 0x46 >;
  462. brcm,function = < 0x04 >;
  463. };
  464.  
  465. dpi_18bit_gpio0 {
  466. brcm,pins = < 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 >;
  467. phandle = < 0x5a >;
  468. brcm,function = < 0x06 >;
  469. };
  470.  
  471. spi0_gpio7 {
  472. brcm,pins = < 0x07 0x08 0x09 0x0a 0x0b >;
  473. phandle = < 0x48 >;
  474. brcm,function = < 0x04 >;
  475. };
  476.  
  477. i2c1_gpio44 {
  478. brcm,pins = < 0x2c 0x2d >;
  479. phandle = < 0x3d >;
  480. brcm,function = < 0x06 >;
  481. };
  482.  
  483. i2c0_gpio28 {
  484. brcm,pins = < 0x1c 0x1d >;
  485. phandle = < 0x3a >;
  486. brcm,function = < 0x04 >;
  487. };
  488.  
  489. i2c_slave_gpio18 {
  490. brcm,pins = < 0x12 0x13 0x14 0x15 >;
  491. phandle = < 0x58 >;
  492. brcm,function = < 0x07 >;
  493. };
  494.  
  495. i2s {
  496. brcm,pins = < 0x12 0x13 0x14 0x15 >;
  497. phandle = < 0x0a >;
  498. brcm,function = < 0x04 >;
  499. };
  500.  
  501. emmc_gpio48 {
  502. brcm,pins = < 0x30 0x31 0x32 0x33 0x34 0x35 >;
  503. phandle = < 0x17 >;
  504. brcm,function = < 0x07 >;
  505. };
  506.  
  507. i2c1_gpio2 {
  508. brcm,pins = < 0x02 0x03 >;
  509. phandle = < 0x3c >;
  510. brcm,function = < 0x04 >;
  511. };
  512.  
  513. uart0_ctsrts_gpio38 {
  514. brcm,pins = < 0x26 0x27 >;
  515. phandle = < 0x51 >;
  516. brcm,function = < 0x06 >;
  517. };
  518.  
  519. audio_pins {
  520. brcm,pins;
  521. phandle = < 0x19 >;
  522. brcm,function;
  523. };
  524.  
  525. i2c0 {
  526. brcm,pins = < 0x00 0x01 >;
  527. phandle = < 0x0e >;
  528. brcm,function = < 0x04 >;
  529. };
  530.  
  531. spi1_gpio16 {
  532. brcm,pins = < 0x10 0x11 0x12 0x13 0x14 0x15 >;
  533. phandle = < 0x4a >;
  534. brcm,function = < 0x03 >;
  535. };
  536.  
  537. jtag_gpio22 {
  538. brcm,pins = < 0x16 0x17 0x18 0x19 0x1a 0x1b >;
  539. phandle = < 0x3e >;
  540. brcm,function = < 0x03 >;
  541. };
  542.  
  543. spi2_gpio40 {
  544. brcm,pins = < 0x28 0x29 0x2a 0x2b 0x2c 0x2d >;
  545. phandle = < 0x4b >;
  546. brcm,function = < 0x03 >;
  547. };
  548.  
  549. i2c0_gpio44 {
  550. brcm,pins = < 0x2c 0x2d >;
  551. phandle = < 0x3b >;
  552. brcm,function = < 0x05 >;
  553. };
  554.  
  555. spi0_cs_pins {
  556. brcm,pins = < 0x08 0x07 >;
  557. phandle = < 0x0c >;
  558. brcm,function = < 0x01 >;
  559. };
  560.  
  561. uart0_ctsrts_gpio16 {
  562. brcm,pins = < 0x10 0x11 >;
  563. phandle = < 0x4d >;
  564. brcm,function = < 0x07 >;
  565. };
  566.  
  567. gpclk2_gpio6 {
  568. brcm,pins = < 0x06 >;
  569. phandle = < 0x37 >;
  570. brcm,function = < 0x04 >;
  571. };
  572.  
  573. sdhost_gpio48 {
  574. brcm,pins = < 0x30 0x31 0x32 0x33 0x34 0x35 >;
  575. phandle = < 0x09 >;
  576. brcm,function = < 0x04 >;
  577. };
  578.  
  579. emmc_gpio34 {
  580. brcm,pins = < 0x22 0x23 0x24 0x25 0x26 0x27 >;
  581. phandle = < 0x32 >;
  582. brcm,pull = < 0x00 0x02 0x02 0x02 0x02 0x02 >;
  583. brcm,function = < 0x07 >;
  584. };
  585.  
  586. gpclk1_gpio44 {
  587. brcm,pins = < 0x2c >;
  588. phandle = < 0x36 >;
  589. brcm,function = < 0x04 >;
  590. };
  591.  
  592. uart1_gpio14 {
  593. brcm,pins = < 0x0e 0x0f >;
  594. phandle = < 0x52 >;
  595. brcm,function = < 0x02 >;
  596. };
  597.  
  598. uart0_gpio36 {
  599. brcm,pins = < 0x24 0x25 >;
  600. phandle = < 0x50 >;
  601. brcm,function = < 0x06 >;
  602. };
  603.  
  604. uart1_gpio32 {
  605. brcm,pins = < 0x20 0x21 >;
  606. phandle = < 0x54 >;
  607. brcm,function = < 0x02 >;
  608. };
  609.  
  610. pwm0_gpio18 {
  611. brcm,pins = < 0x12 >;
  612. phandle = < 0x42 >;
  613. brcm,function = < 0x02 >;
  614. };
  615.  
  616. gpclk1_gpio42 {
  617. brcm,pins = < 0x2a >;
  618. phandle = < 0x35 >;
  619. brcm,function = < 0x04 >;
  620. };
  621.  
  622. uart1_gpio40 {
  623. brcm,pins = < 0x28 0x29 >;
  624. phandle = < 0x56 >;
  625. brcm,function = < 0x02 >;
  626. };
  627.  
  628. emmc_gpio22 {
  629. brcm,pins = < 0x16 0x17 0x18 0x19 0x1a 0x1b >;
  630. phandle = < 0x31 >;
  631. brcm,function = < 0x07 >;
  632. };
  633. };
  634.  
  635. pixelvalve@7e807000 {
  636. compatible = "brcm,bcm2835-pixelvalve2";
  637. status = "disabled";
  638. interrupts = < 0x02 0x0a >;
  639. phandle = < 0x69 >;
  640. reg = < 0x7e807000 0x100 >;
  641. };
  642.  
  643. v3d@7ec00000 {
  644. power-domains = < 0x0f 0x0a >;
  645. compatible = "brcm,vc4-v3d";
  646. status = "disabled";
  647. interrupts = < 0x01 0x0a >;
  648. phandle = < 0x6d >;
  649. reg = < 0x7ec00000 0x1000 >;
  650. };
  651.  
  652. gpu {
  653. compatible = "brcm,bcm2835-vc4";
  654. status = "disabled";
  655. phandle = < 0x6c >;
  656. };
  657.  
  658. mmc@7e300000 {
  659. compatible = "brcm,bcm2835-mmc\0brcm,bcm2835-sdhci";
  660. clocks = < 0x03 0x1c >;
  661. status = "okay";
  662. interrupts = < 0x02 0x1e >;
  663. brcm,overclock-50 = < 0x00 >;
  664. bus-width = < 0x04 >;
  665. dma-names = "rx-tx";
  666. phandle = < 0x28 >;
  667. reg = < 0x7e300000 0x100 >;
  668. pinctrl-0 = < 0x78 >;
  669. dmas = < 0x08 0x0b >;
  670. pinctrl-names = "default";
  671. };
  672.  
  673. spi@7e204000 {
  674. compatible = "brcm,bcm2835-spi";
  675. clocks = < 0x03 0x14 >;
  676. status = "disabled";
  677. #address-cells = < 0x01 >;
  678. interrupts = < 0x02 0x16 >;
  679. cs-gpios = < 0x0d 0x08 0x01 0x0d 0x07 0x01 >;
  680. #size-cells = < 0x00 >;
  681. dma-names = "tx\0rx";
  682. phandle = < 0x21 >;
  683. reg = < 0x7e204000 0x200 >;
  684. pinctrl-0 = < 0x0b 0x0c >;
  685. dmas = < 0x08 0x06 0x08 0x07 >;
  686. pinctrl-names = "default";
  687.  
  688. spidev@1 {
  689. compatible = "spidev";
  690. #address-cells = < 0x01 >;
  691. #size-cells = < 0x00 >;
  692. phandle = < 0x5e >;
  693. reg = < 0x01 >;
  694. spi-max-frequency = < 0x7735940 >;
  695. };
  696.  
  697. spidev@0 {
  698. compatible = "spidev";
  699. #address-cells = < 0x01 >;
  700. #size-cells = < 0x00 >;
  701. phandle = < 0x5d >;
  702. reg = < 0x00 >;
  703. spi-max-frequency = < 0x7735940 >;
  704. };
  705. };
  706.  
  707. i2c@7e804000 {
  708. compatible = "brcm,bcm2835-i2c";
  709. clocks = < 0x03 0x14 >;
  710. status = "disabled";
  711. #address-cells = < 0x01 >;
  712. interrupts = < 0x02 0x15 >;
  713. #size-cells = < 0x00 >;
  714. phandle = < 0x23 >;
  715. reg = < 0x7e804000 0x1000 >;
  716. clock-frequency = < 0x186a0 >;
  717. pinctrl-0 = < 0x11 >;
  718. pinctrl-names = "default";
  719. };
  720.  
  721. vcsm {
  722. compatible = "raspberrypi,bcm2835-vcsm";
  723. firmware = < 0x07 >;
  724. status = "okay";
  725. phandle = < 0x72 >;
  726. };
  727.  
  728. audio {
  729. brcm,pwm-channels = < 0x08 >;
  730. compatible = "brcm,bcm2835-audio";
  731. status = "okay";
  732. phandle = < 0x24 >;
  733. pinctrl-0 = < 0x19 >;
  734. pinctrl-names = "default";
  735. };
  736.  
  737. i2s@7e203000 {
  738. compatible = "brcm,bcm2835-i2s";
  739. clocks = < 0x03 0x1f >;
  740. #sound-dai-cells = < 0x00 >;
  741. status = "disabled";
  742. dma-names = "tx\0rx";
  743. phandle = < 0x20 >;
  744. reg = < 0x7e203000 0x24 >;
  745. pinctrl-0 = < 0x0a >;
  746. dmas = < 0x08 0x02 0x08 0x03 >;
  747. pinctrl-names = "default";
  748. };
  749.  
  750. mailbox@7e00b880 {
  751. compatible = "brcm,bcm2835-mbox";
  752. #mbox-cells = < 0x00 >;
  753. interrupts = < 0x00 0x01 >;
  754. phandle = < 0x18 >;
  755. reg = < 0x7e00b880 0x40 >;
  756. };
  757.  
  758. gpiomem {
  759. compatible = "brcm,bcm2835-gpiomem";
  760. reg = < 0x7e200000 0x1000 >;
  761. };
  762.  
  763. vec@7e806000 {
  764. power-domains = < 0x0f 0x07 >;
  765. compatible = "brcm,bcm2835-vec";
  766. clocks = < 0x03 0x18 >;
  767. status = "disabled";
  768. interrupts = < 0x02 0x1b >;
  769. phandle = < 0x68 >;
  770. reg = < 0x7e806000 0x1000 >;
  771. };
  772.  
  773. power {
  774. compatible = "raspberrypi,bcm2835-power";
  775. firmware = < 0x07 >;
  776. phandle = < 0x0f >;
  777. #power-domain-cells = < 0x01 >;
  778. };
  779.  
  780. pixelvalve@7e206000 {
  781. compatible = "brcm,bcm2835-pixelvalve0";
  782. status = "disabled";
  783. interrupts = < 0x02 0x0d >;
  784. phandle = < 0x5f >;
  785. reg = < 0x7e206000 0x100 >;
  786. };
  787.  
  788. csi@7e800000 {
  789. power-domains = < 0x0f 0x0c >;
  790. compatible = "brcm,bcm2835-unicam";
  791. clocks = < 0x03 0x2d >;
  792. clock-names = "lp";
  793. status = "disabled";
  794. #address-cells = < 0x01 >;
  795. interrupts = < 0x02 0x06 >;
  796. #size-cells = < 0x00 >;
  797. #clock-cells = < 0x01 >;
  798. phandle = < 0x66 >;
  799. reg = < 0x7e800000 0x800 0x7e802000 0x04 >;
  800.  
  801. port {
  802.  
  803. endpoint {
  804. data-lanes = < 0x01 0x02 >;
  805. };
  806. };
  807. };
  808.  
  809. mailbox@7e00b840 {
  810. compatible = "brcm,bcm2836-vchiq\0brcm,bcm2835-vchiq";
  811. interrupts = < 0x00 0x02 >;
  812. phandle = < 0x70 >;
  813. reg = < 0x7e00b840 0x3c >;
  814. };
  815.  
  816. firmware {
  817. compatible = "raspberrypi,bcm2835-firmware\0simple-bus";
  818. mboxes = < 0x18 >;
  819. phandle = < 0x07 >;
  820.  
  821. expgpio {
  822. compatible = "raspberrypi,firmware-gpio";
  823. gpio-controller;
  824. status = "okay";
  825. phandle = < 0x13 >;
  826. #gpio-cells = < 0x02 >;
  827. };
  828. };
  829.  
  830. dsi@7e209000 {
  831. power-domains = < 0x0f 0x11 >;
  832. compatible = "brcm,bcm2835-dsi0";
  833. clocks = < 0x03 0x20 0x03 0x2f 0x03 0x31 >;
  834. clock-names = "phy\0escape\0pixel";
  835. #address-cells = < 0x01 >;
  836. interrupts = < 0x02 0x04 >;
  837. #size-cells = < 0x00 >;
  838. #clock-cells = < 0x01 >;
  839. phandle = < 0x05 >;
  840. reg = < 0x7e209000 0x78 >;
  841. clock-output-names = "dsi0_byte\0dsi0_ddr2\0dsi0_ddr";
  842. };
  843.  
  844. mmcnr@7e300000 {
  845. compatible = "brcm,bcm2835-mmc\0brcm,bcm2835-sdhci";
  846. clocks = < 0x03 0x1c >;
  847. status = "disabled";
  848. interrupts = < 0x02 0x1e >;
  849. brcm,overclock-50 = < 0x00 >;
  850. dma-names = "rx-tx";
  851. phandle = < 0x29 >;
  852. reg = < 0x7e300000 0x100 >;
  853. dmas = < 0x08 0x0b >;
  854. non-removable;
  855. };
  856.  
  857. fb {
  858. compatible = "brcm,bcm2708-fb";
  859. firmware = < 0x07 >;
  860. status = "okay";
  861. phandle = < 0x71 >;
  862. };
  863.  
  864. local_intc@40000000 {
  865. compatible = "brcm,bcm2836-l1-intc";
  866. #interrupt-cells = < 0x02 >;
  867. interrupt-parent = < 0x16 >;
  868. phandle = < 0x16 >;
  869. reg = < 0x40000000 0x100 >;
  870. interrupt-controller;
  871. };
  872.  
  873. virtgpio {
  874. compatible = "brcm,bcm2835-virtgpio";
  875. gpio-controller;
  876. firmware = < 0x07 >;
  877. status = "okay";
  878. phandle = < 0x2c >;
  879. #gpio-cells = < 0x02 >;
  880. };
  881.  
  882. dpi@7e208000 {
  883. compatible = "brcm,bcm2835-dpi";
  884. clocks = < 0x03 0x14 0x03 0x2c >;
  885. clock-names = "core\0pixel";
  886. status = "disabled";
  887. #address-cells = < 0x01 >;
  888. #size-cells = < 0x00 >;
  889. phandle = < 0x61 >;
  890. reg = < 0x7e208000 0x8c >;
  891. };
  892.  
  893. mmc@7e202000 {
  894. compatible = "brcm,bcm2835-sdhost";
  895. clocks = < 0x03 0x14 >;
  896. brcm,pio-limit = < 0x01 >;
  897. status = "okay";
  898. interrupts = < 0x02 0x18 >;
  899. brcm,overclock-50 = < 0x00 >;
  900. bus-width = < 0x04 >;
  901. dma-names = "rx-tx";
  902. phandle = < 0x27 >;
  903. reg = < 0x7e202000 0x100 >;
  904. pinctrl-0 = < 0x09 >;
  905. dmas = < 0x08 0x2000000d >;
  906. pinctrl-names = "default";
  907. };
  908.  
  909. hdmi@7e902000 {
  910. power-domains = < 0x0f 0x05 >;
  911. compatible = "brcm,bcm2835-hdmi";
  912. clocks = < 0x03 0x10 0x03 0x19 >;
  913. clock-names = "pixel\0hdmi";
  914. ddc = < 0x12 >;
  915. status = "disabled";
  916. interrupts = < 0x02 0x08 0x02 0x09 >;
  917. dma-names = "audio-rx";
  918. phandle = < 0x6a >;
  919. hpd-gpios = < 0x13 0x00 0x01 >;
  920. reg = < 0x7e902000 0x600 0x7e808000 0x100 >;
  921. dmas = < 0x08 0x11 >;
  922. };
  923.  
  924. pwm@7e20c000 {
  925. compatible = "brcm,bcm2835-pwm";
  926. clocks = < 0x03 0x1e >;
  927. status = "disabled";
  928. assigned-clock-rates = < 0x989680 >;
  929. assigned-clocks = < 0x03 0x1e >;
  930. phandle = < 0x64 >;
  931. reg = < 0x7e20c000 0x28 >;
  932. #pwm-cells = < 0x02 >;
  933. };
  934.  
  935. watchdog@7e100000 {
  936. compatible = "brcm,bcm2835-pm\0brcm,bcm2835-pm-wdt";
  937. clocks = < 0x03 0x15 0x03 0x1d 0x03 0x17 0x03 0x16 >;
  938. #reset-cells = < 0x01 >;
  939. clock-names = "v3d\0peri_image\0h264\0isp";
  940. system-power-controller;
  941. phandle = < 0x25 >;
  942. reg = < 0x7e100000 0x114 0x7e00a000 0x24 >;
  943. #power-domain-cells = < 0x01 >;
  944. };
  945.  
  946. interrupt-controller@7e00b200 {
  947. compatible = "brcm,bcm2836-armctrl-ic";
  948. #interrupt-cells = < 0x02 >;
  949. interrupt-parent = < 0x16 >;
  950. interrupts = < 0x08 0x04 >;
  951. phandle = < 0x01 >;
  952. reg = < 0x7e00b200 0x200 >;
  953. interrupt-controller;
  954. };
  955.  
  956. aux@7e215000 {
  957. compatible = "brcm,bcm2835-aux";
  958. clocks = < 0x03 0x14 >;
  959. #clock-cells = < 0x01 >;
  960. phandle = < 0x10 >;
  961. reg = < 0x7e215000 0x08 >;
  962. };
  963.  
  964. dsi@7e700000 {
  965. power-domains = < 0x0f 0x12 >;
  966. compatible = "brcm,bcm2835-dsi1";
  967. clocks = < 0x03 0x23 0x03 0x30 0x03 0x32 >;
  968. clock-names = "phy\0escape\0pixel";
  969. status = "disabled";
  970. #address-cells = < 0x01 >;
  971. interrupts = < 0x02 0x0c >;
  972. #size-cells = < 0x00 >;
  973. #clock-cells = < 0x01 >;
  974. phandle = < 0x06 >;
  975. reg = < 0x7e700000 0x8c >;
  976. clock-output-names = "dsi1_byte\0dsi1_ddr2\0dsi1_ddr";
  977. };
  978.  
  979. axiperf {
  980. compatible = "brcm,bcm2835-axiperf";
  981. firmware = < 0x07 >;
  982. status = "disabled";
  983. phandle = < 0x2a >;
  984. reg = < 0x7e009800 0x100 0x7ee08000 0x100 >;
  985. };
  986.  
  987. sound {
  988. status = "disabled";
  989. phandle = < 0x73 >;
  990. };
  991.  
  992. i2c@7e205000 {
  993. compatible = "brcm,bcm2835-i2c";
  994. clocks = < 0x03 0x14 >;
  995. status = "disabled";
  996. #address-cells = < 0x01 >;
  997. interrupts = < 0x02 0x15 >;
  998. #size-cells = < 0x00 >;
  999. phandle = < 0x22 >;
  1000. reg = < 0x7e205000 0x200 >;
  1001. clock-frequency = < 0x186a0 >;
  1002. pinctrl-0 = < 0x0e >;
  1003. pinctrl-names = "default";
  1004. };
  1005.  
  1006. txp@7e004000 {
  1007. compatible = "brcm,bcm2835-txp";
  1008. status = "disabled";
  1009. interrupts = < 0x01 0x0b >;
  1010. phandle = < 0x2f >;
  1011. reg = < 0x7e004000 0x20 >;
  1012. };
  1013.  
  1014. serial@7e215040 {
  1015. compatible = "brcm,bcm2835-aux-uart";
  1016. clocks = < 0x10 0x00 >;
  1017. status = "disabled";
  1018. interrupts = < 0x01 0x1d >;
  1019. phandle = < 0x1f >;
  1020. reg = < 0x7e215040 0x40 >;
  1021. };
  1022.  
  1023. dma@7e007000 {
  1024. #dma-cells = < 0x01 >;
  1025. compatible = "brcm,bcm2835-dma";
  1026. brcm,dma-channel-mask = < 0x7f35 >;
  1027. interrupts = < 0x01 0x10 0x01 0x11 0x01 0x12 0x01 0x13 0x01 0x14 0x01 0x15 0x01 0x16 0x01 0x17 0x01 0x18 0x01 0x19 0x01 0x1a 0x01 0x1b 0x01 0x1b 0x01 0x1b 0x01 0x1b 0x01 0x1c >;
  1028. phandle = < 0x08 >;
  1029. reg = < 0x7e007000 0xf00 >;
  1030. interrupt-names = "dma0\0dma1\0dma2\0dma3\0dma4\0dma5\0dma6\0dma7\0dma8\0dma9\0dma10\0dma11\0dma12\0dma13\0dma14\0dma-shared-all";
  1031. };
  1032.  
  1033. i2c@7e805000 {
  1034. compatible = "brcm,bcm2835-i2c";
  1035. clocks = < 0x03 0x14 >;
  1036. status = "disabled";
  1037. #address-cells = < 0x01 >;
  1038. interrupts = < 0x02 0x15 >;
  1039. #size-cells = < 0x00 >;
  1040. phandle = < 0x12 >;
  1041. reg = < 0x7e805000 0x1000 >;
  1042. clock-frequency = < 0x186a0 >;
  1043. };
  1044.  
  1045. spi@7e215080 {
  1046. compatible = "brcm,bcm2835-aux-spi";
  1047. clocks = < 0x10 0x01 >;
  1048. status = "disabled";
  1049. #address-cells = < 0x01 >;
  1050. interrupts = < 0x01 0x1d >;
  1051. #size-cells = < 0x00 >;
  1052. phandle = < 0x62 >;
  1053. reg = < 0x7e215080 0x40 >;
  1054. };
  1055.  
  1056. firmwarekms@7e600000 {
  1057. compatible = "raspberrypi,rpi-firmware-kms";
  1058. status = "disabled";
  1059. interrupts = < 0x02 0x10 >;
  1060. brcm,firmware = < 0x07 >;
  1061. phandle = < 0x6e >;
  1062. reg = < 0x7e600000 0x100 >;
  1063. };
  1064.  
  1065. rng@7e104000 {
  1066. compatible = "brcm,bcm2835-rng";
  1067. interrupts = < 0x02 0x1d >;
  1068. phandle = < 0x26 >;
  1069. reg = < 0x7e104000 0x10 >;
  1070. };
  1071.  
  1072. usb@7e980000 {
  1073. power-domains = < 0x0f 0x06 >;
  1074. compatible = "brcm,bcm2708-usb";
  1075. clocks = < 0x14 >;
  1076. clock-names = "otg";
  1077. phy-names = "usb2-phy";
  1078. #address-cells = < 0x01 >;
  1079. interrupts = < 0x01 0x09 0x02 0x00 >;
  1080. #size-cells = < 0x00 >;
  1081. phandle = < 0x6b >;
  1082. phys = < 0x15 >;
  1083. reg = < 0x7e980000 0x10000 0x7e006000 0x1000 >;
  1084. interrupt-names = "usb\0soft";
  1085. };
  1086.  
  1087. smi@7e600000 {
  1088. compatible = "brcm,bcm2835-smi";
  1089. clocks = < 0x03 0x2a >;
  1090. status = "disabled";
  1091. interrupts = < 0x02 0x10 >;
  1092. assigned-clock-rates = < 0x7735940 >;
  1093. dma-names = "rx-tx";
  1094. assigned-clocks = < 0x03 0x2a >;
  1095. phandle = < 0x6f >;
  1096. reg = < 0x7e600000 0x100 >;
  1097. dmas = < 0x08 0x04 >;
  1098. };
  1099.  
  1100. spi@7e2150c0 {
  1101. compatible = "brcm,bcm2835-aux-spi";
  1102. clocks = < 0x10 0x02 >;
  1103. status = "disabled";
  1104. #address-cells = < 0x01 >;
  1105. interrupts = < 0x01 0x1d >;
  1106. #size-cells = < 0x00 >;
  1107. phandle = < 0x63 >;
  1108. reg = < 0x7e2150c0 0x40 >;
  1109. };
  1110. };
  1111.  
  1112. leds {
  1113. compatible = "gpio-leds";
  1114. phandle = < 0x75 >;
  1115.  
  1116. act {
  1117. gpios = < 0x2c 0x00 0x00 >;
  1118. label = "led0";
  1119. phandle = < 0x2b >;
  1120. default-state = "keep";
  1121. linux,default-trigger = "mmc0";
  1122. };
  1123. };
  1124.  
  1125. aliases {
  1126. intc = "/soc/interrupt-controller@7e00b200";
  1127. spi2 = "/soc/spi@7e2150c0";
  1128. i2c1 = "/soc/i2c@7e804000";
  1129. i2c_vc = "/soc/i2c@7e205000";
  1130. spi0 = "/soc/spi@7e204000";
  1131. thermal = "/soc/thermal@7e212000";
  1132. sdhost = "/soc/mmc@7e202000";
  1133. aux = "/soc/aux@7e215000";
  1134. gpio = "/soc/gpio@7e200000";
  1135. mmc1 = "/soc/mmc@7e300000";
  1136. audio = "/soc/audio";
  1137. dma = "/soc/dma@7e007000";
  1138. soc = "/soc";
  1139. leds = "/leds";
  1140. mmc = "/soc/mmc@7e300000";
  1141. serial1 = "/soc/serial@7e215040";
  1142. i2c_arm = "/soc/i2c@7e804000";
  1143. uart0 = "/soc/serial@7e201000";
  1144. fb = "/soc/fb";
  1145. i2c2 = "/soc/i2c@7e805000";
  1146. i2s = "/soc/i2s@7e203000";
  1147. spi1 = "/soc/spi@7e215080";
  1148. usb = "/soc/usb@7e980000";
  1149. i2c0 = "/soc/i2c@7e205000";
  1150. watchdog = "/soc/watchdog@7e100000";
  1151. axiperf = "/soc/axiperf";
  1152. mmc0 = "/soc/mmc@7e202000";
  1153. sound = "/soc/sound";
  1154. mailbox = "/soc/mailbox@7e00b880";
  1155. uart1 = "/soc/serial@7e215040";
  1156. random = "/soc/rng@7e104000";
  1157. i2c = "/soc/i2c@7e804000";
  1158. serial0 = "/soc/serial@7e201000";
  1159. };
  1160.  
  1161. chosen {
  1162. bootargs = "coherent_pool=1M bcm2708_fb.fbwidth=656 bcm2708_fb.fbheight=416 bcm2708_fb.fbswap=1 smsc95xx.macaddr=B8:27:EB:50:A3:3F vc_mem.mem_base=0x3ec00000 vc_mem.mem_size=0x40000000 console=ttyAMA0,115200 console=tty1 root=PARTUUID=738a4d67-02 rootfstype=ext4 elevator=deadline fsck.repair=yes rootwait";
  1163. kaslr-seed = < 0xdc145c33 0xfeea5e57 >;
  1164. };
  1165.  
  1166. thermal-zones {
  1167.  
  1168. cpu-thermal {
  1169. thermal-sensors = < 0x02 >;
  1170. polling-delay = < 0x3e8 >;
  1171. polling-delay-passive = < 0x00 >;
  1172. coefficients = < 0xfffffde6 0x64960 >;
  1173. phandle = < 0x2d >;
  1174.  
  1175. cooling-maps {
  1176. };
  1177. };
  1178. };
  1179.  
  1180. timer {
  1181. compatible = "arm,armv7-timer";
  1182. always-on;
  1183. interrupt-parent = < 0x16 >;
  1184. interrupts = < 0x00 0x04 0x01 0x04 0x03 0x04 0x02 0x04 >;
  1185. };
  1186.  
  1187. phy {
  1188. compatible = "usb-nop-xceiv";
  1189. phandle = < 0x15 >;
  1190. #phy-cells = < 0x00 >;
  1191. };
  1192.  
  1193. fixedregulator_3v3 {
  1194. compatible = "regulator-fixed";
  1195. phandle = < 0x76 >;
  1196. regulator-min-microvolt = < 0x325aa0 >;
  1197. regulator-max-microvolt = < 0x325aa0 >;
  1198. regulator-always-on;
  1199. regulator-name = "3v3";
  1200. };
  1201.  
  1202. cpus {
  1203. enable-method = "brcm,bcm2836-smp";
  1204. #address-cells = < 0x01 >;
  1205. #size-cells = < 0x00 >;
  1206. phandle = < 0x74 >;
  1207.  
  1208. cpu@3 {
  1209. compatible = "arm,cortex-a53";
  1210. cpu-release-addr = < 0x00 0xf0 >;
  1211. device_type = "cpu";
  1212. enable-method = "spin-table";
  1213. phandle = < 0x1d >;
  1214. reg = < 0x03 >;
  1215. clock-frequency = < 0x47868c00 >;
  1216. };
  1217.  
  1218. cpu@1 {
  1219. compatible = "arm,cortex-a53";
  1220. cpu-release-addr = < 0x00 0xe0 >;
  1221. device_type = "cpu";
  1222. enable-method = "spin-table";
  1223. phandle = < 0x1b >;
  1224. reg = < 0x01 >;
  1225. clock-frequency = < 0x47868c00 >;
  1226. };
  1227.  
  1228. cpu@2 {
  1229. compatible = "arm,cortex-a53";
  1230. cpu-release-addr = < 0x00 0xe8 >;
  1231. device_type = "cpu";
  1232. enable-method = "spin-table";
  1233. phandle = < 0x1c >;
  1234. reg = < 0x02 >;
  1235. clock-frequency = < 0x47868c00 >;
  1236. };
  1237.  
  1238. cpu@0 {
  1239. compatible = "arm,cortex-a53";
  1240. cpu-release-addr = < 0x00 0xd8 >;
  1241. device_type = "cpu";
  1242. enable-method = "spin-table";
  1243. phandle = < 0x1a >;
  1244. reg = < 0x00 >;
  1245. clock-frequency = < 0x47868c00 >;
  1246. };
  1247. };
  1248.  
  1249. fixedregulator_5v0 {
  1250. compatible = "regulator-fixed";
  1251. phandle = < 0x77 >;
  1252. regulator-min-microvolt = < 0x4c4b40 >;
  1253. regulator-max-microvolt = < 0x4c4b40 >;
  1254. regulator-always-on;
  1255. regulator-name = "5v0";
  1256. };
  1257.  
  1258. axi {
  1259.  
  1260. vc_mem {
  1261. reg = < 0x3ec00000 0x40000000 0xc0000000 >;
  1262. };
  1263. };
  1264. };
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