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  1.  
  2.  
  3. coreboot-4.10-108-ga2610a5ead-MrChromebox-4.10 Thu Aug 22 16:24:25 UTC 2019 bootblock starting (log level: 7)...
  4. CBFS: 'Master Header Locator' located CBFS at [600200:800000)
  5. CBFS: Locating 'fallback/romstage'
  6. CBFS: Found @ offset 80 size 6c64
  7.  
  8.  
  9. coreboot-4.10-108-ga2610a5ead-MrChromebox-4.10 Thu Aug 22 16:24:25 UTC 2019 romstage starting (log level: 7)...
  10. Disabling Watchdog reboot... done.
  11. SMBus controller enabled.
  12. Setting up static northbridge registers... done.
  13. Initializing IGD...
  14. Back from haswell_early_initialization()
  15. CPU id(40651) ucode:00000025 Intel(R) Celeron(R) 2955U @ 1.40GHz
  16. AES NOT supported, TXT NOT supported, VT supported
  17. PCH type: LP Mainstream, device id: 9c45, rev id 4
  18. SPD index 3
  19. CBFS: 'Master Header Locator' located CBFS at [600200:800000)
  20. CBFS: Locating 'spd.bin'
  21. CBFS: Found @ offset fa980 size 800
  22. Starting UEFI PEI System Agent
  23. FMAP: Found "FLASH" version 1.1 at 600000.
  24. FMAP: base = ff800000 size = 800000 #areas = 5
  25. FMAP: area RW_MRC_CACHE found @ 5b0000 (65536 bytes)
  26. prepare_mrc_cache: at ffdb9f90, size fd4
  27. FMAP: area COREBOOT found @ 600200 (2096640 bytes)
  28. CBFS: Locating 'mrc.bin'
  29. CBFS: Found @ offset 19fdc0 size 2e6e4
  30. System Agent: Starting up...
  31. System Agent: Initializing PCH
  32. install_ppi: overwrite GUID {ed097352-9041-445a-80b6-b29d509e8845}
  33. install_ppi: overwrite GUID {908c7f8b-5c48-47fb-8357-f5fd4e235276}
  34. System Agent: Initializing PCH (SMBUS)
  35. System Agent: Initializing PCH (USB)
  36. System Agent: Initializing PCH (SA Init)
  37. System Agent: Initializing PCH (Me UMA)
  38. System Agent: Initializing Memory
  39. Copy SPD for Channel 0 Dimm 0
  40. System Agent: Done.
  41. Sanity checking heap.
  42. System Agent Version 1.6.1 Build 2
  43. memcfg DDR3 clock 1600 MHz
  44. memcfg channel assignment: A: 0, B 1, C 2
  45. memcfg channel[0] config (00780008):
  46. ECC inactive
  47. enhanced interleave mode on
  48. rank interleave on
  49. DIMMA 2048 MB width x16 single rank, selected
  50. DIMMB 0 MB width x16 single rank
  51. memcfg channel[1] config (00600000):
  52. ECC inactive
  53. enhanced interleave mode on
  54. rank interleave on
  55. DIMMA 0 MB width x8 or x32 single rank, selected
  56. DIMMB 0 MB width x8 or x32 single rank
  57. ME: FW Partition Table : OK
  58. ME: Bringup Loader Failure : NO
  59. ME: Firmware Init Complete : NO
  60. ME: Manufacturing Mode : NO
  61. ME: Boot Options Present : NO
  62. ME: Update In Progress : NO
  63. ME: Current Working State : Normal
  64. ME: Current Operation State : M0 with UMA
  65. ME: Current Operation Mode : Normal
  66. ME: Error Code : No Error
  67. ME: Progress Phase : BUP Phase
  68. ME: Power Management Event : Clean Moff->Mx wake
  69. ME: Progress Phase State : M0 kernel load
  70. CBMEM:
  71. IMD: root @ 77fff000 254 entries.
  72. IMD: root @ 77ffec00 62 entries.
  73. External stage cache:
  74. IMD: root @ 783ff000 254 entries.
  75. IMD: root @ 783fec00 62 entries.
  76. MTRR Range: Start=ff800000 End=0 (Size 800000)
  77. MTRR Range: Start=0 End=1000000 (Size 1000000)
  78. MTRR Range: Start=77800000 End=78000000 (Size 800000)
  79. MTRR Range: Start=78000000 End=78800000 (Size 800000)
  80. CBFS: 'Master Header Locator' located CBFS at [600200:800000)
  81. CBFS: Locating 'fallback/postcar'
  82. CBFS: Found @ offset 36a80 size 3e9c
  83. Decompressing stage fallback/postcar @ 0x77fd1fc0 (32824 bytes)
  84. Loading module at 77fd2000 with entry 77fd2000. filesize: 0x3c50 memsize: 0x7ff8
  85. Processing 124 relocs. Offset value of 0x75fd2000
  86.  
  87.  
  88. coreboot-4.10-108-ga2610a5ead-MrChromebox-4.10 Thu Aug 22 16:24:25 UTC 2019 postcar starting (log level: 7)...
  89. CBFS: 'Master Header Locator' located CBFS at [600200:800000)
  90. CBFS: Locating 'fallback/ramstage'
  91. CBFS: Found @ offset c200 size 18051
  92. Decompressing stage fallback/ramstage @ 0x77f87fc0 (297576 bytes)
  93. Loading module at 77f88000 with entry 77f88000. filesize: 0x33678 memsize: 0x48a28
  94. Processing 3410 relocs. Offset value of 0x77188000
  95.  
  96.  
  97. coreboot-4.10-108-ga2610a5ead-MrChromebox-4.10 Thu Aug 22 16:24:25 UTC 2019 ramstage starting (log level: 7)...
  98. Normal boot.
  99. BS: BS_PRE_DEVICE times (us): entry 0 run 0 exit 0
  100. BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 1 exit 0
  101. Enumerating buses...
  102. CPU_CLUSTER: 0 enabled
  103. DOMAIN: 0000 enabled
  104. PCI: pci_scan_bus for bus 00
  105. PCI: 00:00.0 [8086/0a04] enabled
  106. PCI: 00:02.0 [8086/0a06] enabled
  107. PCI: 00:03.0 [8086/0a0c] enabled
  108. PCI: 00:04.0 [8086/0a03] enabled
  109. PCI: 00:13.0: Disabling device
  110. PCI: 00:13.0 [8086/9c36] disabled No operations
  111. PCI: 00:14.0 [8086/9c31] enabled
  112. PCI: 00:15.0 [8086/9c60] enabled
  113. PCI: 00:15.1 [8086/9c61] enabled
  114. PCI: 00:15.2 [8086/9c62] enabled
  115. PCI: 00:15.3: Disabling device
  116. IOBP: set 0xce00aac7 to 0x00000100
  117. PCI: 00:15.4: Disabling device
  118. IOBP: set 0xce00ab07 to 0x00000100
  119. PCI: 00:15.5: Disabling device
  120. IOBP: set 0xce00ab47 to 0x00000100
  121. PCI: 00:15.6: Disabling device
  122. IOBP: set 0xce00ab87 to 0x00000100
  123. PCI: 00:16.0 [8086/9c3a] enabled
  124. PCI: 00:16.1: Disabling device
  125. PCI: 00:16.1 [8086/9c3b] disabled No operations
  126. PCI: 00:16.2: Disabling device
  127. PCI: 00:16.3: Disabling device
  128. PCI: 00:17.0: Disabling device
  129. IOBP: set 0xce00ae07 to 0x00000100
  130. PCI: 00:19.0: Disabling device
  131. PCI: 00:1b.0 [8086/9c20] enabled
  132. PCIe Root Port 1 ASPM is enabled
  133. IOBP: set 0xe9002440 to 0x05050e00
  134. PCI: 00:1c.0 [8086/9c10] enabled
  135. PCI: 00:1c.1 [8086/9c12] disabled
  136. PCI: 00:1c.2 [8086/9c14] disabled
  137. PCI: 00:1c.3 [8086/9c16] disabled
  138. PCI: 00:1c.4 [8086/9c18] disabled
  139. PCI: 00:1c.1: Disabling device
  140. PCI: 00:1c.2: Disabling device
  141. PCI: 00:1c.3: Disabling device
  142. PCI: 00:1c.4: Disabling device
  143. PCI: 00:1c.5: Disabling device
  144. PCI: 00:1c.5 [8086/9c1a] disabled
  145. PCI: 00:1d.0 [8086/9c26] enabled
  146. PCI: 00:1e.0: Disabling device
  147. PCI: 00:1f.0 [8086/9c45] enabled
  148. PCI: 00:1f.2 [8086/9c03] enabled
  149. PCI: 00:1f.3 [8086/9c22] enabled
  150. PCI: 00:1f.6 [8086/9c24] enabled
  151. PCI: Leftover static devices:
  152. PCI: 00:15.3
  153. PCI: 00:15.4
  154. PCI: 00:15.5
  155. PCI: 00:15.6
  156. PCI: 00:16.2
  157. PCI: 00:16.3
  158. PCI: 00:17.0
  159. PCI: 00:19.0
  160. PCI: 00:1e.0
  161. PCI: Check your devicetree.cb.
  162. PCI: pci_scan_bus for bus 01
  163. PCI: 01:00.0 [168c/0034] enabled
  164. Enabling Common Clock Configuration
  165. ASPM: Enabled L0s and L1
  166. Failed to enable LTR for dev = PCI: 01:00.0
  167. scan_bus: scanning of bus PCI: 00:1c.0 took 177 usecs
  168. PNP: 0c31.0 enabled
  169. PNP: 00ff.1 enabled
  170. PNP: 00ff.0 enabled
  171. scan_bus: scanning of bus PCI: 00:1f.0 took 10 usecs
  172. scan_bus: scanning of bus PCI: 00:1f.3 took 2 usecs
  173. scan_bus: scanning of bus DOMAIN: 0000 took 793 usecs
  174. scan_bus: scanning of bus Root Device took 800 usecs
  175. done
  176. FMAP: Found "FLASH" version 1.1 at 600000.
  177. FMAP: base = ff800000 size = 800000 #areas = 5
  178. FMAP: area RW_MRC_CACHE found @ 5b0000 (65536 bytes)
  179. MRC: Checking cached data update for 'RW_MRC_CACHE'.
  180. Manufacturer: ef
  181. SF: Detected W25Q64_V with sector size 0x1000, total 0x800000
  182. MRC: cache data 'RW_MRC_CACHE' needs update.
  183. BS: BS_DEV_ENUMERATE times (us): entry 0 run 831 exit 12472
  184. found VGA at PCI: 00:02.0
  185. Setting up VGA for PCI: 00:02.0
  186. Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
  187. Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
  188. Allocating resources...
  189. Reading resources...
  190. mc_add_fixed_mmio_resources: Adding PCIEXBAR @ 60 0xf0000000-0xf3ffffff.
  191. mc_add_fixed_mmio_resources: Adding MCHBAR @ 48 0xfed10000-0xfed17fff.
  192. mc_add_fixed_mmio_resources: Adding DMIBAR @ 68 0xfed18000-0xfed18fff.
  193. mc_add_fixed_mmio_resources: Adding EPBAR @ 40 0xfed19000-0xfed19fff.
  194. mc_add_fixed_mmio_resources: Adding GDXCBAR @ 5420 0xfed84000-0xfed84fff.
  195. MC MAP: TOM: 0x80000000
  196. MC MAP: TOUUD: 0x100600000
  197. MC MAP: MESEG_BASE: 0x7f000000
  198. MC MAP: MESEG_LIMIT: 0x7fff0fffff
  199. MC MAP: REMAP_BASE: 0x100000000
  200. MC MAP: REMAP_LIMIT: 0x1005fffff
  201. MC MAP: TOLUD: 0x7ea00000
  202. MC MAP: BGSM: 0x78800000
  203. MC MAP: BDSM: 0x78a00000
  204. MC MAP: TESGMB: 0x78000000
  205. MC MAP: GGC: 0x219
  206. PNP: 00ff.1 missing read_resources
  207. Done reading resources.
  208. Setting resources...
  209. PCI: 00:02.0 10 <- [0x00e0000000 - 0x00e03fffff] size 0x00400000 gran 0x16 mem64
  210. PCI: 00:02.0 18 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran 0x1c prefmem64
  211. PCI: 00:02.0 20 <- [0x0000001800 - 0x000000183f] size 0x00000040 gran 0x06 io
  212. PCI: 00:03.0 10 <- [0x00e0518000 - 0x00e051bfff] size 0x00004000 gran 0x0e mem64
  213. PCI: 00:04.0 10 <- [0x00e0510000 - 0x00e0517fff] size 0x00008000 gran 0x0f mem64
  214. PCI: 00:14.0 10 <- [0x00e0500000 - 0x00e050ffff] size 0x00010000 gran 0x10 mem64
  215. PCI: 00:15.0 10 <- [0x00e0520000 - 0x00e0520fff] size 0x00001000 gran 0x0c mem
  216. PCI: 00:15.0 14 <- [0x00e0521000 - 0x00e0521fff] size 0x00001000 gran 0x0c mem
  217. PCI: 00:15.1 10 <- [0x00e0522000 - 0x00e0522fff] size 0x00001000 gran 0x0c mem
  218. PCI: 00:15.1 14 <- [0x00e0523000 - 0x00e0523fff] size 0x00001000 gran 0x0c mem
  219. PCI: 00:15.2 10 <- [0x00e0524000 - 0x00e0524fff] size 0x00001000 gran 0x0c mem
  220. PCI: 00:15.2 14 <- [0x00e0525000 - 0x00e0525fff] size 0x00001000 gran 0x0c mem
  221. PCI: 00:16.0 10 <- [0x00e052a000 - 0x00e052a01f] size 0x00000020 gran 0x05 mem64
  222. PCI: 00:1b.0 10 <- [0x00e051c000 - 0x00e051ffff] size 0x00004000 gran 0x0e mem64
  223. PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
  224. PCI: 00:1c.0 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 01 prefmem
  225. PCI: 00:1c.0 20 <- [0x00e0400000 - 0x00e04fffff] size 0x00100000 gran 0x14 bus 01 mem
  226. PCI: 01:00.0 10 <- [0x00e0400000 - 0x00e047ffff] size 0x00080000 gran 0x13 mem64
  227. PCI: 01:00.0 30 <- [0x00e0480000 - 0x00e048ffff] size 0x00010000 gran 0x10 romem
  228. PCI: 00:1d.0 10 <- [0x00e0528000 - 0x00e05283ff] size 0x00000400 gran 0x0a mem
  229. PCI: 00:1f.2 10 <- [0x0000001860 - 0x0000001867] size 0x00000008 gran 0x03 io
  230. PCI: 00:1f.2 14 <- [0x0000001870 - 0x0000001873] size 0x00000004 gran 0x02 io
  231. PCI: 00:1f.2 18 <- [0x0000001868 - 0x000000186f] size 0x00000008 gran 0x03 io
  232. PCI: 00:1f.2 1c <- [0x0000001874 - 0x0000001877] size 0x00000004 gran 0x02 io
  233. PCI: 00:1f.2 20 <- [0x0000001840 - 0x000000185f] size 0x00000020 gran 0x05 io
  234. PCI: 00:1f.2 24 <- [0x00e0527000 - 0x00e05277ff] size 0x00000800 gran 0x0b mem
  235. PCI: 00:1f.3 10 <- [0x00e0529000 - 0x00e05290ff] size 0x00000100 gran 0x08 mem64
  236. PCI: 00:1f.6 10 <- [0x00e0526000 - 0x00e0526fff] size 0x00001000 gran 0x0c mem64
  237. Done setting resources.
  238. Done allocating resources.
  239. BS: BS_DEV_RESOURCES times (us): entry 0 run 1041 exit 0
  240. Enabling resources...
  241. PCI: 00:00.0 subsystem <- 8086/0a04
  242. PCI: 00:00.0 cmd <- 06
  243. PCI: 00:02.0 subsystem <- 8086/0a06
  244. PCI: 00:02.0 cmd <- 03
  245. PCI: 00:03.0 subsystem <- 8086/0a0c
  246. PCI: 00:03.0 cmd <- 02
  247. PCI: 00:04.0 cmd <- 02
  248. PCI: 00:14.0 subsystem <- 8086/9c31
  249. PCI: 00:14.0 cmd <- 102
  250. PCI: 00:15.0 subsystem <- 8086/9c60
  251. PCI: 00:15.0 cmd <- 106
  252. PCI: 00:15.1 subsystem <- 8086/9c61
  253. PCI: 00:15.1 cmd <- 102
  254. PCI: 00:15.2 subsystem <- 8086/9c62
  255. PCI: 00:15.2 cmd <- 102
  256. PCI: 00:16.0 subsystem <- 8086/9c3a
  257. PCI: 00:16.0 cmd <- 02
  258. PCI: 00:1b.0 subsystem <- 8086/9c20
  259. PCI: 00:1b.0 cmd <- 102
  260. PCI: 00:1c.0 bridge ctrl <- 0003
  261. PCI: 00:1c.0 subsystem <- 8086/9c10
  262. PCI: 00:1c.0 cmd <- 06
  263. PCI: 00:1d.0 subsystem <- 8086/9c26
  264. PCI: 00:1d.0 cmd <- 102
  265. PCI: 00:1f.0 subsystem <- 8086/9c45
  266. PCI: 00:1f.0 cmd <- 107
  267. PCI: 00:1f.2 subsystem <- 8086/9c03
  268. PCI: 00:1f.2 cmd <- 103
  269. PCI: 00:1f.3 subsystem <- 8086/9c22
  270. PCI: 00:1f.3 cmd <- 103
  271. PCI: 00:1f.6 subsystem <- 8086/9c24
  272. PCI: 00:1f.6 cmd <- 102
  273. PCI: 01:00.0 cmd <- 02
  274. done.
  275. BS: BS_DEV_ENABLE times (us): entry 0 run 122 exit 0
  276. Found TPM SLB9635 TT 1.2 by Infineon
  277. TPM: Startup
  278. TPM: command 0x99 returned 0x0
  279. TPM: Asserting physical presence
  280. TPM: command 0x4000000a returned 0x0
  281. TPM: command 0x65 returned 0x0
  282. TPM: flags disable=0, deactivated=0, nvlocked=1
  283. TPM: setup succeeded
  284. Initializing devices...
  285. Root Device init ...
  286. mainboard_ec_init
  287. Chrome EC: Set SMI mask to 0x0000000000000000
  288. EC returned error result code 1
  289. Chrome EC: UHEPI not supported
  290. Chrome EC: Set WAKE mask to 0x0000000000000000
  291. Root Device init finished in 1146 usecs
  292. CPU_CLUSTER: 0 init ...
  293. MTRR: Physical address space:
  294. 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
  295. 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
  296. 0x00000000000c0000 - 0x0000000078800000 size 0x78740000 type 6
  297. 0x0000000078800000 - 0x00000000d0000000 size 0x57800000 type 0
  298. 0x00000000d0000000 - 0x00000000e0000000 size 0x10000000 type 1
  299. 0x00000000e0000000 - 0x0000000100000000 size 0x20000000 type 0
  300. 0x0000000100000000 - 0x0000000100600000 size 0x00600000 type 6
  301. MTRR: Fixed MSR 0x250 0x0606060606060606
  302. MTRR: Fixed MSR 0x258 0x0606060606060606
  303. MTRR: Fixed MSR 0x259 0x0000000000000000
  304. MTRR: Fixed MSR 0x268 0x0606060606060606
  305. MTRR: Fixed MSR 0x269 0x0606060606060606
  306. MTRR: Fixed MSR 0x26a 0x0606060606060606
  307. MTRR: Fixed MSR 0x26b 0x0606060606060606
  308. MTRR: Fixed MSR 0x26c 0x0606060606060606
  309. MTRR: Fixed MSR 0x26d 0x0606060606060606
  310. MTRR: Fixed MSR 0x26e 0x0606060606060606
  311. MTRR: Fixed MSR 0x26f 0x0606060606060606
  312. CPU physical address size: 39 bits
  313. MTRR: default type WB/UC MTRR counts: 8/7.
  314. MTRR: UC selected as default type.
  315. MTRR: 0 base 0x0000000000000000 mask 0x0000007fc0000000 type 6
  316. MTRR: 1 base 0x0000000040000000 mask 0x0000007fe0000000 type 6
  317. MTRR: 2 base 0x0000000060000000 mask 0x0000007ff0000000 type 6
  318. MTRR: 3 base 0x0000000070000000 mask 0x0000007ff8000000 type 6
  319. MTRR: 4 base 0x0000000078000000 mask 0x0000007fff800000 type 6
  320. MTRR: 5 base 0x00000000d0000000 mask 0x0000007ff0000000 type 1
  321. MTRR: 6 base 0x0000000100000000 mask 0x0000007fff800000 type 6
  322.  
  323. MTRR check
  324. Fixed MTRRs : Enabled
  325. Variable MTRRs: Enabled
  326.  
  327. Initializing VR config.
  328. PCODE: 24MHz BLCK calibration response: 0
  329. PCODE: 24MHz BLCK calibration value: 0x85000000
  330. PCH Power: PCODE Levels 0x3f1c50c2 0x004cd2c9
  331. CPU has 2 cores, 2 threads enabled.
  332. Setting up SMI for CPU
  333. Will perform SMM setup.
  334. CBFS: 'Master Header Locator' located CBFS at [600200:800000)
  335. CBFS: Locating 'cpu_microcode_blob.bin'
  336. CBFS: Found @ offset 6d80 size 5400
  337. microcode: sig=0x40651 pf=0x40 revision=0x25
  338. CPU: Intel(R) Celeron(R) 2955U @ 1.40GHz.
  339. Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
  340. Processing 16 relocs. Offset value of 0x00030000
  341. Attempting to start 1 APs
  342. Waiting for 10ms after sending INIT.
  343. Waiting for 1st SIPI to complete...done.
  344. Waiting for 2nd SIPI to complete...done.
  345. AP: slot 1 apic_id 2.
  346. Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
  347. Processing 13 relocs. Offset value of 0x00038000
  348. SMM Module: stub loaded at 00038000. Will call 77fa0024(00000000)
  349. Installing SMM handler to 0x78000000
  350. Loading module at 78010000 with entry 78010805. filesize: 0x5c50 memsize: 0x9d18
  351. Processing 434 relocs. Offset value of 0x78010000
  352. Loading module at 78008000 with entry 78008000. filesize: 0x1a8 memsize: 0x1a8
  353. Processing 13 relocs. Offset value of 0x78008000
  354. SMM Module: placing jmp sequence at 78007c00 rel16 0x03fd
  355. SMM Module: stub loaded at 78008000. Will call 78010805(00000000)
  356. Initializing Southbridge SMI...
  357. SMI_STS: PM1
  358. WAK PCIEXPWAK PWRBTN New SMBASE 0x78000000
  359. In relocation handler: cpu 0
  360. New SMBASE=0x78000000 IEDBASE=0x78400000
  361. Writing SMRR. base = 0x78000006, mask=0xff800800
  362. Relocation complete.
  363. microcode: Update skipped, already up-to-date
  364. New SMBASE 0x77fffc00
  365. In relocation handler: cpu 1
  366. New SMBASE=0x77fffc00 IEDBASE=0x78400000
  367. Writing SMRR. base = 0x78000006, mask=0xff800800
  368. Relocation complete.
  369. microcode: Update skipped, already up-to-date
  370. Initializing CPU #0
  371. CPU: vendor Intel device 40651
  372. CPU: family 06, model 45, stepping 01
  373. Setting up local APIC...
  374. apic_id: 0x00 done.
  375. VMX status: enabled
  376. IA32_FEATURE_CONTROL status: locked
  377. haswell: energy policy set to 6
  378. haswell: frequency set to 1400
  379. Turbo is unavailable
  380. CPU #0 initialized
  381. Initializing CPU #1
  382. CPU: vendor Intel device 40651
  383. CPU: family 06, model 45, stepping 01
  384. Setting up local APIC...
  385. apic_id: 0x02 done.
  386. VMX status: enabled
  387. IA32_FEATURE_CONTROL status: locked
  388. haswell: energy policy set to 6
  389. haswell: frequency set to 1400
  390. CPU #1 initialized
  391. bsp_do_flight_plan done after 1 msecs.
  392. Enabling SMIs.
  393. Locking SMM.
  394. CPU_CLUSTER: 0 init finished in 14190 usecs
  395. PCI: 00:00.0 init ...
  396. Disabling PEG12.
  397. Disabling PEG11.
  398. Disabling PEG10.
  399. Disabling "device 7".
  400. Set BIOS_RESET_CPL
  401. CPU TDP: 15 Watts
  402. PCI: 00:00.0 init finished in 1014 usecs
  403. PCI: 00:02.0 init ...
  404. GT Power Management Init
  405. GT Power Management Init (post VBIOS)
  406. PCI: 00:02.0 init finished in 132 usecs
  407. PCI: 00:03.0 init ...
  408. Mini-HD: base = e0518000
  409. HDA: Initializing codec #0
  410. HDA: codec viddid: 80862807
  411. HDA: verb loaded.
  412. PCI: 00:03.0 init finished in 1355 usecs
  413. PCI: 00:04.0 init ...
  414. PCI: 00:04.0 init finished in 0 usecs
  415. PCI: 00:14.0 init ...
  416. IOBP: set 0xe5004001 to 0x000000ce
  417. PCI: 00:14.0 init finished in 1083 usecs
  418. PCI: 00:15.0 init ...
  419. Initializing Serial IO device
  420. IOBP: set 0xcb000154 to 0x0000131f
  421. IOBP: set 0xcb000180 to 0x0000003f
  422. IOBP: set 0xcb000240 to 0x0034000a
  423. PCI: 00:15.0 init finished in 92 usecs
  424. PCI: 00:15.1 init ...
  425. Initializing Serial IO device
  426. IOBP: set 0xcb000248 to 0x0034000e
  427. PCI: 00:15.1 init finished in 35 usecs
  428. PCI: 00:15.2 init ...
  429. Initializing Serial IO device
  430. IOBP: set 0xcb000250 to 0x0034000e
  431. PCI: 00:15.2 init finished in 35 usecs
  432. PCI: 00:16.0 init ...
  433. ME: FW Partition Table : OK
  434. ME: Bringup Loader Failure : NO
  435. ME: Firmware Init Complete : NO
  436. ME: Manufacturing Mode : NO
  437. ME: Boot Options Present : NO
  438. ME: Update In Progress : NO
  439. ME: Current Working State : Normal
  440. ME: Current Operation State : M0 with UMA
  441. ME: Current Operation Mode : Normal
  442. ME: Error Code : No Error
  443. ME: Progress Phase : uKernel Phase
  444. ME: Power Management Event : Clean Moff->Mx wake
  445. ME: Progress Phase State : Unknown phase: 0x02 sate: 0x00
  446. ME: BIOS path: Normal
  447. ME: Extend SHA-256: 4822ca12b90cdd73e39caab8cdba777ac831451069f18f0be9b0340e9ad356e3
  448. ME MBP: Header: items: 9, size dw: 34
  449. ME: found version 9.5.13.1706
  450. ME: Wake Event to ME Reset: 0 ms
  451. ME: ME Reset to Platform Reset: 0 ms
  452. ME: Platform Reset to CPU Reset: 88 ms
  453. ME: ICC SET CLOCK ENABLES 0x013e0000
  454. PCI: 00:16.0 init finished in 56 usecs
  455. PCI: 00:1b.0 init ...
  456. Azalia: base = e051c000
  457. Azalia: codec_mask = 01
  458. HDA: Initializing codec #0
  459. HDA: codec viddid: 10ec0283
  460. HDA: verb loaded.
  461. PCI: 00:1b.0 init finished in 3638 usecs
  462. PCI: 00:1c.0 init ...
  463. Initializing PCH PCIe bridge.
  464. PCI: 00:1c.0 init finished in 7 usecs
  465. PCI: 00:1d.0 init ...
  466. EHCI: Setting up controller.. IOBP: set 0xe5004001 to 0x000000ce
  467. done.
  468. PCI: 00:1d.0 init finished in 32 usecs
  469. PCI: 00:1f.0 init ...
  470. pch: lpc_init
  471. IOAPIC: Initializing IOAPIC at 0xfec00000
  472. IOAPIC: Bootstrap Processor Local APIC = 0x00
  473. IOAPIC: ID = 0x02
  474. Set power off after power failure.
  475. NMI sources disabled.
  476. LynxPoint LP PM init
  477. IOBP: set 0xed00015c to 0x1bc33700
  478. IOBP: set 0xed000118 to 0x00c00000
  479. IOBP: set 0xed000120 to 0x00245560
  480. IOBP: set 0xca000000 to 0x00000009
  481. IOBP: set 0xcf000000 to 0x00007007
  482. IOBP: set 0xce00c000 to 0x00000000
  483. RTC: failed = 0x0
  484. RTC Init
  485. Disabling ACPI via APMC:
  486. done.
  487. PCI: 00:1f.0 init finished in 2822 usecs
  488. PCI: 00:1f.2 init ...
  489. SATA: Initializing...
  490. SATA: Controller in AHCI mode.
  491. ABAR: e0527000
  492. PCI: 00:1f.2 init finished in 26 usecs
  493. PCI: 00:1f.3 init ...
  494. PCI: 00:1f.3 init finished in 5 usecs
  495. PCI: 00:1f.6 init ...
  496. PCI: 00:1f.6 init finished in 0 usecs
  497. PCI: 01:00.0 init ...
  498. PCI: 01:00.0 init finished in 0 usecs
  499. PNP: 00ff.0 init ...
  500. Google Chrome EC: Initializing
  501. Google Chrome EC: Hello got back 11223344 status (0)
  502. Google Chrome EC: version:
  503. ro: falco_v1.5.132-c77d95f
  504. rw: falco_v1.5.142-9c22831
  505. running image: 2
  506. CBFS: 'Master Header Locator' located CBFS at [600200:800000)
  507. CBFS: Locating 'ecrw.hash'
  508. CBFS: Found @ offset 36080 size 20
  509. ChromeEC SW Sync: Expected hash: 25e2b9884593aed4b09df6c03c1e2ad3429a80c6130e2a4dfc563aaa313370c6
  510. ChromeEC: Getting hash:
  511. ChromeEC SW Sync: current EC_RW hash: 25e2b9884593aed4b09df6c03c1e2ad3429a80c6130e2a4dfc563aaa313370c6
  512. ChromeEC SW Sync: EC_RW is up to date
  513. EC returned error result code 1
  514. PNP: 00ff.0 init finished in 2382 usecs
  515. Devices initialized
  516. BS: BS_DEV_INIT times (us): entry 12463 run 28076 exit 0
  517. Finalize devices...
  518. PCI: 00:1f.0 final
  519. Devices finalized
  520. BS: BS_POST_DEVICE times (us): entry 0 run 251986 exit 0
  521. BS: BS_OS_RESUME_CHECK times (us): entry 0 run 0 exit 0
  522. CBFS: 'Master Header Locator' located CBFS at [600200:800000)
  523. CBFS: Locating 'fallback/dsdt.aml'
  524. CBFS: Found @ offset 3a980 size 4246
  525. CBFS: 'Master Header Locator' located CBFS at [600200:800000)
  526. CBFS: Locating 'fallback/slic'
  527. CBFS: 'fallback/slic' not found.
  528. ACPI: Writing ACPI tables at 77f4a000.
  529. ACPI: * FACS
  530. ACPI: * DSDT
  531. ACPI: * FADT
  532. ACPI: added table 1/32, length now 40
  533. ACPI: * SSDT
  534. Found 1 CPU(s) with 2 core(s) each.
  535. PSS: 1400MHz power 15000 control 0xe00 status 0xe00
  536. PSS: 1200MHz power 12559 control 0xc00 status 0xc00
  537. PSS: 1000MHz power 10217 control 0xa00 status 0xa00
  538. PSS: 800MHz power 7982 control 0x800 status 0x800
  539. PSS: 1400MHz power 15000 control 0xe00 status 0xe00
  540. PSS: 1200MHz power 12559 control 0xc00 status 0xc00
  541. PSS: 1000MHz power 10217 control 0xa00 status 0xa00
  542. PSS: 800MHz power 7982 control 0x800 status 0x800
  543. Generating ACPI PIRQ entries
  544. \_SB.PCI0.LPCB.TPM: LPC TPM PNP: 0c31.0
  545. ACPI: added table 2/32, length now 44
  546. ACPI: * MCFG
  547. ACPI: added table 3/32, length now 48
  548. ACPI: * TCPA
  549. TCPA log created at 77f3a000
  550. ACPI: added table 4/32, length now 52
  551. ACPI: * MADT
  552. ACPI: added table 5/32, length now 56
  553. current = 77f4f4e0
  554. CBFS: 'Master Header Locator' located CBFS at [600200:800000)
  555. CBFS: Locating 'vbt.bin'
  556. CBFS: Found @ offset 36100 size 553
  557. Found a VBT of 4608 bytes after decompression
  558. GMA: Found VBT in CBFS
  559. GMA: Found valid VBT in CBFS
  560. ACPI: * HPET
  561. ACPI: added table 6/32, length now 60
  562. ACPI: * SSDT2
  563. ACPI: added table 7/32, length now 64
  564. current = 77f51580
  565. ACPI: done.
  566. ACPI tables: 30080 bytes.
  567. smbios_write_tables: 77f39000
  568. Create SMBIOS type 16
  569. Create SMBIOS type 17
  570. Create SMBIOS type 19
  571. Create SMBIOS type 20
  572. Root Device (Google Falco)
  573. SMBIOS tables: 817 bytes.
  574. Writing table forward entry at 0x00000500
  575. Wrote coreboot table at: 00000500, 0x10 bytes, checksum a7e7
  576. Writing coreboot table at 0x77f6e000
  577. 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
  578. 1. 0000000000001000-000000000009ffff: RAM
  579. 2. 00000000000a0000-00000000000fffff: RESERVED
  580. 3. 0000000000100000-0000000077f38fff: RAM
  581. 4. 0000000077f39000-0000000077f87fff: CONFIGURATION TABLES
  582. 5. 0000000077f88000-0000000077fd0fff: RAMSTAGE
  583. 6. 0000000077fd1000-0000000077ffffff: CONFIGURATION TABLES
  584. 7. 0000000078000000-000000007e9fffff: RESERVED
  585. 8. 00000000f0000000-00000000f3ffffff: RESERVED
  586. 9. 00000000fed10000-00000000fed19fff: RESERVED
  587. 10. 00000000fed40000-00000000fed44fff: RESERVED
  588. 11. 00000000fed84000-00000000fed84fff: RESERVED
  589. 12. 0000000100000000-00000001005fffff: RAM
  590. CBFS: 'Master Header Locator' located CBFS at [600200:800000)
  591. Wrote coreboot table at: 77f6e000, 0x370 bytes, checksum 5676
  592. coreboot table: 904 bytes.
  593. IMD ROOT 0. 77fff000 00001000
  594. IMD SMALL 1. 77ffe000 00001000
  595. CONSOLE 2. 77fde000 00020000
  596. TIME STAMP 3. 77fdd000 00000910
  597. MRC DATA 4. 77fdc000 00000fe4
  598. ROMSTG STCK 5. 77fdb000 00001000
  599. AFTER CAR 6. 77fd1000 0000a000
  600. RAMSTAGE 7. 77f87000 0004a000
  601. ACPI GNVS 8. 77f86000 00001000
  602. SMM BACKUP 9. 77f76000 00010000
  603. COREBOOT 10. 77f6e000 00008000
  604. ACPI 11. 77f4a000 00024000
  605. TCPA TCGLOG12. 77f3a000 00010000
  606. SMBIOS 13. 77f39000 00000800
  607. IMD small region:
  608. IMD ROOT 0. 77ffec00 00000400
  609. MEM INFO 1. 77ffea40 000001b9
  610. ROMSTAGE 2. 77ffea20 00000004
  611. COREBOOTFWD 3. 77ffe9e0 00000028
  612. BS: BS_WRITE_TABLES times (us): entry 0 run 6716 exit 0
  613. CBFS: 'Master Header Locator' located CBFS at [600200:800000)
  614. CBFS: Locating 'fallback/payload'
  615. CBFS: Found @ offset 3ec40 size bbcf1
  616. Checking segment from ROM address 0xffe3ee78
  617. Checking segment from ROM address 0xffe3ee94
  618. Loading segment from ROM address 0xffe3ee78
  619. code (compression=1)
  620. New segment dstaddr 0x00800000 memsize 0x410000 srcaddr 0xffe3eeb0 filesize 0xbbcb9
  621. Loading Segment: addr: 0x00800000 memsz: 0x0000000000410000 filesz: 0x00000000000bbcb9
  622. using LZMA
  623. Loading segment from ROM address 0xffe3ee94
  624. Entry Point 0x008008f0
  625. BS: BS_PAYLOAD_LOAD times (us): entry 0 run 329602 exit 0
  626. ICH-NM10-PCH: watchdog disabled
  627. Jumping to boot code at 008008f0(77f6e000)
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