Pastebin
API
tools
faq
paste
Login
Sign up
SHARE
TWEET
Untitled
AlexanderAntonov
Nov 2nd, 2022
1,012
0
Never
Add comment
Not a member of Pastebin yet?
Sign Up
, it unlocks many cool features!
SystemVerilog
0.14 KB
| None
|
0
0
raw
download
clone
embed
print
report
module
mux_structural
(
input
[
1
:
0
]
sel_bi
,
input
[
3
:
0
]
data_bi
,
output
q_o
)
;
assign
q_o
=
data_bi
[
sel_bi
]
;
endmodule
Advertisement
Add Comment
Please,
Sign In
to add comment
Public Pastes
This month smells like money
CSS | 30 min ago | 1.04 KB
✅ API Flaw Money Method
CSS | 31 min ago | 1.04 KB
⭐ Exploit Documentation ⭐
CSS | 32 min ago | 1.04 KB
z66is_archive.zip.txt
9 hours ago | 1,016.35 KB
the number
9 hours ago | 0.01 KB
Untitled
19 hours ago | 0.59 KB
Untitled
19 hours ago | 0.45 KB
Untitled
19 hours ago | 0.37 KB
We use cookies for various purposes including analytics. By continuing to use Pastebin, you agree to our use of cookies as described in the
Cookies Policy
.
OK, I Understand
Not a member of Pastebin yet?
Sign Up
, it unlocks many cool features!