//5
module reg_8_bits (
	input clk,
	input [7:0] in,
	output [7:0] out);

	D_latch ex1(in[0], clk, out[0]);
	D_latch ex2(in[1], clk, out[1]);
	D_latch ex3(in[2], clk, out[2]);
	D_latch ex4(in[3], clk, out[3]);
	D_latch ex5(in[4], clk, out[4]);
	D_latch ex6(in[5], clk, out[5]);
	D_latch ex7(in[6], clk, out[6]);
	D_latch ex8(in[7], clk, out[7]);

endmodule

//5 adder_A_B_8_bits
module ps4 (
	input [7:0] SW,
	input [1:0] KEY,
	output [9:0] LEDR,
	output [0:6] HEX0, HEX1, HEX2, HEX3, HEX4, HEX5);

	assign LEDR[7:0] = SW[7:0];

	wire [0:7]A, B;

	reg_8_bits saveA(KEY[1] ^ KEY[0], SW[7:0], A[0:7]);

	assign B[0:7] = SW[7:0];

	showDigitHex showA1(A[0:3], HEX3);
	showDigitHex showA2(A[4:7], HEX2);
	showDigitHex showB1(B[0:3], HEX1);
	showDigitHex showB2(B[4:7], HEX0);

	reg [0:8]S;
	reg cout;

	assign LEDR[9] = cout;


	always@*
		begin
			S = A + B;

			if(S > 8'hFF)
				begin
					S = S - 8'hFF;
					cout = 1;
				end
			else
					cout = 0;

		end

endmodule