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TheGhastModding

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TheGhastModding
Apr 1st, 2022
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  1. ; FLAG is bit 6 in Program Status Upper
  2. name EmissionsController
  3.  
  4. PSL_CC1 equ 10000000b
  5. PSL_CC0 equ 01000000b
  6. PSL_IDC equ 00100000b
  7. PSL_BANK equ 00010000b
  8. PSL_WITH_CARRY equ 00001000b
  9. PSL_OVERFLOW equ 00000100b
  10. PSL_LOGICAL_COMP equ 00000010b
  11. PSL_CARRY_FLAG equ 00000001b
  12.  
  13. mem_start equ 4096
  14.  
  15. M32_A1 equ mem_start+1
  16. M32_A2 equ mem_start+2
  17. M32_A3 equ mem_start+3
  18. M32_A4 equ mem_start+4
  19. M32_B1 equ mem_start+5
  20. M32_B2 equ mem_start+6
  21. M32_B3 equ mem_start+7
  22. M32_B4 equ mem_start+8
  23. M32_R1 equ mem_start+9
  24. M32_R2 equ mem_start+10
  25. M32_R3 equ mem_start+11
  26. M32_R4 equ mem_start+12
  27. M32_SIGN equ mem_start+13
  28. M32_UNSIGNED equ mem_start+14
  29. PSL_BACK1 equ mem_start+17
  30. PSU_BACK1 equ mem_start+18
  31. PSL_BACK2 equ mem_start+19
  32. PSU_BACK2 equ mem_start+20
  33. M32_RB1 equ mem_start+21
  34. M32_RB2 equ mem_start+22
  35. M32_RB3 equ mem_start+23
  36. M32_RB4 equ mem_start+24
  37. M32_RB5 equ mem_start+25
  38. M32_CTR equ mem_start+26
  39. M32_CTR2 equ mem_start+27
  40. R0_BACK equ mem_start+28
  41. R1_BACK equ mem_start+29
  42. R2_BACK equ mem_start+30
  43. R3_BACK equ mem_start+31
  44. SEED_1 equ mem_start+32
  45. SEED_2 equ mem_start+33
  46. SEED_3 equ mem_start+34
  47. SEED_4 equ mem_start+35
  48.  
  49. ; Emissions Controller vars & constants
  50. ADVANCE equ 131072
  51. ADVANCE_SLOW equ 65536
  52. A_1 equ mem_start+512
  53. A_2 equ mem_start+513
  54. A_3 equ mem_start+514
  55. B_1 equ mem_start+515
  56. B_2 equ mem_start+516
  57. B_3 equ mem_start+517
  58. DIFF_1 equ mem_start+518
  59. DIFF_2 equ mem_start+519
  60. DIFF_3 equ mem_start+520
  61. DIFF_4 equ mem_start+521
  62. X_1 equ mem_start+522
  63. X_2 equ mem_start+523
  64. X_3 equ mem_start+524
  65. XX_1 equ mem_start+525
  66. XX_2 equ mem_start+526
  67. XX_3 equ mem_start+527
  68. BTN_STATE equ mem_start+528
  69. SLOW_EMISS equ mem_start+529
  70.  
  71. org 0000H
  72. programentry:
  73. lodi,r0 00000000b
  74. lpsl
  75. lodi,r0 00100000b
  76. lpsu
  77. ppsl PSL_WITH_CARRY
  78.  
  79. lodi,r0 67
  80. stra,r0 SEED_1
  81. lodi,r0 207
  82. stra,r0 SEED_2
  83. lodi,r0 3
  84. stra,r0 SEED_3
  85. lodi,r0 69
  86. stra,r0 SEED_4
  87.  
  88. bsta,3 xorshift
  89. bsta,3 xorshift
  90. bsta,3 xorshift
  91. bsta,3 xorshift
  92.  
  93. bsta,3 rng_B
  94. bsta,3 rng_B
  95.  
  96. eorz r0
  97. stra,r0 M32_UNSIGNED
  98. stra,r0 X_1
  99. stra,r0 X_2
  100. stra,r0 X_3
  101. stra,r0 BTN_STATE
  102. stra,r0 SLOW_EMISS
  103.  
  104. emissions_loop:
  105. nop
  106. db 196 ;nopi,r0
  107. db 'e'
  108. db 197 ;nopi,r1
  109. db '6'
  110. db 198 ;nopi,r2
  111. db '2'
  112. db 199 ;nopi,r3
  113. db '1'
  114. db 144 ;nop
  115. db 145 ;also nop
  116.  
  117. tpsu 128
  118. bctr,0 btn_not_pressed
  119. loda,r0 BTN_STATE
  120. bcfr,0 btn_held
  121. iori,r0 69
  122. stra,r0 BTN_STATE
  123. loda,r0 SLOW_EMISS
  124. eori,r0 1
  125. stra,r0 SLOW_EMISS
  126. bctr,3 btn_held
  127. btn_not_pressed:
  128. eorz r0
  129. stra,r0 BTN_STATE
  130. btn_held:
  131.  
  132. bsta,3 calc_weight
  133. loda,r0 DIFF_1
  134. stra,r0 M32_B1
  135. loda,r0 DIFF_2
  136. stra,r0 M32_B2
  137. loda,r0 DIFF_3
  138. stra,r0 M32_B3
  139. loda,r0 DIFF_4
  140. stra,r0 M32_B4
  141. bsta,3 fixed_mul
  142. cpsl PSL_CARRY_FLAG
  143. loda,r0 M32_R1
  144. adda,r0 A_1
  145. loda,r1 M32_R2
  146. adda,r1 A_2
  147. loda,r2 M32_R3
  148. adda,r2 A_3
  149. bsta,3 print_formatted_value
  150. lodz r1
  151. bsta,3 print_formatted_value
  152. lodz r2
  153. bsta,3 print_formatted_value
  154. lodi,r0 '#'
  155. wrtd,r0
  156.  
  157. loda,r0 SLOW_EMISS
  158. bctr,0 inc_x_fast
  159. inc_x_slow:
  160. lodi,r1 ADVANCE_SLOW MOD 256
  161. lodi,r2 (ADVANCE_SLOW >> 8) MOD 256
  162. lodi,r3 (ADVANCE_SLOW >> 16) MOD 256
  163. bctr,3 inc_x
  164. inc_x_fast:
  165. lodi,r1 ADVANCE MOD 256
  166. lodi,r2 (ADVANCE >> 8) MOD 256
  167. lodi,r3 (ADVANCE >> 16) MOD 256
  168. inc_x:
  169. cpsl PSL_CARRY_FLAG
  170. loda,r0 X_1
  171. addz r1
  172. stra,r0 X_1
  173. loda,r0 X_2
  174. addz r2
  175. stra,r0 X_2
  176. loda,r0 X_3
  177. addz r3
  178. stra,r0 X_3
  179. eorz r0
  180. addi,r0 0
  181. bcta,0 emissions_loop
  182. bsta,3 rng_B
  183. eorz r0
  184. stra,r0 M32_B1
  185. stra,r0 M32_B2
  186. stra,r0 M32_B3
  187. db 182
  188. db 01000000b
  189. cpsu 01000000b
  190. bcta,0 emissions_loop
  191. ppsu 01000000b
  192. bcta,3 emissions_loop
  193.  
  194. print_formatted_value:
  195. cpsl PSL_WITH_CARRY
  196. strz r3
  197. andi,r0 15
  198. addi,r0 ' '
  199. wrtd,r0
  200. lodz r3
  201. rrr,r0
  202. rrr,r0
  203. rrr,r0
  204. rrr,r0
  205. andi,r0 15
  206. addi,r0 ' '
  207. wrtd,r0
  208. ppsl PSL_WITH_CARRY
  209. retc,3
  210.  
  211. calc_weight:
  212. loda,r0 X_1
  213. stra,r0 M32_A1
  214. stra,r0 M32_B1
  215. loda,r0 X_2
  216. stra,r0 M32_A2
  217. stra,r0 M32_B2
  218. loda,r0 X_3
  219. stra,r0 M32_A3
  220. stra,r0 M32_B3
  221. eorz r0
  222. stra,r0 M32_A4
  223. stra,r0 M32_B4
  224. bsta,3 fixed_mul
  225. loda,r0 M32_R1
  226. stra,r0 M32_A1
  227. loda,r0 M32_R2
  228. stra,r0 M32_A2
  229. loda,r0 M32_R3
  230. stra,r0 M32_A3
  231. loda,r0 M32_R4
  232. stra,r0 M32_A4
  233. bsta,3 fixed_mul
  234. cpsl PSL_CARRY_FLAG
  235. loda,r0 M32_A1
  236. addz r0
  237. strz r1
  238. loda,r0 M32_A2
  239. addz r0
  240. strz r2
  241. loda,r0 M32_A3
  242. addz r0
  243. strz r3
  244. loda,r0 M32_A4
  245. addz r0
  246. stra,r0 M32_B4
  247. cpsl PSL_CARRY_FLAG
  248. adda,r1 M32_A1
  249. stra,r1 M32_A1
  250. adda,r2 M32_A2
  251. stra,r2 M32_A2
  252. adda,r3 M32_A3
  253. stra,r3 M32_A3
  254. loda,r0 M32_B4
  255. adda,r0 M32_A4
  256. stra,r0 M32_A4
  257.  
  258. cpsl PSL_CARRY_FLAG
  259. loda,r0 M32_R1
  260. addz r0
  261. strz r1
  262. loda,r0 M32_R2
  263. addz r0
  264. strz r2
  265. loda,r0 M32_R3
  266. addz r0
  267. strz r3
  268. loda,r0 M32_R4
  269. addz r0
  270. stra,r0 M32_B1
  271.  
  272. ppsl PSL_CARRY_FLAG
  273. loda,r0 M32_A1
  274. subz r1
  275. stra,r0 M32_A1
  276. loda,r0 M32_A2
  277. subz r2
  278. stra,r0 M32_A2
  279. loda,r0 M32_A3
  280. subz r3
  281. stra,r0 M32_A3
  282. loda,r0 M32_A4
  283. suba,r0 M32_B1
  284. stra,r0 M32_A4
  285. retc,3
  286.  
  287. rng_B:
  288. loda,r0 B_1
  289. stra,r0 A_1
  290. loda,r0 B_2
  291. stra,r0 A_2
  292. loda,r0 B_3
  293. stra,r0 A_3
  294.  
  295. bsta,3 xorshift
  296. loda,r0 SEED_2
  297. stra,r0 B_1
  298. loda,r1 SEED_3
  299. stra,r1 B_2
  300. loda,r2 SEED_4
  301. stra,r2 B_3
  302. lodi,r3 0
  303.  
  304. ppsl PSL_CARRY_FLAG
  305. suba,r0 A_1
  306. stra,r0 DIFF_1
  307. suba,r1 A_2
  308. stra,r1 DIFF_2
  309. suba,r2 A_3
  310. stra,r2 DIFF_3
  311. subi,r3 0
  312. stra,r3 DIFF_4
  313.  
  314. retc,3
  315.  
  316. fixed_mul:
  317. stra,r0 R0_BACK
  318. stra,r1 R1_BACK
  319. stra,r2 R2_BACK
  320. spsl
  321. stra,r0 PSL_BACK1
  322. cpsl PSL_BANK
  323. ppsl PSL_WITH_CARRY + PSL_LOGICAL_COMP
  324. eorz r0
  325. stra,r0 M32_SIGN
  326.  
  327. loda,r1 M32_UNSIGNED
  328. comi,r1 0
  329. bcfa,0 fixed_mul_unsigned
  330.  
  331. loda,r1 M32_A4
  332. andi,r1 128
  333. bctr,0 fixed_mul_not_neg_a
  334. cpsl PSL_CARRY_FLAG
  335. lodi,r1 255
  336. lodi,r2 0
  337. loda,r0 M32_A1
  338. eorz r1
  339. addi,r0 1
  340. stra,r0 M32_A1
  341. loda,r0 M32_A2
  342. eorz r1
  343. addz r2
  344. stra,r0 M32_A2
  345. loda,r0 M32_A3
  346. eorz r1
  347. addz r2
  348. stra,r0 M32_A3
  349. loda,r0 M32_A4
  350. eorz r1
  351. addz r2
  352. stra,r0 M32_A4
  353. lodi,r2 1
  354. stra,r2 M32_SIGN
  355. fixed_mul_not_neg_a:
  356. loda,r1 M32_B4
  357. andi,r1 128
  358. bctr,0 fixed_mul_not_neg_b
  359. cpsl PSL_CARRY_FLAG
  360. lodi,r1 255
  361. lodi,r2 0
  362. loda,r0 M32_B1
  363. eorz r1
  364. addi,r0 1
  365. stra,r0 M32_B1
  366. loda,r0 M32_B2
  367. eorz r1
  368. addz r2
  369. stra,r0 M32_B2
  370. loda,r0 M32_B3
  371. eorz r1
  372. addz r2
  373. stra,r0 M32_B3
  374. loda,r0 M32_B4
  375. eorz r1
  376. addz r2
  377. stra,r0 M32_B4
  378. loda,r2 M32_SIGN
  379. eori,r2 1
  380. stra,r2 M32_SIGN
  381. fixed_mul_not_neg_b:
  382. fixed_mul_unsigned:
  383.  
  384. eorz r0
  385. strz r1
  386. stra,r0 M32_RB1
  387. stra,r0 M32_RB2
  388. stra,r0 M32_RB3
  389. stra,r0 M32_RB4
  390. stra,r0 M32_RB5
  391. ppsl PSL_BANK
  392. loda,r0 M32_B1
  393. strz r1
  394. loda,r0 M32_B2
  395. strz r2
  396. loda,r0 M32_B3
  397. strz r3
  398. cpsl PSL_BANK
  399. loda,r0 M32_B4
  400. strz r1
  401. eorz r0
  402. strz r3
  403. stra,r0 M32_CTR2
  404. strz r2
  405. fixed_mul_loop:
  406. loda,r0 M32_A1,r2
  407. strz r2
  408. bsta,3 mul32_segment
  409. loda,r2 M32_CTR2
  410. comi,r2 3
  411. bctr,0 fixed_mul_loop_end
  412. stra,r1 M32_CTR
  413. ppsl PSL_BANK
  414. lodz r2
  415. strz r1
  416. lodz r3
  417. strz r2
  418. loda,r3 M32_CTR
  419. cpsl PSL_BANK
  420. lodz r3
  421. strz r1
  422. eorz r0
  423. strz r3
  424. loda,r0 M32_RB2
  425. stra,r0 M32_RB1
  426. loda,r0 M32_RB3
  427. stra,r0 M32_RB2
  428. loda,r0 M32_RB4
  429. stra,r0 M32_RB3
  430. loda,r0 M32_RB5
  431. stra,r0 M32_RB4
  432. eorz r0
  433. stra,r0 M32_RB5
  434. addi,r2 1
  435. stra,r2 M32_CTR2
  436. bcta,3 fixed_mul_loop
  437. fixed_mul_loop_end:
  438. loda,r0 M32_SIGN
  439. comi,r0 0
  440. bcfr,0 fixed_mul_negate_res
  441. loda,r0 M32_RB1
  442. stra,r0 M32_R1
  443. loda,r0 M32_RB2
  444. stra,r0 M32_R2
  445. loda,r0 M32_RB3
  446. stra,r0 M32_R3
  447. loda,r0 M32_RB4
  448. stra,r0 M32_R4
  449. bctr,3 fixed_mul_no_negate_res
  450. fixed_mul_negate_res:
  451. lodi,r2 255
  452. lodi,r3 0
  453. loda,r0 M32_RB1
  454. eorz r2
  455. addi,r0 1
  456. stra,r0 M32_R1
  457. loda,r0 M32_RB2
  458. eorz r2
  459. addz r3
  460. stra,r0 M32_R2
  461. loda,r0 M32_RB3
  462. eorz r2
  463. addz r3
  464. stra,r0 M32_R3
  465. loda,r0 M32_RB4
  466. eorz r2
  467. addz r3
  468. stra,r0 M32_R4
  469. fixed_mul_no_negate_res:
  470. loda,r0 PSL_BACK1
  471. lpsl
  472. loda,r0 R0_BACK
  473. loda,r1 R1_BACK
  474. loda,r2 R2_BACK
  475. retc,3
  476.  
  477. ; Segment arg A in r2
  478. ; Segment arg B in memory at 1.r1 - 1.r2 - 1.r3 - 0.r1 - 0.r3
  479. ; Shifted result buffer in memory at M32_RB1 - M32_RB5
  480. mul32_segment:
  481. lodi,r0 8
  482. stra,r0 M32_CTR
  483. mul32_segment_loop:
  484. stra,r0 M32_CTR
  485. rrr,r2
  486. db 183
  487. db PSL_CARRY_FLAG
  488. bcfr,0 mul32_segment_no_carry
  489. cpsl PSL_CARRY_FLAG
  490. ppsl PSL_BANK
  491. loda,r0 M32_RB1
  492. addz r1
  493. stra,r0 M32_RB1
  494. loda,r0 M32_RB2
  495. addz r2
  496. stra,r0 M32_RB2
  497. loda,r0 M32_RB3
  498. addz r3
  499. stra,r0 M32_RB3
  500. cpsl PSL_BANK
  501. loda,r0 M32_RB4
  502. addz r1
  503. stra,r0 M32_RB4
  504. loda,r0 M32_RB5
  505. addz r3
  506. stra,r0 M32_RB5
  507. mul32_segment_no_carry:
  508. cpsl PSL_CARRY_FLAG
  509. ppsl PSL_BANK
  510. rrl,r1
  511. rrl,r2
  512. rrl,r3
  513. cpsl PSL_BANK
  514. rrl,r1
  515. rrl,r3
  516. loda,r0 M32_CTR
  517. bdra,r0 mul32_segment_loop
  518. retc,3
  519.  
  520. xorshift:
  521. spsl
  522. stra,r0 PSL_BACK1
  523. ppsl PSL_WITH_CARRY
  524. cpsl PSL_BANK
  525. lodi,r0 5
  526. loda,r1 SEED_1
  527. loda,r2 SEED_2
  528. loda,r3 SEED_3
  529. xorshift_loop_1:
  530. cpsl PSL_CARRY_FLAG
  531. rrl,r1
  532. rrl,r2
  533. rrl,r3
  534. bdrr,r0 xorshift_loop_1
  535.  
  536. eora,r0 SEED_1
  537. eora,r1 SEED_2
  538. eora,r2 SEED_3
  539. eora,r3 SEED_4
  540. lodz r3
  541. strz r1
  542. lodz r2
  543. lodi,r2 0
  544. lodi,r3 0
  545. cpsl PSL_CARRY_FLAG
  546. rrr,r1
  547. rrr,r0
  548. eora,r0 SEED_1
  549. eora,r1 SEED_2
  550. eora,r2 SEED_3
  551. eora,r3 SEED_4
  552.  
  553. ppsl PSL_BANK
  554. lodi,r1 5
  555. xorshift_loop_2:
  556. cpsl PSL_CARRY_FLAG + PSL_BANK
  557. rrl,r0
  558. rrl,r1
  559. rrl,r2
  560. rrl,r3
  561. ppsl PSL_BANK
  562. bdrr,r1 xorshift_loop_2
  563. cpsl PSL_BANK
  564.  
  565. eora,r0 SEED_1
  566. eora,r1 SEED_2
  567. eora,r2 SEED_3
  568. eora,r3 SEED_4
  569. stra,r0 SEED_1
  570. stra,r1 SEED_2
  571. stra,r2 SEED_3
  572. stra,r3 SEED_4
  573. loda,r0 PSL_BACK1
  574. lpsl
  575. retc,3
  576.  
  577. end
  578.  
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