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Ayush1325

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Ayush1325
Jul 23rd, 2025
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  1. U-Boot SPL 2025.07-g6d5b4abc28f0 (Jul 24 2025 - 09:13:23 +0530)
  2. SYSFW ABI: 4.0 (firmware rev 0x000b '11.1.2--v11.01.02 (Fancy Rat)')
  3. Changed A53 CPU frequency to 1000000000Hz (S grade) in DT
  4. SPL initial stack usage: 13392 bytes
  5. Trying to boot from MMC2
  6. Authentication passed
  7. Authentication passed
  8. Authentication passed
  9. Authentication passed
  10. Authentication passed
  11. Starting ATF on ARM64 core...
  12.  
  13. VERBOSE: Region: 0x80000000 - 0x80020000 has attributes 0xa
  14. VERBOSE: Region: 0x80000000 - 0x8000c000 has attributes 0x2
  15. VERBOSE: Region: 0x8000c000 - 0x8000f000 has attributes 0x42
  16. mmap:
  17. VA:0xa00000 PA:0xa00000 size:0x200000 attr:0x8 granularity:0x40000000
  18. VA:0x1800000 PA:0x1800000 size:0x200000 attr:0x8 granularity:0x40000000
  19. VA:0x2800000 PA:0x2800000 size:0x200000 attr:0x8 granularity:0x40000000
  20. VA:0x4a400000 PA:0x4a400000 size:0x200000 attr:0x8 granularity:0x40000000
  21. VA:0x4a600000 PA:0x4a600000 size:0x200000 attr:0x8 granularity:0x40000000
  22. VA:0x4d000000 PA:0x4d000000 size:0x200000 attr:0x8 granularity:0x40000000
  23. VA:0x80000000 PA:0x80000000 size:0xc000 attr:0x2 granularity:0x40000000
  24. VA:0x8000c000 PA:0x8000c000 size:0x3000 attr:0x42 granularity:0x40000000
  25. VA:0x80000000 PA:0x80000000 size:0x20000 attr:0xa granularity:0x40000000
  26.  
  27. VERBOSE: Translation tables state:
  28. VERBOSE: Xlat regime: EL3
  29. VERBOSE: Max allowed PA: 0xffffffff
  30. VERBOSE: Max allowed VA: 0xffffffff
  31. VERBOSE: Max mapped PA: 0x8001ffff
  32. VERBOSE: Max mapped VA: 0x8001ffff
  33. VERBOSE: Initial lookup level: 1
  34. VERBOSE: Entries @initial lookup level: 4
  35. VERBOSE: Used 4 sub-tables out of 4 (spare: 0)
  36. [LV1] VA:0x0 size:0x40000000
  37. [LV2] VA:0x0 size:0x200000
  38. [LV2] (4 invalid descriptors omitted)
  39. [LV2] VA:0xa00000 PA:0xa00000 size:0x200000 DEV-RW-XN-S
  40. [LV2] VA:0xc00000 size:0x200000
  41. [LV2] (5 invalid descriptors omitted)
  42. [LV2] VA:0x1800000 PA:0x1800000 size:0x200000 DEV-RW-XN-S
  43. [LV2] VA:0x1a00000 size:0x200000
  44. [LV2] (6 invalid descriptors omitted)
  45. [LV2] VA:0x2800000 PA:0x2800000 size:0x200000 DEV-RW-XN-S
  46. [LV2] VA:0x2a00000 size:0x200000
  47. [LV2] (490 invalid descriptors omitted)
  48. [LV1] VA:0x40000000 size:0x40000000
  49. [LV2] VA:0x40000000 size:0x200000
  50. [LV2] (81 invalid descriptors omitted)
  51. [LV2] VA:0x4a400000 PA:0x4a400000 size:0x200000 DEV-RW-XN-S
  52. [LV2] VA:0x4a600000 PA:0x4a600000 size:0x200000 DEV-RW-XN-S
  53. [LV2] VA:0x4a800000 size:0x200000
  54. [LV2] (19 invalid descriptors omitted)
  55. [LV2] VA:0x4d000000 PA:0x4d000000 size:0x200000 DEV-RW-XN-S
  56. [LV2] VA:0x4d200000 size:0x200000
  57. [LV2] (406 invalid descriptors omitted)
  58. [LV1] VA:0x80000000 size:0x40000000
  59. [LV2] VA:0x80000000 size:0x200000
  60. [LV3] VA:0x80000000 PA:0x80000000 size:0x1000 MEM-RO-EXEC-S
  61. [LV3] VA:0x80001000 PA:0x80001000 size:0x1000 MEM-RO-EXEC-S
  62. [LV3] VA:0x80002000 PA:0x80002000 size:0x1000 MEM-RO-EXEC-S
  63. [LV3] VA:0x80003000 PA:0x80003000 size:0x1000 MEM-RO-EXEC-S
  64. [LV3] VA:0x80004000 PA:0x80004000 size:0x1000 MEM-RO-EXEC-S
  65. [LV3] VA:0x80005000 PA:0x80005000 size:0x1000 MEM-RO-EXEC-S
  66. [LV3] VA:0x80006000 PA:0x80006000 size:0x1000 MEM-RO-EXEC-S
  67. [LV3] VA:0x80007000 PA:0x80007000 size:0x1000 MEM-RO-EXEC-S
  68. [LV3] VA:0x80008000 PA:0x80008000 size:0x1000 MEM-RO-EXEC-S
  69. [LV3] VA:0x80009000 PA:0x80009000 size:0x1000 MEM-RO-EXEC-S
  70. [LV3] VA:0x8000a000 PA:0x8000a000 size:0x1000 MEM-RO-EXEC-S
  71. [LV3] VA:0x8000b000 PA:0x8000b000 size:0x1000 MEM-RO-EXEC-S
  72. [LV3] VA:0x8000c000 PA:0x8000c000 size:0x1000 MEM-RO-XN-S
  73. [LV3] VA:0x8000d000 PA:0x8000d000 size:0x1000 MEM-RO-XN-S
  74. [LV3] VA:0x8000e000 PA:0x8000e000 size:0x1000 MEM-RO-XN-S
  75. [LV3] VA:0x8000f000 PA:0x8000f000 size:0x1000 MEM-RW-XN-S
  76. [LV3] VA:0x80010000 PA:0x80010000 size:0x1000 MEM-RW-XN-S
  77. [LV3] VA:0x80011000 PA:0x80011000 size:0x1000 MEM-RW-XN-S
  78. [LV3] VA:0x80012000 PA:0x80012000 size:0x1000 MEM-RW-XN-S
  79. [LV3] VA:0x80013000 PA:0x80013000 size:0x1000 MEM-RW-XN-S
  80. [LV3] VA:0x80014000 PA:0x80014000 size:0x1000 MEM-RW-XN-S
  81. [LV3] VA:0x80015000 PA:0x80015000 size:0x1000 MEM-RW-XN-S
  82. [LV3] VA:0x80016000 PA:0x80016000 size:0x1000 MEM-RW-XN-S
  83. [LV3] VA:0x80017000 PA:0x80017000 size:0x1000 MEM-RW-XN-S
  84. [LV3] VA:0x80018000 PA:0x80018000 size:0x1000 MEM-RW-XN-S
  85. [LV3] VA:0x80019000 PA:0x80019000 size:0x1000 MEM-RW-XN-S
  86. [LV3] VA:0x8001a000 PA:0x8001a000 size:0x1000 MEM-RW-XN-S
  87. [LV3] VA:0x8001b000 PA:0x8001b000 size:0x1000 MEM-RW-XN-S
  88. [LV3] VA:0x8001c000 PA:0x8001c000 size:0x1000 MEM-RW-XN-S
  89. [LV3] VA:0x8001d000 PA:0x8001d000 size:0x1000 MEM-RW-XN-S
  90. [LV3] VA:0x8001e000 PA:0x8001e000 size:0x1000 MEM-RW-XN-S
  91. [LV3] VA:0x8001f000 PA:0x8001f000 size:0x1000 MEM-RW-XN-S
  92. [LV3] VA:0x80020000 size:0x1000
  93. [LV3] (479 invalid descriptors omitted)
  94. [LV2] VA:0x80200000 size:0x200000
  95. [LV2] (510 invalid descriptors omitted)
  96. [LV1] VA:0xc0000000 size:0x40000000
  97. NOTICE: BL31: v2.12.4(debug):lts-v2.12.4
  98. NOTICE: BL31: Built : 09:13:07, Jul 24 2025
  99. INFO: GICv3 without legacy support detected.
  100. INFO: ARM GICv3 driver initialized in EL3
  101. INFO: Maximum SPI INTID supported: 287
  102. VERBOSE: Message successfully sent on thread SP_HIGH_PRIORITY
  103. VERBOSE: Message successfully received from thread SP_RESPONSE
  104. INFO: SYSFW ABI: 4.0 (firmware rev 0x000b '11.1.2--v11.01.02 (Fancy Rat)')
  105. VERBOSE: Message successfully sent on thread SP_HIGH_PRIORITY
  106. VERBOSE: Message successfully received from thread SP_RESPONSE
  107. INFO: BL31: Initializing runtime services
  108. VERBOSE: BL31: cortex_a53: CPU workaround for erratum 819472 was not applicable
  109. VERBOSE: BL31: cortex_a53: CPU workaround for erratum 824069 was not applicable
  110. VERBOSE: BL31: cortex_a53: CPU workaround for erratum 826319 was not applicable
  111. VERBOSE: BL31: cortex_a53: CPU workaround for erratum 827319 was not applicable
  112. VERBOSE: BL31: cortex_a53: CPU workaround for erratum 835769 was not applicable
  113. VERBOSE: BL31: cortex_a53: CPU workaround for erratum 836870 was not applicable
  114. VERBOSE: BL31: cortex_a53: CPU workaround for erratum 843419 was not applicable
  115. INFO: BL31: cortex_a53: CPU workaround for erratum 855873 was applied
  116. INFO: BL31: cortex_a53: CPU workaround for erratum 1530924 was applied
  117. VERBOSE: Message successfully sent on thread SP_HIGH_PRIORITY
  118. VERBOSE: Message successfully received from thread SP_RESPONSE
  119. INFO: BL31: Initializing BL32
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