mux
|00011011 Channel 0|00000001 Channel 1|00000010 Channel 2|00000011 Channel 3|00000100 Channel 4|00000101 Channel 5|00000110 Channel 6|00000111 Channel 7|00001000 Channel 8|00001001 Channel 9|00001010 Channel 10|00001011 Channel 11|00001100 Channel 12|00001101 Channel 13|00001110 Channel 14|00001111 Channel 15|01011111 Channel 16|00000000 Channel 17|00000000 Channel 18|00000000 Channel 19|00000000 Channel 20|00000000 Channel 21|00000000 Channel 22|00000000 Channel 23|00000000 Channel 24|00000000 Channel 25|00000000 Channel 26|00000000 Channel 27|00000000 Channel 28|00000000 Channel 29|00000000 Channel 30|00000000 Channel 31|
Input: 	  PASS  : mux
input 16:16
Value assigned
Input: 	  PASS  : input 16:16
input 17:17
Value assigned
Input: 	  PASS  : input 17:17
input 18:18
Value assigned
Input: 	  PASS  : input 18:18
mux
|01000000 Channel 0|00000001 Channel 1|00000010 Channel 2|00000011 Channel 3|00000100 Channel 4|00000101 Channel 5|00000110 Channel 6|00000111 Channel 7|00001000 Channel 8|00001001 Channel 9|00001010 Channel 10|00001011 Channel 11|00001100 Channel 12|00001101 Channel 13|00001110 Channel 14|00001111 Channel 15|01011111 Channel 16|00010001 Channel 17|00010010 Channel 18|00000000 Channel 19|00000000 Channel 20|00000000 Channel 21|00000000 Channel 22|00000000 Channel 23|00000000 Channel 24|00000000 Channel 25|00000000 Channel 26|00000000 Channel 27|00000000 Channel 28|00000000 Channel 29|00000000 Channel 30|00000000 Channel 31|
Input: 	  FAIL  : mux (expected "|01000000 Channel 0|00000001 Channel 1|00000010 Channel 2|00000011 Channel 3|00000100 Channel 4|00000101 Channel 5|00000110 Channel 6|00000111 Channel 7|00001000 Channel 8|00001001 Channel 9|00001010 Channel 10|00001011 Channel 11|00001100 Channel 12|00001101 Channel 13|00001110 Channel 14|00001111 Channel 15|01011111 Channel 16|00010000 Channel 17|00010001 Channel 18|00010010 Channel 19|00000000 Channel 20|00000000 Channel 21|00000000 Channel 22|00000000 Channel 23|00000000 Channel 24|00000000 Channel 25|00000000 Channel 26|00000000 Channel 27|00000000 Channel 28|00000000 Channel 29|00000000 Channel 30|00000000 Channel 31|")
input 19:19
Value assigned
Input: 	  PASS  : input 19:19
input 20:20
Value assigned
Input: 	  PASS  : input 20:20
input 21:21
Value assigned
Input: 	  PASS  : input 21:21
mux
|00011011 Channel 0|00000001 Channel 1|00000010 Channel 2|00000011 Channel 3|00000100 Channel 4|00000101 Channel 5|00000110 Channel 6|00000111 Channel 7|00001000 Channel 8|00001001 Channel 9|00001010 Channel 10|00001011 Channel 11|00001100 Channel 12|00001101 Channel 13|00001110 Channel 14|00001111 Channel 15|01011111 Channel 16|00010001 Channel 17|00010010 Channel 18|00010011 Channel 19|00010100 Channel 20|00010101 Channel 21|00000000 Channel 22|00000000 Channel 23|00000000 Channel 24|00000000 Channel 25|00000000 Channel 26|00000000 Channel 27|00000000 Channel 28|00000000 Channel 29|00000000 Channel 30|00000000 Channel 31|
Input: 	  FAIL  : mux (expected "|00011011 Channel 0|00000001 Channel 1|00000010 Channel 2|00000011 Channel 3|00000100 Channel 4|00000101 Channel 5|00000110 Channel 6|00000111 Channel 7|00001000 Channel 8|00001001 Channel 9|00001010 Channel 10|00001011 Channel 11|00001100 Channel 12|00001101 Channel 13|00001110 Channel 14|00001111 Channel 15|01011111 Channel 16|00010000 Channel 17|00010001 Channel 18|00010010 Channel 19|00010011 Channel 20|00010100 Channel 21|00010101 Channel 22|00000000 Channel 23|00000000 Channel 24|00000000 Channel 25|00000000 Channel 26|00000000 Channel 27|00000000 Channel 28|00000000 Channel 29|00000000 Channel 30|00000000 Channel 31|")
input 22:22
Value assigned
Input: 	  PASS  : input 22:22
input 23:23
Value assigned
Input: 	  PASS  : input 23:23
input 24:24
Value assigned
Input: 	  PASS  : input 24:24