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  1. commit 0c73306ff92ddef316f5daea3bb961e13e07b607
  2. Author: Arnd Bergmann <arnd@arndb.de>
  3. Date:   Mon Sep 2 15:52:13 2019 +0200
  4.  
  5.     ARM: exynos: use private samsung_cpu_id copy
  6.    
  7.     The only part of plat-samsung that is shared with arch-exynos
  8.     is the CPU identification code.
  9.    
  10.     Having a separate exynos_cpu_id variable makes the two completely
  11.     independent and is actually a bit less code in total.
  12.    
  13.     Signed-off-by: Arnd Bergmann <arnd@arndb.de>
  14.  
  15. diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
  16. index 56411bb63d45..adf7db9c0885 100644
  17. --- a/arch/arm/mach-exynos/common.h
  18. +++ b/arch/arm/mach-exynos/common.h
  19. @@ -24,12 +24,12 @@
  20.  #define EXYNOS5800_SOC_ID  0xE5422000
  21.  #define EXYNOS5_SOC_MASK   0xFFFFF000
  22.  
  23. -extern unsigned long samsung_cpu_id;
  24. +extern unsigned long exynos_cpu_id;
  25.  
  26.  #define IS_SAMSUNG_CPU(name, id, mask)     \
  27.  static inline int is_samsung_##name(void)  \
  28.  {                      \
  29. -   return ((samsung_cpu_id & mask) == (id & mask));    \
  30. +   return ((exynos_cpu_id & mask) == (id & mask)); \
  31.  }
  32.  
  33.  IS_SAMSUNG_CPU(exynos3250, EXYNOS3250_SOC_ID, EXYNOS3_SOC_MASK)
  34. @@ -147,7 +147,7 @@ extern struct cpuidle_exynos_data cpuidle_coupled_exynos_data;
  35.  
  36.  extern void exynos_set_delayed_reset_assertion(bool enable);
  37.  
  38. -extern unsigned int samsung_rev(void);
  39. +extern unsigned int exynos_rev(void);
  40.  extern void exynos_core_restart(u32 core_id);
  41.  extern int exynos_set_boot_addr(u32 core_id, unsigned long boot_addr);
  42.  extern int exynos_get_boot_addr(u32 core_id, unsigned long *boot_addr);
  43. diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
  44. index 9aa483366ebc..da9300d655c6 100644
  45. --- a/arch/arm/mach-exynos/exynos.c
  46. +++ b/arch/arm/mach-exynos/exynos.c
  47. @@ -19,11 +19,10 @@
  48.  #include <asm/mach/arch.h>
  49.  #include <asm/mach/map.h>
  50.  
  51. -#include <mach/map.h>
  52. -#include <plat/cpu.h>
  53. -
  54.  #include "common.h"
  55.  
  56. +#define S5P_VA_CHIPID  ((void __iomem __force *)0xF8000000)
  57. +
  58.  static struct platform_device exynos_cpuidle = {
  59.     .name              = "exynos_cpuidle",
  60.  #ifdef CONFIG_ARM_EXYNOS_CPUIDLE
  61. @@ -36,6 +35,14 @@ void __iomem *sysram_base_addr __ro_after_init;
  62.  phys_addr_t sysram_base_phys __ro_after_init;
  63.  void __iomem *sysram_ns_base_addr __ro_after_init;
  64.  
  65. +unsigned long exynos_cpu_id;
  66. +static unsigned int exynos_cpu_rev;
  67. +
  68. +unsigned int exynos_rev(void)
  69. +{
  70. +   return exynos_cpu_rev;
  71. +}
  72. +
  73.  void __init exynos_sysram_init(void)
  74.  {
  75.     struct device_node *node;
  76. @@ -86,7 +93,11 @@ static void __init exynos_init_io(void)
  77.     of_scan_flat_dt(exynos_fdt_map_chipid, NULL);
  78.  
  79.     /* detect cpu id and rev. */
  80. -   s5p_init_cpu(S5P_VA_CHIPID);
  81. +   exynos_cpu_id = readl_relaxed(S5P_VA_CHIPID);
  82. +   exynos_cpu_rev = exynos_cpu_id & 0xFF;
  83. +
  84. +   pr_info("Samsung CPU ID: 0x%08lx\n", exynos_cpu_id);
  85. +
  86.  }
  87.  
  88.  /*
  89. diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h
  90. deleted file mode 100644
  91. index 22ebe3654633..000000000000
  92. --- a/arch/arm/mach-exynos/include/mach/map.h
  93. +++ /dev/null
  94. @@ -1,18 +0,0 @@
  95. -/* SPDX-License-Identifier: GPL-2.0 */
  96. -/*
  97. - * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
  98. - *     http://www.samsung.com/
  99. - *
  100. - * EXYNOS - Memory map definitions
  101. - */
  102. -
  103. -#ifndef __ASM_ARCH_MAP_H
  104. -#define __ASM_ARCH_MAP_H __FILE__
  105. -
  106. -#include <plat/map-base.h>
  107. -
  108. -#include <plat/map-s5p.h>
  109. -
  110. -#define EXYNOS_PA_CHIPID       0x10000000
  111. -
  112. -#endif /* __ASM_ARCH_MAP_H */
  113. diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
  114. index 0cbbae8bf1f8..d7fedbb2eefe 100644
  115. --- a/arch/arm/mach-exynos/platsmp.c
  116. +++ b/arch/arm/mach-exynos/platsmp.c
  117. @@ -22,8 +22,6 @@
  118.  #include <asm/smp_scu.h>
  119.  #include <asm/firmware.h>
  120.  
  121. -#include <mach/map.h>
  122. -
  123.  #include "common.h"
  124.  
  125.  extern void exynos4_secondary_startup(void);
  126. @@ -188,7 +186,7 @@ void exynos_scu_enable(void)
  127.  
  128.  static void __iomem *cpu_boot_reg_base(void)
  129.  {
  130. -   if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_1_1)
  131. +   if (soc_is_exynos4210() && exynos_rev() == EXYNOS4210_REV_1_1)
  132.         return pmu_base_addr + S5P_INFORM5;
  133.     return sysram_base_addr;
  134.  }
  135. diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
  136. index 48e7fb38613e..624585641a9c 100644
  137. --- a/arch/arm/mach-exynos/pm.c
  138. +++ b/arch/arm/mach-exynos/pm.c
  139. @@ -26,18 +26,18 @@
  140.  
  141.  static inline void __iomem *exynos_boot_vector_addr(void)
  142.  {
  143. -   if (samsung_rev() == EXYNOS4210_REV_1_1)
  144. +   if (exynos_rev() == EXYNOS4210_REV_1_1)
  145.         return pmu_base_addr + S5P_INFORM7;
  146. -   else if (samsung_rev() == EXYNOS4210_REV_1_0)
  147. +   else if (exynos_rev() == EXYNOS4210_REV_1_0)
  148.         return sysram_base_addr + 0x24;
  149.     return pmu_base_addr + S5P_INFORM0;
  150.  }
  151.  
  152.  static inline void __iomem *exynos_boot_vector_flag(void)
  153.  {
  154. -   if (samsung_rev() == EXYNOS4210_REV_1_1)
  155. +   if (exynos_rev() == EXYNOS4210_REV_1_1)
  156.         return pmu_base_addr + S5P_INFORM6;
  157. -   else if (samsung_rev() == EXYNOS4210_REV_1_0)
  158. +   else if (exynos_rev() == EXYNOS4210_REV_1_0)
  159.         return sysram_base_addr + 0x20;
  160.     return pmu_base_addr + S5P_INFORM1;
  161.  }
  162. diff --git a/arch/arm/plat-samsung/cpu.c b/arch/arm/plat-samsung/cpu.c
  163. index e1ba88ba31d8..8acba21bbf4b 100644
  164. --- a/arch/arm/plat-samsung/cpu.c
  165. +++ b/arch/arm/plat-samsung/cpu.c
  166. @@ -14,13 +14,6 @@
  167.  #include <plat/cpu.h>
  168.  
  169.  unsigned long samsung_cpu_id;
  170. -static unsigned int samsung_cpu_rev;
  171. -
  172. -unsigned int samsung_rev(void)
  173. -{
  174. -   return samsung_cpu_rev;
  175. -}
  176. -EXPORT_SYMBOL(samsung_rev);
  177.  
  178.  void __init s3c64xx_init_cpu(void)
  179.  {
  180. @@ -34,15 +27,5 @@ void __init s3c64xx_init_cpu(void)
  181.         samsung_cpu_id = readl_relaxed(S3C_VA_SYS + 0xA1C);
  182.     }
  183.  
  184. -   samsung_cpu_rev = 0;
  185. -
  186. -   pr_info("Samsung CPU ID: 0x%08lx\n", samsung_cpu_id);
  187. -}
  188. -
  189. -void __init s5p_init_cpu(const void __iomem *cpuid_addr)
  190. -{
  191. -   samsung_cpu_id = readl_relaxed(cpuid_addr);
  192. -   samsung_cpu_rev = samsung_cpu_id & 0xFF;
  193. -
  194.     pr_info("Samsung CPU ID: 0x%08lx\n", samsung_cpu_id);
  195.  }
  196. diff --git a/arch/arm/plat-samsung/include/plat/cpu.h b/arch/arm/plat-samsung/include/plat/cpu.h
  197. index fadcddbea064..02d7f991d5a3 100644
  198. --- a/arch/arm/plat-samsung/include/plat/cpu.h
  199. +++ b/arch/arm/plat-samsung/include/plat/cpu.h
  200. @@ -111,8 +111,6 @@ extern void s3c24xx_init_io(struct map_desc *mach_desc, int size);
  201.  extern void s3c64xx_init_cpu(void);
  202.  extern void s5p_init_cpu(const void __iomem *cpuid_addr);
  203.  
  204. -extern unsigned int samsung_rev(void);
  205. -
  206.  extern void s3c24xx_init_uarts(struct s3c2410_uartcfg *cfg, int no);
  207.  
  208.  extern void s3c24xx_init_clocks(int xtal);
  209. diff --git a/arch/arm/plat-samsung/include/plat/map-s5p.h b/arch/arm/plat-samsung/include/plat/map-s5p.h
  210. index d69a0ca09fb5..3812085f8761 100644
  211. --- a/arch/arm/plat-samsung/include/plat/map-s5p.h
  212. +++ b/arch/arm/plat-samsung/include/plat/map-s5p.h
  213. @@ -9,8 +9,6 @@
  214.  #ifndef __ASM_PLAT_MAP_S5P_H
  215.  #define __ASM_PLAT_MAP_S5P_H __FILE__
  216.  
  217. -#define S5P_VA_CHIPID      S3C_ADDR(0x02000000)
  218. -
  219.  #define VA_VIC(x)      (S3C_VA_IRQ + ((x) * 0x10000))
  220.  #define VA_VIC0            VA_VIC(0)
  221.  #define VA_VIC1            VA_VIC(1)
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