`timescale 1ns/1ps

module lab1_test;

localparam WIDTH = 4;
logic [WIDTH-1:0] data;
logic a, b;
logic [1:0] sel;
logic ref_val, out_val;

initial
begin

    data=0;
    repeat (2**WIDTH)
    begin
        #1 $strobe("module value: %d; ref value: %b; ref: %b",out_val, ref_val, (ref_val==out_val));

        #9 data=data+1;
    end

$stop;
end

assign a = data[0];
assign b = data[1];
assign sel = data [3:2];

lab1 uut_inst(.sel(sel), .a(a), .b(b), .Y(out_val));

always_comb
begin
    ref_val = (sel[1] & ~a & ~b )| (sel[1] & a & b) | (sel[0] & a & ~b) | (~sel[0] & ~a | ~sel[0] & b);
end

endmodule