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KevWal

WSPR_Test

Mar 20th, 2021
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  1. #include <avr/wdt.h> // Watchdog Timer functions
  2.  
  3. #include <SoftwareSerialMC_KW.h>
  4. SoftwareSerial Serial1(7, 6); // RX, TX
  5.  
  6. #include <MemoryUsage.h> // Check memory avaliable for debuging
  7.  
  8. //Constants
  9. #define I2C_START 0x08
  10. #define I2C_START_RPT 0x10
  11. #define I2C_SLA_W_ACK 0x18
  12. #define I2C_SLA_R_ACK 0x40
  13. #define I2C_DATA_ACK 0x28
  14. #define I2C_WRITE 0b11000000
  15. #define I2C_READ 0b11000001
  16.  
  17. // Register definitions
  18. #define SI_CLK_OEB 3
  19. #define SI_OEB_MASK 9
  20. #define SI_CLK0_CONTROL 16
  21. #define SI_CLK1_CONTROL 17
  22. #define SI_CLK2_CONTROL 18
  23. #define SI_SYNTH_PLL_A 26
  24. #define SI_SYNTH_PLL_B 34
  25. #define SI_SYNTH_MS_0 42
  26. #define SI_SYNTH_MS_1 50
  27. #define SI_SYNTH_MS_2 58
  28. #define SI_PLL_RESET 177
  29.  
  30. // R-division ratio definitions
  31. #define SI_R_DIV_1 0b00000000
  32. #define SI_R_DIV_2 0b00010000
  33. #define SI_R_DIV_4 0b00100000
  34. #define SI_R_DIV_8 0b00110000
  35. #define SI_R_DIV_16 0b01000000
  36. #define SI_R_DIV_32 0b01010000
  37. #define SI_R_DIV_64 0b01100000
  38. #define SI_R_DIV_128 0b01110000
  39.  
  40. // Register 3. Output Enable Control definitions
  41. #define SI_CLK0_OEB 0b00000001
  42. #define SI_CLK1_OEB 0b00000010
  43. #define SI_CLK2_OEB 0b00000100
  44.  
  45. #define SI_CLK_SRC_PLL_A 0b00000000
  46. #define SI_CLK_SRC_PLL_B 0b00100000
  47.  
  48. #define SI5_POWER A2
  49.  
  50. #define WSPR_FREQ 1409712500ULL // = 1,525Hz audio on 14,095,600 Mhz
  51. #define WSPR_1_FREQ 1409707500ULL // = 1,475Hz audio on 14,095,600 Mhz
  52. #define WSPR_2_FREQ 1409712500ULL // = 1,525Hz audio on 14,095,600 Mhz
  53.  
  54. uint8_t data;
  55.  
  56. typedef struct {
  57. uint32_t FB_a, FB_b, FB_c, MS_a, MS_b, MS_c;
  58. bool FB_int, MS_int;
  59. } dividerVals_t;
  60.  
  61.  
  62. uint8_t i2cStart()
  63. {
  64. // Enable internal pullup resistors
  65. digitalWrite(SDA, 1);
  66. digitalWrite(SCL, 1);
  67.  
  68. TWCR = (1 << TWINT) | (1 << TWSTA) | (1 << TWEN); // Set TWINT, TWSTA (Start) and TWEN (TwoWireEnable) Bits in the TwoWireControlRegister
  69. while (!(TWCR & (1 << TWINT))) ; // Wait until TWINT is set
  70. return (TWSR & 0xF8);
  71. }
  72.  
  73. void i2cStop()
  74. {
  75. TWCR = (1 << TWINT) | (1 << TWEN) | (1 << TWSTO);
  76. while ((TWCR & (1 << TWSTO))) ;
  77. }
  78.  
  79. uint8_t i2cByteSend(uint8_t data)
  80. {
  81. TWDR = data;
  82. TWCR = (1 << TWINT) | (1 << TWEN);
  83. while (!(TWCR & (1 << TWINT))) ;
  84. return (TWSR & 0xF8);
  85. }
  86.  
  87. uint8_t i2cByteRead()
  88. {
  89. TWCR = (1 << TWINT) | (1 << TWEN);
  90. while (!(TWCR & (1 << TWINT))) ;
  91. return (TWDR);
  92. }
  93.  
  94. uint8_t i2cSendRegister(uint8_t reg, uint8_t data)
  95. {
  96. uint8_t stts;
  97.  
  98. stts = i2cStart();
  99. if (stts != I2C_START) return 1;
  100.  
  101. stts = i2cByteSend(I2C_WRITE);
  102. if (stts != I2C_SLA_W_ACK) return 2;
  103.  
  104. stts = i2cByteSend(reg);
  105. if (stts != I2C_DATA_ACK) return 3;
  106.  
  107. stts = i2cByteSend(data);
  108. if (stts != I2C_DATA_ACK) return 4;
  109.  
  110. i2cStop();
  111. return 0;
  112. }
  113.  
  114. uint8_t i2cReadRegister(uint8_t reg, uint8_t *data)
  115. {
  116. uint8_t stts;
  117.  
  118. stts = i2cStart();
  119. if (stts != I2C_START) return 1;
  120.  
  121. stts = i2cByteSend(I2C_WRITE);
  122. if (stts != I2C_SLA_W_ACK) return 2;
  123.  
  124. stts = i2cByteSend(reg);
  125. if (stts != I2C_DATA_ACK) return 3;
  126.  
  127. stts = i2cStart();
  128. if (stts != I2C_START_RPT) return 4;
  129.  
  130. stts = i2cByteSend(I2C_READ);
  131. if (stts != I2C_SLA_R_ACK) return 5;
  132.  
  133. *data = i2cByteRead();
  134.  
  135. i2cStop();
  136. return 0;
  137. }
  138.  
  139. // Init TWI (I2C)
  140. void i2cInit()
  141. {
  142. TWBR = 0xB8; // TwoWireBitRate register (0xB8 = 184 default) 92 = 40khz I think?
  143. TWSR = 0; // TWI Status Register, Clear status codes and set prescaler to 0 which equals /1
  144. TWDR = 0xFF; // TWI Data Register
  145. //PRR = 0; // Power Reduction Register, 0 = start all modules,
  146. }
  147.  
  148.  
  149. // Reboot
  150. void(* resetFunc) (void) = 0; //declare reset function @ address 0
  151.  
  152.  
  153. uint32_t ceilDivUL(uint32_t a, uint32_t b) {
  154. // Performs ceil(a/b) when a and b are unsigned long ints
  155. return (a - 1) / b + 1;
  156. }
  157.  
  158. //uint32_t lcm(uint32_t a, uint32_t b) {
  159. // return a/gcd(a, b)*b;
  160. //}
  161.  
  162.  
  163. uint32_t gcd(uint32_t u, uint32_t v) {
  164. int shift;
  165. if (u == 0) return v;
  166. if (v == 0) return u;
  167. shift = __builtin_ctzl(u | v);
  168.  
  169. while ( !(u & 0b1L)) u >>= 1; // manual u >>= __buitin_ctzl(u)
  170. while (v ) {
  171. while ( !(v & 0b1L)) v >>= 1;
  172. if (u > v) {
  173. uint32_t t = v;
  174. v = u;
  175. u = t;
  176. }
  177. v = v - u;
  178. }
  179. return u << shift;
  180. }
  181.  
  182. dividerVals_t divCalcFast(uint32_t desired_freq, uint32_t osc_freq, uint8_t dCurr) {
  183. const uint32_t FVCO_MIN = 600000000, FVCO_MAX = 900000000;
  184. dividerVals_t divider_vals = {0, 0, 0, 0, 0, 0, 0, 0};
  185. uint32_t fvco = desired_freq * dCurr; // zero when d = 0, current fvco
  186. if (fvco > FVCO_MAX || fvco < FVCO_MIN) {
  187. dCurr = (FVCO_MIN + FVCO_MAX) / 2 / desired_freq; // set fvco to the mid point, for max tuning
  188. //d = FVCO_MAX / desired_freq;
  189. dCurr &= 0xFE; // this is the projected d
  190. }
  191. uint8_t d = dCurr; // this is our working value of d, either the current or projected d
  192. // make sure the d works. First try with even integer d, then odd.
  193. // If doesn't work, change d and try again.
  194. do {
  195. fvco = desired_freq * d;
  196. ldiv_t xDivY = ldiv(fvco, osc_freq);
  197. uint32_t gcdTemp = gcd(xDivY.rem, osc_freq);
  198. divider_vals.FB_a = xDivY.quot;
  199. divider_vals.FB_b = xDivY.rem / gcdTemp;
  200. divider_vals.FB_c = osc_freq / gcdTemp;
  201. divider_vals.FB_int = 0;
  202. d = (dCurr - d < 0) ? d + 2 * (dCurr - d) : d + 2 * (dCurr - d) + 2; // find even d centered near mid point
  203. } while (divider_vals.FB_c > 1048757UL && fvco > FVCO_MIN && fvco < FVCO_MAX );
  204. // lazy catch all for now
  205. if (divider_vals.FB_c > 1048757UL) {
  206. fvco = desired_freq * dCurr;
  207. ldiv_t xDivY = ldiv(fvco, osc_freq);
  208. divider_vals.FB_a = xDivY.quot;
  209. divider_vals.FB_b = xDivY.rem;
  210. divider_vals.FB_c = osc_freq;
  211. while (divider_vals.FB_c > 1048757UL) {
  212. divider_vals.FB_b >>= 1;
  213. divider_vals.FB_c >>= 1; // just keep halving until you hit a good value
  214. }
  215. divider_vals.FB_int = 0;
  216. }
  217. divider_vals.MS_a = d;
  218. divider_vals.MS_b = 0;
  219. divider_vals.MS_c = 1;
  220. divider_vals.MS_int = !(0b1L & divider_vals.MS_a); // set true if even
  221. return divider_vals;
  222. }
  223.  
  224.  
  225. void SetFrequency (dividerVals_t results)
  226. {
  227. Serial1.println(F("SetFrequency(): "));
  228.  
  229. Serial1.print(" FB_a "); Serial1.println(results.FB_a);
  230. Serial1.print(" FB_b "); Serial1.println(results.FB_b);
  231. Serial1.print(" FB_c "); Serial1.println(results.FB_c);
  232. Serial1.print(" FB_int "); Serial1.println(results.FB_int);
  233. Serial1.print(" MS_a "); Serial1.println(results.MS_a);
  234. Serial1.print(" MS_b "); Serial1.println(results.MS_b);
  235. Serial1.print(" MS_c "); Serial1.println(results.MS_c);
  236. Serial1.print(" MS_int "); Serial1.println(results.MS_int);
  237.  
  238. unsigned long MSNA_P1; // Si5351a Feedback Multisynth register MSNA_P1
  239. unsigned long MSNA_P2; // Si5351a Feedback Multisynth register MSNA_P2
  240. unsigned long MSNA_P3; // Si5351a Feedback Multisynth register MSNA_P3
  241.  
  242. unsigned long MS0_P1; // Si5351a Output Divider register MS0_P1
  243. unsigned long MS0_P2; // Si5351a Output Divider register MS0_P1
  244. unsigned long MS0_P3; // Si5351a Output Divider register MS0_P1
  245.  
  246. // Assume only use PLL A
  247. // MSNA_P1[17:0] = 128 * FB_a + Floor(128*(FB_b/FB_c))-512
  248. // MSNA_P2[19:0] = 128 * FB_b - FB_c * Floor(128*(FB_b/FB_c))
  249. // MSNA_P3[19:0] = FB_c
  250. // FBA_INT = FB_int // Integer mode?
  251.  
  252. //MSNA_P1 = 128 * results.FB_a + floor(128 * (results.FB_b/results.FB_c)) - 512;
  253. //MSNA_P2 = 128 * results.FB_b - results.FB_c * floor(128 * (results.FB_b/results.FB_c));
  254. //MSNA_P3 = results.FB_c;
  255.  
  256. MSNA_P1 = (uint32_t)(128 * ((float)results.FB_b / (float)results.FB_c));
  257. MSNA_P1 = (uint32_t)(128 * (uint32_t)(results.FB_a) + MSNA_P1 - 512);
  258. MSNA_P2 = (uint32_t)(128 * ((float)results.FB_b / (float)results.FB_c));
  259. MSNA_P2 = (uint32_t)(128 * results.FB_b - results.FB_c * MSNA_P2);
  260. MSNA_P3 = results.FB_c;
  261.  
  262. i2cSendRegister (26, (MSNA_P3 & 0x0000FF00) >> 8); // Bits [15:8] of MSNA_P3 in register 26
  263. i2cSendRegister (27, MSNA_P3 & 0x000000FF); // Bits [7:0] of MSNA_P3 in register 27
  264. i2cSendRegister (28, (MSNA_P1 & 0x00030000) >> 16); // Bits [17:16] of MSNA_P1 in bits [1:0] of register 28
  265. i2cSendRegister (29, (MSNA_P1 & 0x0000FF00) >> 8); // Bits [15:8] of MSNA_P1 in register 29
  266. i2cSendRegister (30, MSNA_P1 & 0x000000FF); // Bits [7:0] of MSNA_P1 in register 30
  267. i2cSendRegister (31, ((MSNA_P3 & 0x000F0000) >> 12) | ((MSNA_P2 & 0x000F0000) >> 16)); // Parts of MSNA_P3 and MSNA_P1 in 31
  268. i2cSendRegister (32, (MSNA_P2 & 0x0000FF00) >> 8); // Bits [15:8] of MSNA_P2 in register 32
  269. i2cSendRegister (33, MSNA_P2 & 0x000000FF); // Bits [7:0] of MSNA_P2 in register 33
  270.  
  271. // Assume only use MS 0
  272. // MS0_SRC = 0 // Connect PLL A output to MultiSynth 0 input
  273. // MS0_P1[17:0] = 128 * MS_a + Floor(128*(MS_b/MS_c))-512
  274. // MS0_P2[19:0] = 128 * MS_b - MS_c * Floor(128*(MS_b/MS_c))
  275. // MS0_P3[19:0] = MS_c
  276. // MS0_INT = MS_int // Even Integer mode?
  277.  
  278. //MS0_P1 = 128 * results.MS_a + floor(128 * (results.MS_b/results.MS_c)) - 512;
  279. //MS0_P2 = 128 * results.MS_b - results.MS_c * floor(128 * (results.MS_b/results.MS_c));
  280. //MS0_P3 = results.MS_c;
  281.  
  282. MS0_P1 = (uint32_t)(128 * ((float)results.MS_b / (float)results.MS_c));
  283. MS0_P1 = (uint32_t)(128 * (uint32_t)(results.MS_a) + MS0_P1 - 512);
  284. MS0_P2 = (uint32_t)(128 * ((float)results.MS_b / (float)results.MS_c));
  285. MS0_P2 = (uint32_t)(128 * results.MS_b - results.MS_c * MS0_P2);
  286. MS0_P3 = results.MS_c;
  287.  
  288. i2cSendRegister(42, (MS0_P3 & 0x0000FF00) >> 8); // Bits [15:8] of MS0_P3 in register 42
  289. i2cSendRegister(43, (MS0_P3 & 0x000000FF)); // Bits [7:0] of MS0_P3 in register 43
  290. // TODO Reg 44 MS0_DIVBY4 in [3:2] ?
  291. i2cSendRegister(44, (MS0_P1 & 0x00030000) >> 16);// Bits [17:16] of MS0_P1 in bits [1:0] MS0_DIVBY4 in [3:2] and R0_DIV in [7:4]
  292. i2cSendRegister(45, (MS0_P1 & 0x0000FF00) >> 8); // Bits [15:8] of MS0_P1 in register 45
  293. i2cSendRegister(46, (MS0_P1 & 0x000000FF)); // Bits [7:0] of MS0_P1 in register 46
  294. i2cSendRegister(47, ((MS0_P3 & 0x000F0000) >> 12) | ((MS0_P2 & 0x000F0000) >> 16)); // Bits [19:16] of MS0_P2 in bits [7:4] and [19:16] of MS0_P3 in [3:0]
  295. i2cSendRegister(48, (MS0_P2 & 0x0000FF00) >> 8); // Bits [15:8] of MS0_P2
  296. i2cSendRegister(49, (MS0_P2 & 0x000000FF)); // Bits [7:0] of MS0_P2
  297.  
  298. // Register 16. CLK0 Control
  299. // ToDo Set MultiSynth 0 Integer mode when we can,
  300. // 0b00001111, 0x0F, Powered up:Yes:0, Integer mode:No:0, PLL:A:0, Inverted:Not:0, Source:MS0:11, Drive:8ma:11
  301. i2cSendRegister(SI_CLK0_CONTROL, 0x4F);
  302. }
  303.  
  304.  
  305. // Set up specified PLL with mult, num and denom
  306. // mult is 15..90
  307. // num is 0..1,048,575 (0xFFFFF)
  308. // denom is 0..1,048,575 (0xFFFFF)
  309. void setupPLL(uint8_t pll, uint8_t mult, uint32_t num, uint32_t denom)
  310. {
  311. uint32_t P1; // PLL config register P1
  312. uint32_t P2; // PLL config register P2
  313. uint32_t P3; // PLL config register P3
  314.  
  315. Serial1.println(F("setupPLL(): "));
  316.  
  317. Serial1.print(" FB_a "); Serial1.println(mult);
  318. Serial1.print(" FB_b "); Serial1.println(num);
  319. Serial1.print(" FB_c "); Serial1.println(denom);
  320.  
  321. P1 = (uint32_t)(128 * ((float)num / (float)denom));
  322. P1 = (uint32_t)(128 * (uint32_t)(mult) + P1 - 512);
  323. P2 = (uint32_t)(128 * ((float)num / (float)denom));
  324. P2 = (uint32_t)(128 * num - denom * P2);
  325. P3 = denom;
  326.  
  327. i2cSendRegister(pll + 0, (P3 & 0x0000FF00) >> 8);
  328. i2cSendRegister(pll + 1, (P3 & 0x000000FF));
  329. i2cSendRegister(pll + 2, (P1 & 0x00030000) >> 16);
  330. i2cSendRegister(pll + 3, (P1 & 0x0000FF00) >> 8);
  331. i2cSendRegister(pll + 4, (P1 & 0x000000FF));
  332. i2cSendRegister(pll + 5, ((P3 & 0x000F0000) >> 12) | ((P2 & 0x000F0000) >> 16));
  333. i2cSendRegister(pll + 6, (P2 & 0x0000FF00) >> 8);
  334. i2cSendRegister(pll + 7, (P2 & 0x000000FF));
  335. }
  336.  
  337.  
  338. // Set up MultiSynth with integer Divider and R Divider
  339. void setupMultisynth(uint8_t synth, uint32_t Divider, uint8_t rDiv)
  340. {
  341. uint32_t P1; // Synth config register P1
  342. uint32_t P2; // Synth config register P2
  343. uint32_t P3; // Synth config register P3
  344.  
  345. Serial1.println(F("setupMultisynth(): "));
  346.  
  347. Serial1.print(" MS_a ?"); Serial1.println(Divider);
  348. Serial1.print(" MS_b ?"); Serial1.println("0");
  349. Serial1.print(" MS_c "); Serial1.println("1");
  350.  
  351. P1 = 128 * Divider - 512;
  352. P2 = 0; // P2 = 0, P3 = 1 forces an integer value for the Divider
  353. P3 = 1;
  354.  
  355. i2cSendRegister(synth + 0, (P3 & 0x0000FF00) >> 8);
  356. i2cSendRegister(synth + 1, (P3 & 0x000000FF));
  357. i2cSendRegister(synth + 2, ((P1 & 0x00030000) >> 16) | rDiv);
  358. i2cSendRegister(synth + 3, (P1 & 0x0000FF00) >> 8);
  359. i2cSendRegister(synth + 4, (P1 & 0x000000FF));
  360. i2cSendRegister(synth + 5, ((P3 & 0x000F0000) >> 12) | ((P2 &
  361. 0x000F0000) >> 16));
  362. i2cSendRegister(synth + 6, (P2 & 0x0000FF00) >> 8);
  363. i2cSendRegister(synth + 7, (P2 & 0x000000FF));
  364. }
  365.  
  366.  
  367. void SetFrequencyKW(uint64_t frequency) // Frequency is in centiHz
  368. {
  369. uint64_t pllFreq;
  370. uint32_t l;
  371. float f;
  372. uint8_t mult;
  373. uint32_t num;
  374. uint32_t denom;
  375. uint32_t Divider;
  376.  
  377. Serial1.println(F("SetFrequencyKW(): "));
  378.  
  379. Divider = 90000000000ULL / frequency; // Calculate the division ratio. 600 to 900MHz is the maximum internal (deciHz)
  380. pllFreq = Divider * frequency; // Calculate the pllFrequency:
  381. mult = pllFreq / ((27000000UL) * 100UL); // Determine the multiplier
  382. l = pllFreq % ((27000000UL) * 100UL); // It has three parts:
  383. f = l; // mult is an integer that must be in the range 15..90
  384. f *= 1048575; // num and denom are the fractional parts, the numerator and denominator
  385. f /= (27000000UL); // each is 20 bits (range 0..1048575)
  386. num = f; // the actual multiplier is mult + num / denom
  387. denom = 1048575; // For simplicity we set the denominator to the maximum 1048575
  388. num = num / 100;
  389.  
  390. setupPLL(SI_SYNTH_PLL_A, mult, num, denom);
  391.  
  392. // Set up MultiSynth Divider 0, with the calculated Divider.
  393. setupMultisynth(SI_SYNTH_MS_0, Divider, SI_R_DIV_1);
  394.  
  395. i2cSendRegister(SI_CLK0_CONTROL, 0x4F);
  396.  
  397. }
  398.  
  399.  
  400. void setup()
  401. {
  402. //dividerVals_t results = {0, 0, 0, 0, 0, 0, 0, 0};
  403. dividerVals_t results = {33, 194180, 1048575, 64, 0, 1, 0 , 0};
  404.  
  405. wdt_disable();
  406.  
  407. Serial1.begin(57600);
  408. Serial1.println(F("START"));
  409. delay(3000);
  410.  
  411. pinMode(SI5_POWER, OUTPUT);
  412. digitalWrite(SI5_POWER, HIGH);
  413. delay(20); // Max 10ms power up time
  414. i2cInit(); // Initialise i2c for the SI5351a
  415. Serial1.println(F("si5351a powered on and I2C Initialised."));
  416. delay(5000);
  417.  
  418. // Reg 17, 18. CLK1 & 2 Control - power off
  419. // 0b10001111, 0x8F, Powered up:No:1, Integer mode:No:0, PLL:A:0, Inverted:Not:0, Source:MS0:11, Drive:8ma:11
  420. i2cSendRegister(SI_CLK1_CONTROL, 0x8F);
  421. i2cSendRegister(SI_CLK2_CONTROL, 0x8F);
  422.  
  423. // Read status registers
  424. i2cSendRegister(1, 0); // reset sticky bits
  425. Serial1.print(F(" Reg 0: ")); Serial1.print(i2cReadRegister(0, &data)); Serial1.print(F(" ")); Serial1.print(data);
  426. Serial1.print(F(" Reg 1: ")); Serial1.print(i2cReadRegister(1, &data)); Serial1.print(F(" ")); Serial1.print(data);
  427. Serial1.print(F(" Reg 2: ")); Serial1.print(i2cReadRegister(2, &data)); Serial1.print(F(" ")); Serial1.println(data);
  428.  
  429. Serial1.println(F("Set Initial frequency and reset PLL's"));
  430. //SetFrequency(results);
  431. SetFrequency(results);
  432. i2cSendRegister(SI_PLL_RESET, 0xA0); // 0xA0 resets both PLLs
  433. delay(5000);
  434. Serial1.println(F("Set Initial frequency and reset PLL's"));
  435. results = divCalcFast(14000000UL, 27000000UL, results.MS_a); // (desired, osc_clock, current MS divider value a)
  436. SetFrequency(results);
  437. i2cSendRegister(SI_PLL_RESET, 0xA0); // 0xA0 resets both PLLs
  438.  
  439. // Read status registers
  440. i2cSendRegister(1, 0); // reset sticky bits
  441. Serial1.print(F(" Reg 0: ")); Serial1.print(i2cReadRegister(0, &data)); Serial1.print(F(" ")); Serial1.print(data);
  442. Serial1.print(F(" Reg 1: ")); Serial1.print(i2cReadRegister(1, &data)); Serial1.print(F(" ")); Serial1.print(data);
  443. Serial1.print(F(" Reg 2: ")); Serial1.print(i2cReadRegister(2, &data)); Serial1.print(F(" ")); Serial1.println(data);
  444.  
  445. delay(5000);
  446. resetFunc(); //reboot
  447.  
  448. Serial1.println(F("First Tone 14097075UL"));
  449. results = divCalcFast(14097075UL, 27000000UL, 0); // (desired, osc_clock, current MS divider value a)
  450. SetFrequency(results);
  451. delay(5000);
  452.  
  453. Serial1.println(F("Second Tone 14097076UL"));
  454. results = divCalcFast(14097076UL, 27000000UL, results.MS_a); // (desired, osc_clock, current MS divider value a)
  455. SetFrequency(results);
  456. delay(5000);
  457.  
  458. Serial1.println(F("Third Tone 14097077UL"));
  459. results = divCalcFast(14097077UL, 27000000UL, results.MS_a); // (desired, osc_clock, current MS divider value a)
  460. SetFrequency(results);
  461. delay(5000);
  462.  
  463. Serial1.println(F("Fourth Tone 14097078UL"));
  464. results = divCalcFast(14097078UL, 27000000UL, results.MS_a); // (desired, osc_clock, current MS divider value a)
  465. SetFrequency(results);
  466. delay(5000);
  467.  
  468. Serial1.println(F("END"));
  469. digitalWrite(SI5_POWER, LOW);
  470. delay(5000);
  471. resetFunc(); //reboot
  472. }
  473.  
  474.  
  475. void loop()
  476. {
  477.  
  478. }
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