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- diff --git a/os/hal/boards/ST_NUCLEO144_F207ZG/board.h b/os/hal/boards/ST_NUCLEO144_F207ZG/board.h
- index 9119f7526..f6747b795 100644
- --- a/os/hal/boards/ST_NUCLEO144_F207ZG/board.h
- +++ b/os/hal/boards/ST_NUCLEO144_F207ZG/board.h
- @@ -51,11 +51,9 @@
- #endif
- #if !defined(STM32_HSECLK)
- -#define STM32_HSECLK 8000000U
- +#define STM32_HSECLK 26000000U
- #endif
- -#define STM32_HSE_BYPASS
- -
- /*
- * Board voltages.
- * Required for performance limits calculation.
- @@ -65,7 +63,7 @@
- /*
- * MCU type as defined in the ST header.
- */
- -#define STM32F207xx
- +#define STM32F205xx
- /*
- * IO pins assignments.
- @@ -95,6 +93,7 @@
- #define GPIOA_SWCLK 14U
- #define GPIOA_ZIO_D20 15U
- #define GPIOA_I2S3_WS 15U
- +#define GPIOA_LED1 15U
- #define GPIOB_ZIO_D33 0U
- #define GPIOB_TIM3_CH3 0U
- @@ -123,9 +122,8 @@
- #define GPIOB_ZIO_D18 13U
- #define GPIOB_I2S2_CK 13U
- #define GPIOB_RMII_TXD1 13U
- -#define GPIOB_LED3 14U
- -#define GPIOB_ZIO_D17 15U
- -#define GPIOB_I2S2_SD 15U
- +#define GPIOB_USB_DM 14U
- +#define GPIOB_USB_DP 15U
- #define GPIOC_ARD_A1 0U
- #define GPIOC_ADC123_IN10 0U
- @@ -349,9 +347,10 @@
- #define LINE_SWCLK PAL_LINE(GPIOA, 14U)
- #define LINE_ZIO_D20 PAL_LINE(GPIOA, 15U)
- #define LINE_I2S3_WS PAL_LINE(GPIOA, 15U)
- +#define LINE_LED1 PAL_LINE(GPIOA, 15U)
- #define LINE_ZIO_D33 PAL_LINE(GPIOB, 0U)
- #define LINE_TIM3_CH3 PAL_LINE(GPIOB, 0U)
- -#define LINE_LED1 PAL_LINE(GPIOB, 0U)
- +// #define LINE_LED1 PAL_LINE(GPIOB, 0U)
- #define LINE_ZIO_A6 PAL_LINE(GPIOB, 1U)
- #define LINE_ADC12_IN9 PAL_LINE(GPIOB, 1U)
- #define LINE_ZIO_D27 PAL_LINE(GPIOB, 2U)
- @@ -549,7 +548,7 @@
- * PA12 - USB_DP (alternate 10).
- * PA13 - SWDIO (alternate 0).
- * PA14 - SWCLK (alternate 0).
- - * PA15 - ZIO_D20 I2S3_WS (input pullup).
- + * PA15 - LED1 (output pushpull maximum).
- */
- #define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_ZIO_D32) | \
- PIN_MODE_ALTERNATE(GPIOA_RMII_REF_CLK) |\
- @@ -566,7 +565,7 @@
- PIN_MODE_ALTERNATE(GPIOA_USB_DP) | \
- PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \
- PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \
- - PIN_MODE_INPUT(GPIOA_ZIO_D20))
- + PIN_MODE_OUTPUT(GPIOA_LED1))
- #define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_ZIO_D32) | \
- PIN_OTYPE_PUSHPULL(GPIOA_RMII_REF_CLK) |\
- PIN_OTYPE_PUSHPULL(GPIOA_RMII_MDIO) | \
- @@ -582,7 +581,7 @@
- PIN_OTYPE_PUSHPULL(GPIOA_USB_DP) | \
- PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | \
- PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \
- - PIN_OTYPE_PUSHPULL(GPIOA_ZIO_D20))
- + PIN_OTYPE_PUSHPULL(GPIOA_LED1))
- #define VAL_GPIOA_OSPEEDR (PIN_OSPEED_HIGH(GPIOA_ZIO_D32) | \
- PIN_OSPEED_HIGH(GPIOA_RMII_REF_CLK) | \
- PIN_OSPEED_HIGH(GPIOA_RMII_MDIO) | \
- @@ -598,7 +597,7 @@
- PIN_OSPEED_HIGH(GPIOA_USB_DP) | \
- PIN_OSPEED_HIGH(GPIOA_SWDIO) | \
- PIN_OSPEED_HIGH(GPIOA_SWCLK) | \
- - PIN_OSPEED_HIGH(GPIOA_ZIO_D20))
- + PIN_OSPEED_HIGH(GPIOA_LED1))
- #define VAL_GPIOA_PUPDR (PIN_PUPDR_PULLUP(GPIOA_ZIO_D32) | \
- PIN_PUPDR_FLOATING(GPIOA_RMII_REF_CLK) |\
- PIN_PUPDR_PULLUP(GPIOA_RMII_MDIO) | \
- @@ -614,7 +613,7 @@
- PIN_PUPDR_FLOATING(GPIOA_USB_DP) | \
- PIN_PUPDR_FLOATING(GPIOA_SWDIO) | \
- PIN_PUPDR_FLOATING(GPIOA_SWCLK) | \
- - PIN_PUPDR_PULLUP(GPIOA_ZIO_D20))
- + PIN_PUPDR_FLOATING(GPIOA_LED1))
- #define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_ZIO_D32) | \
- PIN_ODR_HIGH(GPIOA_RMII_REF_CLK) | \
- PIN_ODR_HIGH(GPIOA_RMII_MDIO) | \
- @@ -630,7 +629,7 @@
- PIN_ODR_HIGH(GPIOA_USB_DP) | \
- PIN_ODR_HIGH(GPIOA_SWDIO) | \
- PIN_ODR_HIGH(GPIOA_SWCLK) | \
- - PIN_ODR_HIGH(GPIOA_ZIO_D20))
- + PIN_ODR_LOW(GPIOA_LED1))
- #define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_ZIO_D32, 0U) | \
- PIN_AFIO_AF(GPIOA_RMII_REF_CLK, 11U) | \
- PIN_AFIO_AF(GPIOA_RMII_MDIO, 11U) | \
- @@ -646,7 +645,7 @@
- PIN_AFIO_AF(GPIOA_USB_DP, 10U) | \
- PIN_AFIO_AF(GPIOA_SWDIO, 0U) | \
- PIN_AFIO_AF(GPIOA_SWCLK, 0U) | \
- - PIN_AFIO_AF(GPIOA_ZIO_D20, 0U))
- + PIN_AFIO_AF(GPIOA_LED1, 0U))
- /*
- * GPIOB setup:
- @@ -665,8 +664,8 @@
- * PB11 - ZIO_D35 TIM2_CH4 (input pullup).
- * PB12 - ZIO_D19 I2S2_WS (input pullup).
- * PB13 - ZIO_D18 I2S2_CK RMII_TXD1 (alternate 11).
- - * PB14 - LED3 (output pushpull maximum).
- - * PB15 - ZIO_D17 I2S2_SD (input pullup).
- + * PB14 - USB_DM (alternate 12).
- + * PB15 - USB_DP (alternate 12).
- */
- #define VAL_GPIOB_MODER (PIN_MODE_OUTPUT(GPIOB_ZIO_D33) | \
- PIN_MODE_INPUT(GPIOB_ZIO_A6) | \
- @@ -681,9 +680,8 @@
- PIN_MODE_INPUT(GPIOB_ZIO_D36) | \
- PIN_MODE_INPUT(GPIOB_ZIO_D35) | \
- PIN_MODE_INPUT(GPIOB_ZIO_D19) | \
- - PIN_MODE_ALTERNATE(GPIOB_ZIO_D18) | \
- - PIN_MODE_OUTPUT(GPIOB_LED3) | \
- - PIN_MODE_INPUT(GPIOB_ZIO_D17))
- + PIN_MODE_ALTERNATE(GPIOB_USB_DM) | \
- + PIN_MODE_ALTERNATE(GPIOB_USB_DP))
- #define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_ZIO_D33) | \
- PIN_OTYPE_PUSHPULL(GPIOB_ZIO_A6) | \
- PIN_OTYPE_PUSHPULL(GPIOB_ZIO_D27) | \
- @@ -698,8 +696,8 @@
- PIN_OTYPE_PUSHPULL(GPIOB_ZIO_D35) | \
- PIN_OTYPE_PUSHPULL(GPIOB_ZIO_D19) | \
- PIN_OTYPE_PUSHPULL(GPIOB_ZIO_D18) | \
- - PIN_OTYPE_PUSHPULL(GPIOB_LED3) | \
- - PIN_OTYPE_PUSHPULL(GPIOB_ZIO_D17))
- + PIN_OTYPE_PUSHPULL(GPIOB_USB_DM) | \
- + PIN_OTYPE_PUSHPULL(GPIOB_USB_DP))
- #define VAL_GPIOB_OSPEEDR (PIN_OSPEED_HIGH(GPIOB_ZIO_D33) | \
- PIN_OSPEED_HIGH(GPIOB_ZIO_A6) | \
- PIN_OSPEED_VERYLOW(GPIOB_ZIO_D27) | \
- @@ -714,8 +712,8 @@
- PIN_OSPEED_HIGH(GPIOB_ZIO_D35) | \
- PIN_OSPEED_HIGH(GPIOB_ZIO_D19) | \
- PIN_OSPEED_HIGH(GPIOB_ZIO_D18) | \
- - PIN_OSPEED_HIGH(GPIOB_LED3) | \
- - PIN_OSPEED_HIGH(GPIOB_ZIO_D17))
- + PIN_OSPEED_HIGH(GPIOB_USB_DM) | \
- + PIN_OSPEED_HIGH(GPIOB_USB_DP))
- #define VAL_GPIOB_PUPDR (PIN_PUPDR_FLOATING(GPIOB_ZIO_D33) | \
- PIN_PUPDR_PULLUP(GPIOB_ZIO_A6) | \
- PIN_PUPDR_PULLUP(GPIOB_ZIO_D27) | \
- @@ -730,8 +728,8 @@
- PIN_PUPDR_PULLUP(GPIOB_ZIO_D35) | \
- PIN_PUPDR_PULLUP(GPIOB_ZIO_D19) | \
- PIN_PUPDR_PULLUP(GPIOB_ZIO_D18) | \
- - PIN_PUPDR_FLOATING(GPIOB_LED3) | \
- - PIN_PUPDR_PULLUP(GPIOB_ZIO_D17))
- + PIN_PUPDR_FLOATING(GPIOB_USB_DM) | \
- + PIN_PUPDR_FLOATING(GPIOB_USB_DP))
- #define VAL_GPIOB_ODR (PIN_ODR_LOW(GPIOB_ZIO_D33) | \
- PIN_ODR_HIGH(GPIOB_ZIO_A6) | \
- PIN_ODR_HIGH(GPIOB_ZIO_D27) | \
- @@ -746,8 +744,8 @@
- PIN_ODR_HIGH(GPIOB_ZIO_D35) | \
- PIN_ODR_HIGH(GPIOB_ZIO_D19) | \
- PIN_ODR_HIGH(GPIOB_ZIO_D18) | \
- - PIN_ODR_LOW(GPIOB_LED3) | \
- - PIN_ODR_HIGH(GPIOB_ZIO_D17))
- + PIN_ODR_HIGH(GPIOB_USB_DM) | \
- + PIN_ODR_HIGH(GPIOB_USB_DP))
- #define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_ZIO_D33, 0U) | \
- PIN_AFIO_AF(GPIOB_ZIO_A6, 0U) | \
- PIN_AFIO_AF(GPIOB_ZIO_D27, 0U) | \
- @@ -762,8 +760,8 @@
- PIN_AFIO_AF(GPIOB_ZIO_D35, 0U) | \
- PIN_AFIO_AF(GPIOB_ZIO_D19, 0U) | \
- PIN_AFIO_AF(GPIOB_ZIO_D18, 11U) | \
- - PIN_AFIO_AF(GPIOB_LED3, 0U) | \
- - PIN_AFIO_AF(GPIOB_ZIO_D17, 0U))
- + PIN_AFIO_AF(GPIOB_USB_DM, 12U) | \
- + PIN_AFIO_AF(GPIOB_USB_DP, 12U))
- /*
- * GPIOC setup:
- diff --git a/os/hal/ports/STM32/STM32F4xx/hal_lld.h b/os/hal/ports/STM32/STM32F4xx/hal_lld.h
- index 1063dc09f..b8e6a3383 100644
- --- a/os/hal/ports/STM32/STM32F4xx/hal_lld.h
- +++ b/os/hal/ports/STM32/STM32F4xx/hal_lld.h
- @@ -140,22 +140,28 @@
- /**
- * @brief RTC HSE divider setting.
- */
- +#if STM32_RTCSEL == STM32_RTCSEL_HSEDIV
- #if ((STM32_RTCPRE_VALUE >= 2) && (STM32_RTCPRE_VALUE <= 31)) || \
- defined(__DOXYGEN__)
- #define STM32_RTCPRE (STM32_RTCPRE_VALUE << 16)
- #else
- #error "invalid STM32_RTCPRE value specified"
- #endif
- +#else
- +#define STM32_RTCPRE 0
- +#endif
- /**
- * @brief HSE divider toward RTC clock.
- */
- +#if STM32_RTCSEL == STM32_RTCSEL_HSEDIV
- #if ((STM32_RTCPRE_VALUE >= 2) && (STM32_RTCPRE_VALUE <= 31)) || \
- defined(__DOXYGEN__)
- #define STM32_HSEDIVCLK (STM32_HSECLK / STM32_RTCPRE_VALUE)
- #else
- #error "invalid STM32_RTCPRE value specified"
- #endif
- +#endif
- /**
- * @brief RTC clock.
- diff --git a/os/hal/ports/STM32/STM32F4xx/hal_lld_type1.h b/os/hal/ports/STM32/STM32F4xx/hal_lld_type1.h
- index 87903a6b4..6b6d1ed87 100644
- --- a/os/hal/ports/STM32/STM32F4xx/hal_lld_type1.h
- +++ b/os/hal/ports/STM32/STM32F4xx/hal_lld_type1.h
- @@ -1717,7 +1717,7 @@
- /**
- * @brief PLLI2S activation flag.
- */
- -#define STM32_ACTIVATE_PLLI2S TRUE
- +#define STM32_ACTIVATE_PLLI2S FALSE
- #else
- #define STM32_ACTIVATE_PLLI2S FALSE
- #endif
- diff --git a/testhal/STM32/STM32F2xx/USB_CDC/mcuconf.h b/testhal/STM32/STM32F2xx/USB_CDC/mcuconf.h
- index dfbc9c73c..b9892c0cc 100644
- --- a/testhal/STM32/STM32F2xx/USB_CDC/mcuconf.h
- +++ b/testhal/STM32/STM32F2xx/USB_CDC/mcuconf.h
- @@ -44,20 +44,20 @@
- #define STM32_CLOCK48_REQUIRED TRUE
- #define STM32_SW STM32_SW_PLL
- #define STM32_PLLSRC STM32_PLLSRC_HSE
- -#define STM32_PLLM_VALUE 8
- +#define STM32_PLLM_VALUE 26
- #define STM32_PLLN_VALUE 240
- #define STM32_PLLP_VALUE 2
- #define STM32_PLLQ_VALUE 5
- #define STM32_HPRE STM32_HPRE_DIV1
- #define STM32_PPRE1 STM32_PPRE1_DIV4
- #define STM32_PPRE2 STM32_PPRE2_DIV2
- -#define STM32_RTCSEL STM32_RTCSEL_LSI
- -#define STM32_RTCPRE_VALUE 8
- +#define STM32_RTCSEL STM32_RTCSEL_NOCLOCK
- +#define STM32_RTCPRE_VALUE 0
- #define STM32_MCO1SEL STM32_MCO1SEL_HSI
- #define STM32_MCO1PRE STM32_MCO1PRE_DIV1
- #define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK
- -#define STM32_MCO2PRE STM32_MCO2PRE_DIV5
- -#define STM32_I2SSRC STM32_I2SSRC_CKIN
- +#define STM32_MCO2PRE STM32_MCO2PRE_DIV1
- +#define STM32_I2SSRC STM32_I2SSRC_PLLI2S
- #define STM32_PLLI2SN_VALUE 192
- #define STM32_PLLI2SR_VALUE 5
- #define STM32_PVD_ENABLE FALSE
- @@ -324,8 +324,8 @@
- /*
- * USB driver system settings.
- */
- -#define STM32_USB_USE_OTG1 TRUE
- -#define STM32_USB_USE_OTG2 FALSE
- +#define STM32_USB_USE_OTG1 FALSE
- +#define STM32_USB_USE_OTG2 TRUE
- #define STM32_USB_OTG1_IRQ_PRIORITY 14
- #define STM32_USB_OTG2_IRQ_PRIORITY 14
- #define STM32_USB_OTG1_RX_FIFO_SIZE 512
- diff --git a/testhal/STM32/STM32F2xx/USB_CDC/usbcfg.c b/testhal/STM32/STM32F2xx/USB_CDC/usbcfg.c
- index f3e69c237..e35ff0925 100644
- --- a/testhal/STM32/STM32F2xx/USB_CDC/usbcfg.c
- +++ b/testhal/STM32/STM32F2xx/USB_CDC/usbcfg.c
- @@ -20,11 +20,11 @@
- SerialUSBDriver SDU1;
- /*
- - * Endpoints to be used for USBD1.
- + * Endpoints to be used for USBD2.
- */
- -#define USBD1_DATA_REQUEST_EP 1
- -#define USBD1_DATA_AVAILABLE_EP 1
- -#define USBD1_INTERRUPT_REQUEST_EP 2
- +#define USBD2_DATA_REQUEST_EP 1
- +#define USBD2_DATA_AVAILABLE_EP 1
- +#define USBD2_INTERRUPT_REQUEST_EP 2
- /*
- * USB Device Descriptor.
- @@ -102,7 +102,7 @@ static const uint8_t vcom_configuration_descriptor_data[67] = {
- USB_DESC_BYTE (0x01), /* bSlaveInterface0 (Data Class
- Interface). */
- /* Endpoint 2 Descriptor.*/
- - USB_DESC_ENDPOINT (USBD1_INTERRUPT_REQUEST_EP|0x80,
- + USB_DESC_ENDPOINT (USBD2_INTERRUPT_REQUEST_EP|0x80,
- 0x03, /* bmAttributes (Interrupt). */
- 0x0008, /* wMaxPacketSize. */
- 0xFF), /* bInterval. */
- @@ -118,12 +118,12 @@ static const uint8_t vcom_configuration_descriptor_data[67] = {
- 4.7). */
- 0x00), /* iInterface. */
- /* Endpoint 3 Descriptor.*/
- - USB_DESC_ENDPOINT (USBD1_DATA_AVAILABLE_EP, /* bEndpointAddress.*/
- + USB_DESC_ENDPOINT (USBD2_DATA_AVAILABLE_EP, /* bEndpointAddress.*/
- 0x02, /* bmAttributes (Bulk). */
- 0x0040, /* wMaxPacketSize. */
- 0x00), /* bInterval. */
- /* Endpoint 1 Descriptor.*/
- - USB_DESC_ENDPOINT (USBD1_DATA_REQUEST_EP|0x80, /* bEndpointAddress.*/
- + USB_DESC_ENDPOINT (USBD2_DATA_REQUEST_EP|0x80, /* bEndpointAddress.*/
- 0x02, /* bmAttributes (Bulk). */
- 0x0040, /* wMaxPacketSize. */
- 0x00) /* bInterval. */
- @@ -275,8 +275,8 @@ static void usb_event(USBDriver *usbp, usbevent_t event) {
- /* Enables the endpoints specified into the configuration.
- Note, this callback is invoked from an ISR so I-Class functions
- must be used.*/
- - usbInitEndpointI(usbp, USBD1_DATA_REQUEST_EP, &ep1config);
- - usbInitEndpointI(usbp, USBD1_INTERRUPT_REQUEST_EP, &ep2config);
- + usbInitEndpointI(usbp, USBD2_DATA_REQUEST_EP, &ep1config);
- + usbInitEndpointI(usbp, USBD2_INTERRUPT_REQUEST_EP, &ep2config);
- /* Resetting the state of the CDC subsystem.*/
- sduConfigureHookI(&SDU1);
- @@ -335,8 +335,8 @@ const USBConfig usbcfg = {
- * Serial over USB driver configuration.
- */
- const SerialUSBConfig serusbcfg = {
- - &USBD1,
- - USBD1_DATA_REQUEST_EP,
- - USBD1_DATA_AVAILABLE_EP,
- - USBD1_INTERRUPT_REQUEST_EP
- + &USBD2,
- + USBD2_DATA_REQUEST_EP,
- + USBD2_DATA_AVAILABLE_EP,
- + USBD2_INTERRUPT_REQUEST_EP
- };
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