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- Padavan
- ===================================================================
- MT7621 stage1 code Mar 12 2015 14:42:52 (ASIC)
- CPU=50000000 HZ BUS=16666666 HZ
- ==================================================================
- Change MPLL source from XTAL to CR...
- do MEMPLL setting..
- MEMPLL Config : 0x11100000
- 3PLL mode + External loopback
- === XTAL-40Mhz === DDR-1200Mhz ===
- PLL2 FB_DL: 0xb, 1/0 = 538/486 2D000000
- PLL3 FB_DL: 0xb, 1/0 = 568/456 2D000000
- PLL4 FB_DL: 0x1b, 1/0 = 602/422 6D000000
- do DDR setting..[00320381]
- Apply DDR3 Setting...(use customer AC)
- 0 8 16 24 32 40 48 56 64 72 80 88 96 104 112 120
- --------------------------------------------------------------------------------
- 0000:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 0001:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 0002:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 0003:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 0004:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 0005:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 0006:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 0007:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 0008:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 0009:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 000A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 000B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 000C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 000D:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
- 000E:| 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1
- 000F:| 0 0 0 0 1 1 1 1 1 1 1 1 1 1 0 0
- 0010:| 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0
- 0011:| 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0
- 0012:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 0013:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 0014:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 0015:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 0016:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 0017:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 0018:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 0019:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 001A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 001B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 001C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 001D:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 001E:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 001F:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- DRAMC_DQSCTL1[0e0]=13000000
- DRAMC_DQSGCTL[124]=80000033
- rank 0 coarse = 15
- rank 0 fine = 72
- B:| 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 0
- opt_dle value:9
- DRAMC_DDR2CTL[07c]=C287221D
- DRAMC_PADCTL4[0e4]=000022B3
- DRAMC_DQIDLY1[210]=0B080909
- DRAMC_DQIDLY2[214]=06090709
- DRAMC_DQIDLY3[218]=0B090707
- DRAMC_DQIDLY4[21c]=09090B0A
- DRAMC_R0DELDLY[018]=00001E1F
- ==================================================================
- RX DQS perbit delay software calibration
- ==================================================================
- 1.0-15 bit dq delay value
- ==================================================================
- bit| 0 1 2 3 4 5 6 7 8 9
- --------------------------------------
- 0 | 8 9 7 10 7 7 8 6 7 7
- 10 | 9 9 9 10 9 9
- --------------------------------------
- ==================================================================
- 2.dqs window
- x=pass dqs delay value (min~max)center
- y=0-7bit DQ of every group
- input delay:DQS0 =31 DQS1 = 30
- ==================================================================
- bit DQS0 bit DQS1
- 0 (1~59)30 8 (1~59)30
- 1 (1~62)31 9 (1~59)30
- 2 (1~60)30 10 (1~60)30
- 3 (1~60)30 11 (1~56)28
- 4 (1~58)29 12 (1~58)29
- 5 (1~62)31 13 (1~58)29
- 6 (1~60)30 14 (1~60)30
- 7 (1~62)31 15 (1~59)30
- ==================================================================
- 3.dq delay value last
- ==================================================================
- bit| 0 1 2 3 4 5 6 7 8 9
- --------------------------------------
- 0 | 9 9 8 11 9 7 9 6 7 7
- 10 | 9 11 10 11 9 9
- ==================================================================
- ==================================================================
- TX perbyte calibration
- ==================================================================
- DQS loop = 15, cmp_err_1 = ffff0000
- dqs_perbyte_dly.last_dqsdly_pass[0]=15, finish count=1
- dqs_perbyte_dly.last_dqsdly_pass[1]=15, finish count=2
- DQ loop=15, cmp_err_1 = ffff0000
- dqs_perbyte_dly.last_dqdly_pass[0]=15, finish count=1
- dqs_perbyte_dly.last_dqdly_pass[1]=15, finish count=2
- byte:0, (DQS,DQ)=(8,8)
- byte:1, (DQS,DQ)=(8,8)
- DRAMC_DQODLY1[200]=88888888
- DRAMC_DQODLY2[204]=88888888
- 20,data:88
- [EMI] DRAMC calibration passed
- ===================================================================
- MT7621 stage1 code done
- CPU=50000000 HZ BUS=16666666 HZ
- ===================================================================
- U-Boot 1.1.3 [4.0.0.3-8] (Nov 23 2015 - 15:15:55)
- Board: Ralink APSoC DRAM: 256 MB
- relocate_code Pointer at: 8ffa4000
- Config XHCI 40M PLL
- Allocate 16 byte aligned buffer: 8ffdfa70
- Enable NFI Clock
- # MTK NAND # : Use HW ECC
- NAND ID [01 F1 80 1D 01]
- Device found in MTK table, ID: 1f1, EXT_ID: 801d01
- Support this Device in MTK table! 1f1
- select_chip
- NAND select ECC bit: 4, sparesize: 64, spare_per_sector: 16
- Signature matched and data read!
- load_fact_bbt success 1023
- load fact bbt success
- [mtk_nand] probe successfully!
- [mtk_nand] writesize: 2048, oobsize: 64, erasesize: 131072, iowidth: 8
- NAND Flash: S34ML01G100TF 128MB
- NAND block size: 128KB
- NAND page size: 2048B
- .
- .
- ============================================
- Ralink UBoot Version: 4.0.0.3_NDMS
- --------------------------------------------
- ASIC 7621_MP (GMAC2 to RTL8370M Mode)
- DRAM_CONF_FROM: Auto-Detection
- DRAM_TYPE: DDR3
- DRAM bus: 16 bit
- Xtal Mode=3 OCP Ratio=1/3
- Flash component: NAND Flash
- Date:Nov 23 2015 Time:15:15:55
- ============================================
- icache: sets:256, ways:4, linesz:32 ,total:32768
- dcache: sets:256, ways:4, linesz:32 ,total:32768
- ##### The CPU freq = 880 MHZ ####
- estimate memory size = 256 Mbytes
- Firmware test register status: 0x00000000
- Init RTL8370M external switch...SUCCESS!
- Please choose the operation:
- 1: Load system code to SDRAM via TFTP.
- 2: Load system code then write to Flash via TFTP.
- 3: Boot system code via Flash (default).
- 4: Enter boot command line interface.
- 7: Load Boot Loader code then write to Flash via Serial.
- 9: Load Boot Loader code then write to Flash via TFTP. 0
- 3: System Boot system code via Flash.
- ## Booting image at bfd80000 ...
- Image Name: KN-ULTRA2
- Created: 2018-07-08 7:30:04 UTC
- Image Type: MIPS Linux Kernel Image (lzma compressed)
- Data Size: 9903490 Bytes = 9.4 MB
- Load Address: 80001000
- Entry Point: 802f5690
- ........................................................................................................................................................
- Verifying Checksum ... OK
- Uncompressing Kernel Image ... OK
- No initrd
- ## Transferring control to Linux (at address 802f5690) ...
- ## Giving linux memsize in MB, 256
- Starting kernel ...
- 6
- LINUX started...
- Linux version 3.4.113 (padavan@hms) (gcc version 7.3.0 (crosstool-NG ) ) #1 SMP Sun Jul 8 10:22:46 MSK 2018
- MediaTek SoC: MT7621A, RevID: 0103, RAM: DDR3, XTAL: 40MHz
- CPU/OCP/SYS frequency: 880/293/220 MHz
- CPU revision is: 0001992f (MIPS 1004Kc)
- Determined physical RAM map:
- memory: 10000000 @ 00000000 (usable)
- Zone PFN ranges:
- Normal
- 0x00000000 -> 0x00010000
- Movable zone start PFN for each node
- Early memory PFN ranges
- 0: 0x00000000 -> 0x00010000
- Detected 3 available secondary CPU(s)
- Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
- Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
- MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
- PERCPU: Embedded 7 pages/cpu @81203000 s5952 r8192 d14528 u32768
- Built 1 zonelists in Zone order, mobility grouping on. Total pages: 65024
- Kernel command line: console=ttyS0,57600n8 root=/dev/mtdblock4 rootfstype=squashfs
- PID hash table entries: 1024 (order: 0, 4096 bytes)
- Dentry cache hash table entries: 32768 (order: 5, 131072 bytes)
- Inode-cache hash table entries: 16384 (order: 4, 65536 bytes)
- Writing ErrCtl register=00011bc6
- Readback ErrCtl register=00011bc6
- Memory: 255860k/262144k available (3061k kernel code, 6284k reserved, 503k data, 204k init, 0k highmem)
- Hierarchical RCU implementation.
- NR_IRQS:72
- MIPS GIC RevID: 3.0
- Setting up vectored interrupts
- console [ttyS0] enabled
- Calibrating delay loop... 577.53 BogoMIPS (lpj=1155072)
- pid_max: default: 32768 minimum: 301
- Mount-cache hash table entries: 512
- Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
- Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
- MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
- CPU revision is: 0001992f (MIPS 1004Kc)
- Synchronize counters for CPU 1: done.
- Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
- Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
- MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
- CPU revision is: 0001992f (MIPS 1004Kc)
- Synchronize counters for CPU 2: done.
- Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
- Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
- MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
- CPU revision is: 0001992f (MIPS 1004Kc)
- Synchronize counters for CPU 3: done.
- Brought up 4 CPUs
- NET: Registered protocol family 16
- bio: create slab <bio-0> at 0
- SCSI subsystem initialized
- usbcore: registered new interface driver usbfs
- usbcore: registered new interface driver hub
- usbcore: registered new device driver usb
- PCI host bridge to bus 0000:00
- pci_bus 0000:00: root bus resource [mem 0x60000000-0x6fffffff]
- pci_bus 0000:00: root bus resource [io 0x1e160000-0x1e16ffff]
- pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
- pci 0000:00:01.0: bridge configuration invalid ([bus 00-00]), reconfiguring
- pci 0000:00:00.0: BAR 0: can't assign mem (size 0x80000000)
- pci 0000:00:01.0: BAR 0: can't assign mem (size 0x80000000)
- pci 0000:00:00.0: BAR 8: assigned [mem 0x60000000-0x600fffff]
- pci 0000:00:00.0: BAR 9: assigned [mem 0x60100000-0x601fffff pref]
- pci 0000:00:01.0: BAR 8: assigned [mem 0x60200000-0x602fffff]
- pci 0000:00:01.0: BAR 9: assigned [mem 0x60300000-0x603fffff pref]
- pci 0000:01:00.0: BAR 0: assigned [mem 0x60000000-0x600fffff 64bit]
- pci 0000:01:00.0: BAR 6: assigned [mem 0x60100000-0x6010ffff pref]
- pci 0000:00:00.0: PCI bridge to [bus 01-01]
- pci 0000:00:00.0: bridge window [mem 0x60000000-0x600fffff]
- pci 0000:00:00.0: bridge window [mem 0x60100000-0x601fffff pref]
- pci 0000:02:00.0: BAR 0: assigned [mem 0x60200000-0x602fffff 64bit]
- pci 0000:02:00.0: BAR 6: assigned [mem 0x60300000-0x6030ffff pref]
- pci 0000:00:01.0: PCI bridge to [bus 02-02]
- pci 0000:00:01.0: bridge window [mem 0x60200000-0x602fffff]
- pci 0000:00:01.0: bridge window [mem 0x60300000-0x603fffff pref]
- PCI: Enabling device 0000:00:00.0 (0000 -> 0002)
- PCI: Enabling device 0000:00:01.0 (0000 -> 0002)
- Switching to clocksource MIPS
- NET: Registered protocol family 2
- IP route cache hash table entries: 2048 (order: 1, 8192 bytes)
- TCP established hash table entries: 8192 (order: 4, 65536 bytes)
- TCP bind hash table entries: 8192 (order: 4, 65536 bytes)
- TCP: Hash tables configured (established 8192 bind 8192)
- TCP: reno registered
- UDP hash table entries: 128 (order: 0, 4096 bytes)
- NET: Registered protocol family 1
- 4 CPUs re-calibrate udelay (lpj = 1167360)
- squashfs: version 4.0 (2009/01/31) Phillip Lougher
- msgmni has been set to 499
- io scheduler noop registered (default)
- Serial: 8250/16550 driver, 1 ports, IRQ sharing disabled
- serial8250: ttyS0 at MMIO 0x1e000c00 (irq = 34) is a 16550A
- Ralink GPIO driver initialized. Number of GPIO: 64, GPIO mode: 000A05AC
- loop: module loaded
- MediaTek NAND driver init, version v2.1
- MTK NFI: NAND ID [01 F1, 80 1D 01 F1]
- MTK NFI: NAND chip found in MTK table: S34ML01G100TF
- NAND device: Manufacturer ID: 0x01, Chip ID: 0xf1 (AMD/Spansion NAND 128MiB 3,3V 8-bit), 128MiB, page size: 2048, OOB size: 64
- Scanning device for bad blocks
- MTK NFI: success load FACT_BBT from block 1023
- Creating 9 MTD partitions on "MT7621-NAND":
- 0x000000000000-0x000000080000 : "Bootloader"
- 0x000000080000-0x000000100000 : "BootEnv"
- 0x000000100000-0x000000180000 : "Factory"
- 0x000000180000-0x0000002c0000 : "Kernel"
- 0x0000002c0000-0x000001580000 : "RootFS"
- 0x000001580000-0x000001680000 : "Config"
- 0x000001680000-0x000001a80000 : "Storage"
- 0x000001a80000-0x000007f80000 : "RWFS"
- 0x000000180000-0x000001580000 : "Firmware_Stub"
- tun: Universal TUN/TAP device driver, 1.6
- tun: (C) 1999-2004 Max Krasnyansky <maxk@qualcomm.com>
- Ralink APSoC Ethernet Driver v3.2.4 (raeth)
- raeth: PDMA RX ring 512, QDMA TX pool 1024. Max packet size 1536
- raeth: NAPI & GRO support, weight 64
- raeth: Byte Queue Limits (BQL) support
- PPP generic driver version 2.4.2
- PPP MPPE Compression module registered
- NET: Registered protocol family 24
- PPTP driver version 0.8.5
- Realtek RTL8370M GSW Driver v3.1.
- rtl8367 - hw bridge: W|LLLLLLL
- usbcore: registered new interface driver libusual
- nf_conntrack version 0.5.0 (32768 buckets, 32768 max)
- xt_time: kernel timezone is -0000
- Bridge firewalling registered
- gre: GRE over IPv4 demultiplexor driver
- ip_tables: (C) 2000-2006 Netfilter Core Team
- TCP: cubic registered
- NET: Registered protocol family 10
- ip6_tables: (C) 2000-2006 Netfilter Core Team
- IPv6 over IPv4 tunneling driver
- NET: Registered protocol family 17
- L2TP core driver, V2.0
- PPPoL2TP kernel driver, V2.0
- 8021q: 802.1Q VLAN Support v1.8
- ASUS NVRAM, v0.08. Available space: 131072. Integrity: OK
- VFS: Mounted root (squashfs filesystem) readonly on device 31:4.
- Freeing unused kernel memory: 204k freed
- Algorithmics/MIPS FPU Emulator v1.5
- PCI: Enabling device 0000:01:00.0 (0000 -> 0002)
- MT76x2 AP Driver version: 3.0.5.0
- PCI: Enabling device 0000:02:00.0 (0000 -> 0002)
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