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  1. /dts-v1/;
  2.  
  3. / {
  4. model = "Amlogic";
  5. amlogic-dt-id = "gxl_p212_1g";
  6. compatible = "amlogic, Gxl";
  7. interrupt-parent = <0x1>;
  8. #address-cells = <0x1>;
  9. #size-cells = <0x1>;
  10.  
  11. mali@d00c0000 {
  12. #cooling-cells = <0x2>;
  13. compatible = "arm,mali-450";
  14. interrupt-parent = <0x1>;
  15. reg = <0xd00c0000 0x40000 0xc1104440 0x1000 0xc8100000 0x1000 0xc883c000 0x1000 0xc1104440 0x1000>;
  16. interrupts = <0x0 0xa0 0x4 0x0 0xa1 0x4 0x0 0xa2 0x4 0x0 0xa3 0x4 0x0 0xa4 0x4 0x0 0xa5 0x4 0x0 0xa6 0x4 0x0 0xa7 0x4 0x0 0xa8 0x4 0x0 0xa9 0x4>;
  17. interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP", "IRQPMU", "IRQPP0", "IRQPPMMU0", "IRQPP1", "IRQPPMMU1", "IRQPP2", "IRQPPMMU2";
  18. pmu_domain_config = <0x1 0x2 0x4 0x4 0x0 0x0 0x0 0x0 0x0 0x1 0x2 0x0>;
  19. pmu_switch_delay = <0xffff>;
  20. num_of_pp = <0x3>;
  21. def_clk = <0x4>;
  22. sc_mpp = <0x3>;
  23. tbl = <0x2 0x3 0x4 0x5 0x6 0x6>;
  24. clocks = <0x7 0x97 0x7 0x9>;
  25. clock-names = "gpu_mux", "gp0_pll";
  26. control_interval = <0xc8>;
  27. phandle = <0x7f>;
  28.  
  29. clk125_cfg {
  30. clk_freq = <0x7735940>;
  31. clk_parent = "fclk_div4";
  32. clkp_freq = <0x1dcd6500>;
  33. voltage = <0x47e>;
  34. keep_count = <0x5>;
  35. threshold = <0x1e 0xfa>;
  36. phandle = <0x2>;
  37. };
  38.  
  39. clk250_cfg {
  40. clk_freq = <0xee6b280>;
  41. clk_parent = "fclk_div4";
  42. clkp_freq = <0x1dcd6500>;
  43. voltage = <0x47e>;
  44. keep_count = <0x5>;
  45. threshold = <0x73 0xfa>;
  46. phandle = <0x80>;
  47. };
  48.  
  49. clk285_cfg {
  50. clk_freq = <0x1107a76d>;
  51. clk_parent = "fclk_div7";
  52. clkp_freq = <0x1107a76d>;
  53. voltage = <0x47e>;
  54. keep_count = <0x5>;
  55. threshold = <0x64 0xfa>;
  56. phandle = <0x3>;
  57. };
  58.  
  59. clk400_cfg {
  60. clk_freq = <0x17d78400>;
  61. clk_parent = "fclk_div5";
  62. clkp_freq = <0x17d78400>;
  63. voltage = <0x47e>;
  64. keep_count = <0x3>;
  65. threshold = <0xa8 0xfa>;
  66. phandle = <0x4>;
  67. };
  68.  
  69. clk500_cfg {
  70. clk_freq = <0x1dcd6500>;
  71. clk_parent = "fclk_div4";
  72. clkp_freq = <0x1dcd6500>;
  73. voltage = <0x47e>;
  74. keep_count = <0x2>;
  75. threshold = <0xbe 0xfa>;
  76. phandle = <0x5>;
  77. };
  78.  
  79. clk666_cfg {
  80. clk_freq = <0x27bc86aa>;
  81. clk_parent = "fclk_div3";
  82. clkp_freq = <0x27bc86aa>;
  83. voltage = <0x47e>;
  84. keep_count = <0x1>;
  85. threshold = <0xb1 0xfa>;
  86. phandle = <0x6>;
  87. };
  88.  
  89. clk750_cfg {
  90. clk_freq = <0x2c588a00>;
  91. clk_parent = "gp0_pll";
  92. clkp_freq = <0x2c588a00>;
  93. voltage = <0x47e>;
  94. keep_count = <0x1>;
  95. threshold = <0xd5 0xff>;
  96. phandle = <0x81>;
  97. };
  98.  
  99. clk800_cfg {
  100. clk_freq = <0x2f34f600>;
  101. clk_parent = "gp0_pll";
  102. clkp_freq = <0x2f34f600>;
  103. voltage = <0x47e>;
  104. keep_count = <0x1>;
  105. threshold = <0xe6 0xff>;
  106. phandle = <0x82>;
  107. };
  108. };
  109.  
  110. cpus {
  111. #address-cells = <0x1>;
  112. #size-cells = <0x0>;
  113. phandle = <0x83>;
  114.  
  115. cpu-map {
  116.  
  117. cluster0 {
  118. phandle = <0x84>;
  119.  
  120. core0 {
  121. cpu = <0x8>;
  122. };
  123.  
  124. core1 {
  125. cpu = <0x9>;
  126. };
  127.  
  128. core2 {
  129. cpu = <0xa>;
  130. };
  131.  
  132. core3 {
  133. cpu = <0xb>;
  134. };
  135. };
  136. };
  137.  
  138. cpu@0 {
  139. device_type = "cpu";
  140. compatible = "arm,cortex-a53", "arm,armv8";
  141. reg = <0x0>;
  142. enable-method = "psci";
  143. clocks = <0xc 0x0>;
  144. clock-names = "cpu-cluster.0";
  145. cpu-idle-states = <0xd>;
  146. phandle = <0x8>;
  147. };
  148.  
  149. cpu@1 {
  150. device_type = "cpu";
  151. compatible = "arm,cortex-a53", "arm,armv8";
  152. reg = <0x1>;
  153. enable-method = "psci";
  154. clocks = <0xc 0x0>;
  155. clock-names = "cpu-cluster.0";
  156. cpu-idle-states = <0xd>;
  157. phandle = <0x9>;
  158. };
  159.  
  160. cpu@2 {
  161. device_type = "cpu";
  162. compatible = "arm,cortex-a53", "arm,armv8";
  163. reg = <0x2>;
  164. enable-method = "psci";
  165. clocks = <0xc 0x0>;
  166. clock-names = "cpu-cluster.0";
  167. cpu-idle-states = <0xd>;
  168. phandle = <0xa>;
  169. };
  170.  
  171. cpu@3 {
  172. device_type = "cpu";
  173. compatible = "arm,cortex-a53", "arm,armv8";
  174. reg = <0x3>;
  175. enable-method = "psci";
  176. clocks = <0xc 0x0>;
  177. clock-names = "cpu-cluster.0";
  178. cpu-idle-states = <0xd>;
  179. phandle = <0xb>;
  180. };
  181.  
  182. idle-states {
  183. entry-method = "arm,psci";
  184.  
  185. system-sleep-0 {
  186. compatible = "arm,idle-state";
  187. arm,psci-suspend-param = <0x20000>;
  188. local-timer-stop;
  189. entry-latency-us = <0x3fffffff>;
  190. exit-latency-us = <0x40000000>;
  191. min-residency-us = <0xffffffff>;
  192. phandle = <0xd>;
  193. };
  194. };
  195. };
  196.  
  197. timer {
  198. compatible = "arm,armv7-timer";
  199. interrupts = <0x1 0xd 0xff08 0x1 0xe 0xff08 0x1 0xb 0xff08 0x1 0xa 0xff08>;
  200. };
  201.  
  202. timer_bc {
  203. compatible = "arm, meson-bc-timer";
  204. reg = <0xc1109990 0x4 0xc1109994 0x4>;
  205. timer_name = "Meson TimerF";
  206. clockevent-rating = <0x12c>;
  207. clockevent-shift = <0x14>;
  208. clockevent-features = <0x23>;
  209. interrupts = <0x0 0x3c 0x1>;
  210. bit_enable = <0x10>;
  211. bit_mode = <0xc>;
  212. bit_resolution = <0x0>;
  213. };
  214.  
  215. arm_pmu {
  216. compatible = "arm,cortex-a15-pmu";
  217. interrupts = <0x0 0x89 0x4>;
  218. reg = <0xc8834680 0x4>;
  219. cpumasks = <0xf>;
  220. relax-timer-ns = <0x989680>;
  221. max-wait-cnt = <0x2710>;
  222. };
  223.  
  224. interrupt-controller@2c001000 {
  225. compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
  226. #interrupt-cells = <0x3>;
  227. #address-cells = <0x0>;
  228. interrupt-controller;
  229. reg = <0xc4301000 0x1000 0xc4302000 0x100>;
  230. interrupts = <0x1 0x9 0xf04>;
  231. phandle = <0x1>;
  232. };
  233.  
  234. psci {
  235. compatible = "arm,psci-0.2";
  236. method = "smc";
  237. };
  238.  
  239. pm {
  240. compatible = "amlogic, pm";
  241. device_name = "aml_pm";
  242. reg = <0xc81000a8 0x4 0xc810023c 0x4>;
  243. phandle = <0x85>;
  244. };
  245.  
  246. secmon {
  247. compatible = "amlogic, secmon";
  248. memory-region = <0xe>;
  249. in_base_func = <0x82000020>;
  250. out_base_func = <0x82000021>;
  251. reserve_mem_size = <0x300000>;
  252. };
  253.  
  254. vcodec_dec {
  255. compatible = "amlogic, vcodec-dec";
  256. dev_name = "aml-vcodec-dec";
  257. status = "okay";
  258. };
  259.  
  260. securitykey {
  261. compatible = "aml, securitykey";
  262. storage_query = <0x82000060>;
  263. storage_read = <0x82000061>;
  264. storage_write = <0x82000062>;
  265. storage_tell = <0x82000063>;
  266. storage_verify = <0x82000064>;
  267. storage_status = <0x82000065>;
  268. storage_list = <0x82000067>;
  269. storage_remove = <0x82000068>;
  270. storage_in_func = <0x82000023>;
  271. storage_out_func = <0x82000024>;
  272. storage_block_func = <0x82000025>;
  273. storage_size_func = <0x82000027>;
  274. storage_set_enctype = <0x8200006a>;
  275. storage_get_enctype = <0x8200006b>;
  276. storage_version = <0x8200006c>;
  277. };
  278.  
  279. cpu_iomap {
  280. compatible = "amlogic, iomap";
  281. #address-cells = <0x1>;
  282. #size-cells = <0x1>;
  283. ranges;
  284.  
  285. io_cbus_base {
  286. reg = <0xc1100000 0x100000>;
  287. };
  288.  
  289. io_apb_base {
  290. reg = <0xd0050000 0x50000>;
  291. };
  292.  
  293. io_aobus_base {
  294. reg = <0xc8100000 0x100000>;
  295. };
  296.  
  297. io_vapb_base {
  298. reg = <0xd0100000 0x100000>;
  299. };
  300.  
  301. io_hiu_base {
  302. reg = <0xc883c000 0x2000>;
  303. };
  304. };
  305.  
  306. cpu_info {
  307. compatible = "amlogic, cpuinfo";
  308. cpuinfo_cmd = <0x82000044>;
  309. status = "okay";
  310. };
  311.  
  312. watchdog@0xffd0f0d0 {
  313. compatible = "amlogic, meson-wdt";
  314. status = "okay";
  315. default_timeout = <0xa>;
  316. reset_watchdog_method = <0x1>;
  317. reset_watchdog_time = <0x2>;
  318. shutdown_timeout = <0xa>;
  319. firmware_timeout = <0x6>;
  320. suspend_timeout = <0x6>;
  321. reg = <0xc11098d0 0x10>;
  322. clock-names = "xtal";
  323. clocks = <0xf>;
  324. phandle = <0x86>;
  325. };
  326.  
  327. ram-dump {
  328. compatible = "amlogic, ram_dump";
  329. status = "okay";
  330. };
  331.  
  332. jtag {
  333. compatible = "amlogic, jtag";
  334. status = "okay";
  335. select = "apao";
  336. jtagao-gpios = <0x10 0x16 0x0 0x10 0x17 0x0 0x10 0x18 0x0 0x10 0x19 0x0>;
  337. jtagee-gpios = <0x10 0x2a 0x0 0x10 0x2b 0x0 0x10 0x2c 0x0 0x10 0x2d 0x0>;
  338. };
  339.  
  340. mhu@c883c400 {
  341. compatible = "amlogic, meson_mhu";
  342. reg = <0xc883c400 0x4c 0xc8013000 0x800>;
  343. interrupts = <0x0 0xd1 0x1 0x0 0xd2 0x1>;
  344. #mbox-cells = <0x1>;
  345. mbox-names = "cpu_to_scp_low", "cpu_to_scp_high";
  346. mboxes = <0x11 0x0 0x11 0x1>;
  347. phandle = <0x11>;
  348. };
  349.  
  350. scpi_clocks {
  351. compatible = "arm, scpi-clks";
  352.  
  353. scpi_clocks@0 {
  354. compatible = "arm, scpi-clk-indexed";
  355. #clock-cells = <0x1>;
  356. clock-indices = <0x0>;
  357. clock-output-names = "vcpu";
  358. phandle = <0xc>;
  359. };
  360. };
  361.  
  362. xtal-clk {
  363. compatible = "fixed-clock";
  364. clock-frequency = <0x16e3600>;
  365. clock-output-names = "xtal";
  366. #clock-cells = <0x0>;
  367. phandle = <0xf>;
  368. };
  369.  
  370. vpu {
  371. compatible = "amlogic, vpu-gxl";
  372. dev_name = "vpu";
  373. status = "okay";
  374. clocks = <0x7 0xc4 0x7 0x59 0x7 0x9 0x7 0xb6 0x7 0xba 0x7 0xbb>;
  375. clock-names = "vapb_clk", "vpu_intr_gate", "gp_pll", "vpu_clk0", "vpu_clk1", "vpu_clk";
  376. clk_level = <0x7>;
  377. };
  378.  
  379. @c1108d80 {
  380. compatible = "amlogic, spicc";
  381. status = "disabled";
  382. reg = <0xc1108d80 0x28>;
  383. clocks = <0x7 0x1e>;
  384. clock-names = "spicc_clk";
  385. interrupts = <0x0 0x51 0x1>;
  386. device_id = <0x0>;
  387. pinctrl-names = "spicc_pulldown", "spicc_pullup";
  388. pinctrl-0 = <0x12>;
  389. pinctrl-1 = <0x13>;
  390. num_chipselect = <0x1>;
  391. cs-gpios = <0x10 0x59 0x0>;
  392. dma_en = <0x0>;
  393. dma_tx_threshold = <0x3>;
  394. dma_rx_threshold = <0x3>;
  395. dma_num_per_read_burst = <0x3>;
  396. dma_num_per_write_burst = <0x3>;
  397. delay_control = <0x15>;
  398. ssctl = <0x0>;
  399. phandle = <0x87>;
  400. };
  401.  
  402. serial@c81004c0 {
  403. compatible = "amlogic, meson-uart";
  404. reg = <0xc81004c0 0x18>;
  405. interrupts = <0x0 0xc1 0x1>;
  406. status = "okay";
  407. clocks = <0xf>;
  408. clock-names = "clk_uart";
  409. xtal_tick_en = <0x1>;
  410. fifosize = <0x40>;
  411. pinctrl-names = "default";
  412. support-sysrq = <0x0>;
  413. phandle = <0x88>;
  414. };
  415.  
  416. serial@c11084c0 {
  417. compatible = "amlogic, meson-uart";
  418. reg = <0xc11084c0 0x18>;
  419. interrupts = <0x0 0x1a 0x1>;
  420. status = "okay";
  421. clocks = <0x7 0x23>;
  422. clock-names = "clk_uart";
  423. fifosize = <0x80>;
  424. pinctrl-names = "default";
  425. pinctrl-0 = <0x14>;
  426. phandle = <0x89>;
  427. };
  428.  
  429. serial@c11084dc {
  430. compatible = "amlogic, meson-uart";
  431. reg = <0xc11084dc 0x18>;
  432. interrupts = <0x0 0x4b 0x1>;
  433. status = "disabled";
  434. clocks = <0x7 0x40>;
  435. clock-names = "clk_uart";
  436. fifosize = <0x40>;
  437. pinctrl-names = "default";
  438. pinctrl-0 = <0x15>;
  439. phandle = <0x8a>;
  440. };
  441.  
  442. serial@c1108700 {
  443. compatible = "amlogic, meson-uart";
  444. reg = <0xc1108700 0x18>;
  445. interrupts = <0x0 0x5d 0x1>;
  446. status = "disabled";
  447. clocks = <0x7 0x57>;
  448. clock-names = "clk_uart";
  449. fifosize = <0x40>;
  450. pinctrl-names = "default";
  451. pinctrl-0 = <0x16>;
  452. phandle = <0x8b>;
  453. };
  454.  
  455. serial@c81004e0 {
  456. compatible = "amlogic, meson-uart";
  457. reg = <0xc81004e0 0x18>;
  458. interrupts = <0x0 0xc5 0x1>;
  459. status = "disable";
  460. clocks = <0xf>;
  461. clock-names = "clk_uart";
  462. fifosize = <0x40>;
  463. pinctrl-names = "default";
  464. pinctrl-0 = <0x17>;
  465. phandle = <0x8c>;
  466. };
  467.  
  468. pinctrl@14 {
  469. compatible = "amlogic,meson-gxl-aobus-pinctrl";
  470. #address-cells = <0x1>;
  471. #size-cells = <0x1>;
  472. ranges;
  473. phandle = <0x8d>;
  474.  
  475. bank@14 {
  476. reg = <0xc8100014 0x8 0xc810002c 0x4 0xc8100024 0x8>;
  477. reg-names = "mux", "pull", "gpio";
  478. gpio-controller;
  479. #gpio-cells = <0x2>;
  480. phandle = <0x56>;
  481. };
  482.  
  483. remote_pin {
  484. phandle = <0x1d>;
  485.  
  486. mux {
  487. groups = "remote_input";
  488. function = "remote";
  489. };
  490. };
  491.  
  492. sd_to_ao_uart_clr_pins {
  493. phandle = <0x3d>;
  494.  
  495. mux {
  496. groups = "GPIOAO_0", "GPIOAO_1";
  497. function = "gpio_aobus";
  498. };
  499. };
  500.  
  501. sd_to_ao_uart_pins {
  502. phandle = <0x3f>;
  503.  
  504. mux {
  505. groups = "uart_tx_ao_a_0", "uart_rx_ao_a_0";
  506. function = "uart_ao";
  507. bias-pull-up;
  508. input-enable;
  509. };
  510. };
  511.  
  512. ao_uart {
  513. phandle = <0x8e>;
  514.  
  515. mux {
  516. groups = "uart_tx_ao_a_0", "uart_rx_ao_a_0";
  517. function = "uart_ao";
  518. };
  519. };
  520.  
  521. ao_b_uart {
  522. phandle = <0x17>;
  523.  
  524. mux {
  525. groups = "uart_tx_ao_b_0", "uart_rx_ao_b_0";
  526. function = "uart_ao_b";
  527. };
  528. };
  529.  
  530. ao_i2c {
  531. phandle = <0x8f>;
  532.  
  533. mux {
  534. groups = "i2c_sda_ao", "i2c_sck_ao";
  535. function = "i2c_ao";
  536. };
  537. };
  538.  
  539. hdmitx_aocec {
  540. phandle = <0x53>;
  541.  
  542. mux {
  543. groups = "ao_cec";
  544. function = "ao_cec";
  545. };
  546. };
  547.  
  548. hdmitx_eecec {
  549. phandle = <0x90>;
  550.  
  551. mux {
  552. groups = "ee_cec";
  553. function = "ee_cec";
  554. };
  555. };
  556. };
  557.  
  558. pinctrl@4b0 {
  559. compatible = "amlogic,meson-gxl-periphs-pinctrl";
  560. #address-cells = <0x1>;
  561. #size-cells = <0x1>;
  562. ranges;
  563. phandle = <0x91>;
  564.  
  565. bank@4b0 {
  566. reg = <0xc88344b0 0x28 0xc88344e8 0x14 0xc8834520 0x14 0xc8834430 0x40>;
  567. reg-names = "mux", "pull", "pull-enable", "gpio";
  568. gpio-controller;
  569. #gpio-cells = <0x2>;
  570. phandle = <0x10>;
  571. };
  572.  
  573. external_eth_pins {
  574. phandle = <0x47>;
  575.  
  576. mux {
  577. groups = "eth_mdio", "eth_mdc", "eth_clk_rx_clk", "eth_rx_dv", "eth_rxd0", "eth_rxd1", "eth_rxd2", "eth_rxd3", "eth_rgmii_tx_clk", "eth_tx_en", "eth_txd0", "eth_txd1", "eth_txd2", "eth_txd3";
  578. function = "eth";
  579. };
  580. };
  581.  
  582. jtag_apao_pin {
  583. phandle = <0x92>;
  584.  
  585. mux {
  586. groups = "jtag_tdi_0", "jtag_tdo_0", "jtag_clk_0", "jtag_tms_0";
  587. function = "jtag";
  588. };
  589. };
  590.  
  591. jtag_apee_pin {
  592. phandle = <0x93>;
  593.  
  594. mux {
  595. groups = "jtag_tdi_1", "jtag_tdo_1", "jtag_clk_1", "jtag_tms_1";
  596. function = "jtag";
  597. };
  598. };
  599.  
  600. a_uart {
  601. phandle = <0x14>;
  602.  
  603. mux {
  604. groups = "uart_tx_a", "uart_rx_a", "uart_cts_a", "uart_rts_a";
  605. function = "uart_a";
  606. };
  607. };
  608.  
  609. b_uart {
  610. phandle = <0x15>;
  611.  
  612. mux {
  613. groups = "uart_tx_b", "uart_rx_b", "uart_cts_b", "uart_rts_b";
  614. function = "uart_b";
  615. };
  616. };
  617.  
  618. c_uart {
  619. phandle = <0x16>;
  620.  
  621. mux {
  622. groups = "uart_tx_c", "uart_rx_c", "uart_cts_c", "uart_rts_c";
  623. function = "uart_c";
  624. };
  625. };
  626.  
  627. wifi_32k_pins {
  628. phandle = <0x34>;
  629.  
  630. mux {
  631. groups = "pwm_e";
  632. function = "pwm_e";
  633. };
  634. };
  635.  
  636. ao_to_sd_uart_clr_pins {
  637. phandle = <0x94>;
  638.  
  639. mux {
  640. groups = "sdcard_d2", "sdcard_d3";
  641. function = "sdcard";
  642. input-enable;
  643. bias-pull-up;
  644. };
  645. };
  646.  
  647. sd_1bit_pins {
  648. phandle = <0x3c>;
  649.  
  650. mux {
  651. groups = "sdcard_d0", "sdcard_cmd", "sdcard_clk";
  652. function = "sdcard";
  653. input-enable;
  654. bias-pull-up;
  655. };
  656. };
  657.  
  658. ao_to_sd_uart_pins {
  659. phandle = <0x3e>;
  660.  
  661. mux {
  662. groups = "uart_tx_ao_a_card4", "uart_rx_ao_a_card5";
  663. function = "uart_ao_a_card";
  664. bias-pull-up;
  665. input-enable;
  666. };
  667. };
  668.  
  669. emmc_clk_cmd_pins {
  670. phandle = <0x37>;
  671.  
  672. mux {
  673. groups = "emmc_cmd", "emmc_clk";
  674. function = "emmc";
  675. input-enable;
  676. bias-pull-up;
  677. };
  678. };
  679.  
  680. emmc_conf_pull_up {
  681. phandle = <0x38>;
  682.  
  683. mux {
  684. groups = "emmc_nand_d07", "emmc_clk", "emmc_cmd";
  685. function = "emmc";
  686. input-enable;
  687. bias-pull-up;
  688. };
  689. };
  690.  
  691. emmc_conf_pull_done {
  692. phandle = <0x39>;
  693.  
  694. mux {
  695. groups = "emmc_ds";
  696. function = "emmc";
  697. input-enable;
  698. bias-pull-down;
  699. };
  700. };
  701.  
  702. sd_clk_cmd_pins {
  703. phandle = <0x3b>;
  704.  
  705. mux {
  706. groups = "sdcard_cmd", "sdcard_clk";
  707. function = "sdcard";
  708. input-enable;
  709. bias-pull-up;
  710. };
  711. };
  712.  
  713. sd_all_pins {
  714. phandle = <0x3a>;
  715.  
  716. mux {
  717. groups = "sdcard_d0", "sdcard_d1", "sdcard_d2", "sdcard_d3", "sdcard_cmd", "sdcard_clk";
  718. function = "sdcard";
  719. input-enable;
  720. bias-pull-up;
  721. };
  722. };
  723.  
  724. sdio_clk_cmd_pins {
  725. phandle = <0x40>;
  726.  
  727. mux {
  728. groups = "sdio_clk", "sdio_cmd";
  729. function = "sdio";
  730. input-enable;
  731. bias-pull-up;
  732. };
  733. };
  734.  
  735. sdio_all_pins {
  736. phandle = <0x41>;
  737.  
  738. mux {
  739. groups = "sdio_d0", "sdio_d1", "sdio_d2", "sdio_d3", "sdio_clk", "sdio_cmd";
  740. function = "sdio";
  741. input-enable;
  742. bias-pull-up;
  743. };
  744. };
  745.  
  746. sd_iso7816_pins {
  747. phandle = <0x95>;
  748.  
  749. mux {
  750. groups = "iso7816_clk_dv", "iso7816_data_dv";
  751. function = "iso7816";
  752. input-enable;
  753. bias-pull-down;
  754. };
  755. };
  756.  
  757. nand_pulldown {
  758. phandle = <0x96>;
  759.  
  760. mux {
  761. groups = "emmc_nand_d07", "emmc_ds";
  762. function = "emmc";
  763. bias-pull-down;
  764. };
  765. };
  766.  
  767. nand_pullup {
  768. phandle = <0x97>;
  769.  
  770. mux {
  771. groups = "emmc_clk", "emmc_cmd";
  772. function = "emmc";
  773. bias-pull-up;
  774. };
  775. };
  776.  
  777. all_nand_pins {
  778. phandle = <0x42>;
  779.  
  780. mux {
  781. groups = "emmc_nand_d07", "nand_ce0", "nand_ce1", "nand_rb0", "nand_ale", "nand_cle", "nand_wen_clk", "nand_ren_wr", "nand_dqs";
  782. function = "nand";
  783. input-enable;
  784. };
  785. };
  786.  
  787. nand_cs {
  788. phandle = <0x43>;
  789.  
  790. mux {
  791. groups = "nand_ce0", "nand_ce1";
  792. function = "nand";
  793. };
  794. };
  795.  
  796. hdmitx_hpd {
  797. phandle = <0x51>;
  798.  
  799. mux {
  800. groups = "hdmi_hpd";
  801. function = "hdmi_hpd";
  802. };
  803. };
  804.  
  805. hdmitx_ddc {
  806. phandle = <0x52>;
  807.  
  808. mux {
  809. groups = "hdmi_sda", "hdmi_scl";
  810. function = "hdmi_ddc";
  811. };
  812. };
  813.  
  814. a_i2c {
  815. phandle = <0x98>;
  816.  
  817. mux {
  818. groups = "i2c_sda_a", "i2c_scl_a";
  819. function = "i2c_a";
  820. };
  821. };
  822.  
  823. b_i2c {
  824. phandle = <0x99>;
  825.  
  826. mux {
  827. groups = "i2c_sda_b", "i2c_scl_b";
  828. function = "i2c_b";
  829. };
  830. };
  831.  
  832. c_i2c {
  833. phandle = <0x9a>;
  834.  
  835. mux {
  836. groups = "i2c_sda_c_dv28", "i2c_scl_c_dv29";
  837. function = "i2c_c";
  838. };
  839. };
  840.  
  841. c_i2c_pin1 {
  842. phandle = <0x9b>;
  843.  
  844. mux {
  845. groups = "i2c_sda_c_dv18", "i2c_scl_c_dv19";
  846. function = "i2c_c";
  847. };
  848. };
  849.  
  850. d_i2c {
  851. phandle = <0x9c>;
  852.  
  853. mux {
  854. groups = "i2c_sda_d", "i2c_scl_d";
  855. function = "i2c_d";
  856. };
  857. };
  858.  
  859. spicc_pulldown_z11z12z13 {
  860. phandle = <0x9d>;
  861.  
  862. mux {
  863. groups = "spi_sclk_0", "spi_miso_0", "spi_mosi_0";
  864. function = "spi";
  865. };
  866. };
  867.  
  868. spicc_pullup_z11z12z13 {
  869. phandle = <0x9e>;
  870.  
  871. mux {
  872. groups = "spi_sclk_0", "spi_miso_0", "spi_mosi_0";
  873. function = "spi";
  874. };
  875. };
  876.  
  877. spicc_pulldown_x8x9x11 {
  878. phandle = <0x12>;
  879.  
  880. mux {
  881. groups = "spi_sclk_1", "spi_miso_1", "spi_mosi_1";
  882. function = "spi";
  883. bias-pull-down;
  884. };
  885. };
  886.  
  887. spicc_pullup_x8x9x11 {
  888. phandle = <0x13>;
  889.  
  890. mux {
  891. groups = "spi_sclk_1", "spi_miso_1", "spi_mosi_1";
  892. function = "spi";
  893. bias-pull-up;
  894. };
  895. };
  896.  
  897. audio_i2s {
  898. phandle = <0x5b>;
  899.  
  900. mux {
  901. groups = "i2s_am_clk", "i2s_ao_clk_out", "i2s_lr_clk_out", "i2sout_ch01";
  902. function = "i2s";
  903. };
  904. };
  905.  
  906. audio_spdif {
  907. phandle = <0x5a>;
  908.  
  909. mux {
  910. groups = "spdif_out";
  911. function = "spdif_out";
  912. };
  913. };
  914.  
  915. audio_spdif_in {
  916. phandle = <0x9f>;
  917.  
  918. mux {
  919. groups = "spdif_in_z14";
  920. function = "spdif_in";
  921. };
  922. };
  923.  
  924. audio_spdif_in_1 {
  925. phandle = <0xa0>;
  926.  
  927. mux {
  928. groups = "spdif_in_h4";
  929. function = "spdif_in";
  930. };
  931. };
  932.  
  933. audio_pcm {
  934. phandle = <0x59>;
  935.  
  936. mux {
  937. groups = "pcm_out_a", "pcm_in_a", "pcm_fs_a", "pcm_clk_a";
  938. function = "pcm_a";
  939. };
  940. };
  941.  
  942. audio_dmic {
  943. phandle = <0x58>;
  944.  
  945. mux {
  946. groups = "dmic_in_dv24", "dmic_clk_dv25";
  947. function = "dmic";
  948. };
  949. };
  950.  
  951. dvb_p_ts0_pins {
  952. phandle = <0xa1>;
  953.  
  954. tsin_a {
  955. groups = "tsin_sop_a_dv9", "tsin_d_valid_a_dv10", "tsin_d0_a_dv0", "tsin_d1_7_a_dv1_7", "tsin_clk_a_dv8";
  956. function = "tsin_a";
  957. };
  958. };
  959.  
  960. dvb_s_ts0_pins {
  961. phandle = <0xa2>;
  962.  
  963. tsin_a {
  964. groups = "tsin_sop_a_dv9", "tsin_d_valid_a_dv10", "tsin_clk_a_dv8", "tsin_d0_a_dv0";
  965. function = "tsin_a";
  966. };
  967. };
  968.  
  969. lcd_ttl_rgb_6bit_on {
  970. phandle = <0xa3>;
  971.  
  972. mux {
  973. groups = "lcd_r2_7", "lcd_g2_7", "lcd_b2_7";
  974. function = "lcd_ttl";
  975. };
  976. };
  977.  
  978. lcd_ttl_rgb_6bit_off {
  979. phandle = <0xa4>;
  980.  
  981. mux {
  982. groups = "GPIODV_2", "GPIODV_3", "GPIODV_4", "GPIODV_5", "GPIODV_6", "GPIODV_7", "GPIODV_10", "GPIODV_11", "GPIODV_12", "GPIODV_13", "GPIODV_14", "GPIODV_15", "GPIODV_18", "GPIODV_19", "GPIODV_20", "GPIODV_21", "GPIODV_22", "GPIODV_23";
  983. function = "gpio_periphs";
  984. input-enable;
  985. };
  986. };
  987.  
  988. lcd_ttl_rgb_8bit_on {
  989. phandle = <0xa5>;
  990.  
  991. mux {
  992. groups = "lcd_r0_1", "lcd_r2_7", "lcd_g0_1", "lcd_g2_7", "lcd_b0_1", "lcd_b2_7";
  993. function = "lcd_ttl";
  994. };
  995. };
  996.  
  997. lcd_ttl_rgb_8bit_off {
  998. phandle = <0xa6>;
  999.  
  1000. mux {
  1001. groups = "GPIODV_0", "GPIODV_1", "GPIODV_2", "GPIODV_3", "GPIODV_4", "GPIODV_5", "GPIODV_6", "GPIODV_7", "GPIODV_8", "GPIODV_9", "GPIODV_10", "GPIODV_11", "GPIODV_12", "GPIODV_13", "GPIODV_14", "GPIODV_15", "GPIODV_16", "GPIODV_17", "GPIODV_18", "GPIODV_19", "GPIODV_20", "GPIODV_21", "GPIODV_22", "GPIODV_23";
  1002. function = "gpio_periphs";
  1003. input-enable;
  1004. };
  1005. };
  1006.  
  1007. lcd_ttl_de_on_pin {
  1008. phandle = <0xa7>;
  1009.  
  1010. mux {
  1011. groups = "tcon_cph", "tcon_oeh";
  1012. function = "lcd_ttl";
  1013. };
  1014. };
  1015.  
  1016. lcd_ttl_hvsync_on_pin {
  1017. phandle = <0xa8>;
  1018.  
  1019. mux {
  1020. groups = "tcon_cph", "tcon_stv1", "tcon_sth1";
  1021. function = "lcd_ttl";
  1022. };
  1023. };
  1024.  
  1025. lcd_ttl_de_hvsync_on_pin {
  1026. phandle = <0xa9>;
  1027.  
  1028. mux {
  1029. groups = "tcon_cph", "tcon_oeh", "tcon_stv1", "tcon_sth1";
  1030. function = "lcd_ttl";
  1031. };
  1032. };
  1033.  
  1034. lcd_ttl_de_hvsync_off_pin {
  1035. phandle = <0xaa>;
  1036.  
  1037. mux {
  1038. groups = "GPIODV_26", "GPIODV_27", "GPIODV_24", "GPIODV_25";
  1039. function = "gpio_periphs";
  1040. input-enable;
  1041. };
  1042. };
  1043. };
  1044.  
  1045. soc {
  1046. compatible = "simple-bus";
  1047. #address-cells = <0x1>;
  1048. #size-cells = <0x1>;
  1049. ranges;
  1050.  
  1051. cbus@c1100000 {
  1052. compatible = "simple-bus";
  1053. reg = <0xc1100000 0x100000>;
  1054. #address-cells = <0x1>;
  1055. #size-cells = <0x1>;
  1056. ranges = <0x0 0xc1100000 0x100000>;
  1057. phandle = <0xab>;
  1058.  
  1059. interrupt-controller@9880 {
  1060. compatible = "amlogic,meson-gpio-intc", "amlogic,meson-gxl-gpio-intc";
  1061. reg = <0x9880 0x10>;
  1062. interrupt-controller;
  1063. #interrupt-cells = <0x2>;
  1064. amlogic,channel-interrupts = <0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47>;
  1065. status = "okay";
  1066. phandle = <0xac>;
  1067. };
  1068.  
  1069. meson_clk_msr {
  1070. compatible = "amlogic, gxl_measure";
  1071. reg = <0x875c 0x4 0x8764 0x4>;
  1072. };
  1073.  
  1074. i2c@8500 {
  1075. compatible = "amlogic,meson-gx-i2c";
  1076. status = "disabled";
  1077. reg = <0x8500 0x20>;
  1078. interrupts = <0x0 0x15 0x1 0x0 0x2f 0x1>;
  1079. #address-cells = <0x1>;
  1080. #size-cells = <0x0>;
  1081. clocks = <0x7 0x1f>;
  1082. clock-names = "clk_i2c";
  1083. phandle = <0xad>;
  1084. };
  1085.  
  1086. i2c@87c0 {
  1087. compatible = "amlogic,meson-gx-i2c";
  1088. status = "disabled";
  1089. reg = <0x87c0 0x20>;
  1090. interrupts = <0x0 0xd6 0x1 0x0 0x30 0x1>;
  1091. #address-cells = <0x1>;
  1092. #size-cells = <0x0>;
  1093. clocks = <0x7 0x1f>;
  1094. clock-names = "clk_i2c";
  1095. phandle = <0xae>;
  1096. };
  1097.  
  1098. i2c@87e0 {
  1099. compatible = "amlogic,meson-gx-i2c";
  1100. status = "disabled";
  1101. reg = <0x87e0 0x20>;
  1102. interrupts = <0x0 0xd7 0x1 0x0 0x31 0x1>;
  1103. #address-cells = <0x1>;
  1104. #size-cells = <0x0>;
  1105. clocks = <0x7 0x1f>;
  1106. clock-names = "clk_i2c";
  1107. phandle = <0xaf>;
  1108. };
  1109.  
  1110. i2c@8d20 {
  1111. compatible = "amlogic,meson-gx-i2c";
  1112. status = "disabled";
  1113. reg = <0x8d20 0x20>;
  1114. interrupts = <0x0 0x27 0x1 0x0 0x32 0x1>;
  1115. #address-cells = <0x1>;
  1116. #size-cells = <0x0>;
  1117. clocks = <0x7 0x1f>;
  1118. clock-names = "clk_i2c";
  1119. phandle = <0xb0>;
  1120. };
  1121.  
  1122. reset-controller@4404 {
  1123. compatible = "amlogic,reset";
  1124. reg = <0x4404 0x20>;
  1125. #reset-cells = <0x1>;
  1126. phandle = <0xb1>;
  1127. };
  1128. };
  1129.  
  1130. aobus@c8100000 {
  1131. compatible = "simple-bus";
  1132. reg = <0xc8100000 0x100000>;
  1133. #address-cells = <0x1>;
  1134. #size-cells = <0x1>;
  1135. ranges = <0x0 0xc8100000 0x100000>;
  1136. phandle = <0xb2>;
  1137.  
  1138. cpu_version {
  1139. reg = <0x220 0x4>;
  1140. };
  1141.  
  1142. i2c@0500 {
  1143. compatible = "amlogic,meson-gx-i2c";
  1144. status = "disabled";
  1145. reg = <0x500 0x20>;
  1146. interrupts = <0x0 0xc3 0x1>;
  1147. #address-cells = <0x1>;
  1148. #size-cells = <0x0>;
  1149. clocks = <0x7 0x1f>;
  1150. clock-names = "clk_i2c";
  1151. phandle = <0xb3>;
  1152. };
  1153. };
  1154.  
  1155. periphs@c8834000 {
  1156. compatible = "simple-bus";
  1157. reg = <0xc8834000 0x2000>;
  1158. #address-cells = <0x1>;
  1159. #size-cells = <0x1>;
  1160. ranges = <0x0 0xc8834000 0x2000>;
  1161. phandle = <0xb4>;
  1162.  
  1163. rng {
  1164. compatible = "amlogic,meson-rng";
  1165. reg = <0x0 0x4>;
  1166. quality = [03 e8];
  1167. };
  1168. };
  1169.  
  1170. hiubus@c883c000 {
  1171. compatible = "simple-bus";
  1172. reg = <0xc883c000 0x2000>;
  1173. #address-cells = <0x1>;
  1174. #size-cells = <0x1>;
  1175. ranges = <0x0 0xc883c000 0x2000>;
  1176. phandle = <0xb5>;
  1177.  
  1178. clock-controller@0 {
  1179. compatible = "amlogic,gxl-clkc";
  1180. #clock-cells = <0x1>;
  1181. reg = <0x0 0x3db>;
  1182. phandle = <0x7>;
  1183. };
  1184. };
  1185.  
  1186. apb@d0000000 {
  1187. compatible = "simple-bus";
  1188. reg = <0xd0000000 0x200000>;
  1189. #address-cells = <0x1>;
  1190. #size-cells = <0x1>;
  1191. ranges = <0x0 0xd0000000 0x200000>;
  1192. phandle = <0xb6>;
  1193. };
  1194. };
  1195.  
  1196. cpu_ver_name {
  1197. compatible = "amlogic, cpu-major-id-gxl";
  1198. };
  1199.  
  1200. vdac {
  1201. compatible = "amlogic, vdac-gxl";
  1202. status = "okay";
  1203. };
  1204.  
  1205. defendkey {
  1206. compatible = "amlogic, defendkey";
  1207. reg = <0xc8834500 0x4>;
  1208. mem_size = <0x0 0x100000>;
  1209. status = "okay";
  1210. phandle = <0xb7>;
  1211. };
  1212.  
  1213. aml_dma {
  1214. compatible = "amlogic,aml_gxl_dma";
  1215. reg = <0xc883e000 0x28>;
  1216. interrupts = <0x0 0xbc 0x1>;
  1217.  
  1218. aml_aes {
  1219. compatible = "amlogic,aes_dma";
  1220. dev_name = "aml_aes_dma";
  1221. status = "okay";
  1222. };
  1223.  
  1224. aml_tdes {
  1225. compatible = "amlogic,des_dma,tdes_dma";
  1226. dev_name = "aml_tdes_dma";
  1227. status = "okay";
  1228. };
  1229. };
  1230.  
  1231. audio_data {
  1232. compatible = "amlogic, audio_data";
  1233. query_licence_cmd = <0x82000050>;
  1234. status = "okay";
  1235. phandle = <0xb8>;
  1236. };
  1237.  
  1238. saradc {
  1239. compatible = "amlogic,meson-gxl-saradc";
  1240. status = "okay";
  1241. #io-channel-cells = <0x1>;
  1242. clocks = <0xf 0x7 0x58 0x7 0xe4>;
  1243. clock-names = "xtal", "clk81_gate", "saradc_clk";
  1244. interrupts = <0x0 0x49 0x1>;
  1245. reg = <0xc1108680 0x38>;
  1246. phandle = <0xb9>;
  1247. };
  1248.  
  1249. efuse {
  1250. compatible = "amlogic, efuse";
  1251. read_cmd = <0x82000030>;
  1252. write_cmd = <0x82000031>;
  1253. get_max_cmd = <0x82000033>;
  1254. key = <0x18>;
  1255. clocks = <0x7 0x4a>;
  1256. clock-names = "efuse_clk";
  1257. status = "ok";
  1258. phandle = <0xba>;
  1259. };
  1260.  
  1261. efusekey {
  1262. keynum = <0x4>;
  1263. key0 = <0x19>;
  1264. key1 = <0x1a>;
  1265. key2 = <0x1b>;
  1266. key3 = <0x1c>;
  1267. phandle = <0x18>;
  1268.  
  1269. key_0 {
  1270. keyname = "mac";
  1271. offset = <0x0>;
  1272. size = <0x6>;
  1273. phandle = <0x19>;
  1274. };
  1275.  
  1276. key_1 {
  1277. keyname = "mac_bt";
  1278. offset = <0x6>;
  1279. size = <0x6>;
  1280. phandle = <0x1a>;
  1281. };
  1282.  
  1283. key_2 {
  1284. keyname = "mac_wifi";
  1285. offset = <0xc>;
  1286. size = <0x6>;
  1287. phandle = <0x1b>;
  1288. };
  1289.  
  1290. key_3 {
  1291. keyname = "usid";
  1292. offset = <0x12>;
  1293. size = <0x10>;
  1294. phandle = <0x1c>;
  1295. };
  1296. };
  1297.  
  1298. rc@c8100580 {
  1299. compatible = "amlogic, aml_remote";
  1300. dev_name = "meson-remote";
  1301. reg = <0xc8100580 0x44 0xc8100480 0x20>;
  1302. status = "okay";
  1303. protocol = <0x1>;
  1304. interrupts = <0x0 0xc4 0x1>;
  1305. pinctrl-names = "default";
  1306. pinctrl-0 = <0x1d>;
  1307. map = <0x1e>;
  1308. max_frame_time = <0xc8>;
  1309. phandle = <0xbb>;
  1310. };
  1311.  
  1312. custom_maps {
  1313. mapnum = <0x3>;
  1314. map0 = <0x1f>;
  1315. map1 = <0x20>;
  1316. map2 = <0x21>;
  1317. phandle = <0x1e>;
  1318.  
  1319. map_0 {
  1320. mapname = "amlogic-remote-1";
  1321. customcode = <0xfb04>;
  1322. release_delay = <0x50>;
  1323. size = <0x32>;
  1324. keymap = <0x47000b 0x130002 0x100003 0x110004 0xf0005 0xc0006 0xd0007 0xb0008 0x80009 0x9000a 0x5c0061 0x51003d 0x50003e 0x40003f 0x4d0040 0x430041 0x170042 0x43 0x10044 0x160057 0x49000e 0x60082 0x140083 0x440067 0x1d006c 0x1c0069 0x48006a 0x53007d 0x450068 0x19006d 0x520077 0x5007a 0x59007b 0x1b0078 0x40079 0x1a0074 0xa000f 0xe0071 0x1f0066 0x1e0084 0x70085 0x120086 0x540087 0x20088 0x4f001e 0x420030 0x5d002e 0x4c0020 0x580089 0x55008c>;
  1325. phandle = <0x1f>;
  1326. };
  1327.  
  1328. map_1 {
  1329. mapname = "amlogic-remote-2";
  1330. customcode = <0xfe01>;
  1331. release_delay = <0x50>;
  1332. fn_key_scancode = <0x0>;
  1333. cursor_left_scancode = <0x51>;
  1334. cursor_right_scancode = <0x50>;
  1335. cursor_up_scancode = <0x16>;
  1336. cursor_down_scancode = <0x1a>;
  1337. cursor_ok_scancode = <0x13>;
  1338. size = <0x2c>;
  1339. keymap = <0x1000b 0x4e0002 0xd0003 0xc0004 0x4a0005 0x90006 0x80007 0x460008 0x50009 0x4000a 0x49003f 0x48004e 0x4d004b 0x3004c 0x43004d 0x450040 0xf0041 0x440042 0x120043 0x4b0044 0x260045 0x160067 0x1a006c 0x510069 0x50006a 0x13001c 0x19009e 0x4c007d 0x400074 0x410071 0x180073 0x100072 0x110066 0xa006f 0x42000e 0x4700d7 0xe0046 0x59007a 0x58007b 0x540078 0x52007c 0x5a0077 0x550079 0x64>;
  1340. phandle = <0x20>;
  1341. };
  1342.  
  1343. map_2 {
  1344. mapname = "amlogic-remote-3";
  1345. customcode = <0xbd02>;
  1346. release_delay = <0x50>;
  1347. size = <0x11>;
  1348. keymap = <0xca0067 0xd2006c 0x990069 0xc1006a 0xce0061 0x450074 0xc50085 0x800071 0xd0000f 0xd6007d 0x950066 0xdd0068 0x8c006d 0x890083 0x9c0082 0x9a0078 0xcd0079>;
  1349. phandle = <0x21>;
  1350. };
  1351. };
  1352.  
  1353. aml_reboot {
  1354. compatible = "aml, reboot";
  1355. sys_reset = <0x84000009>;
  1356. sys_poweroff = <0x84000008>;
  1357. };
  1358.  
  1359. rtc {
  1360. compatible = "amlogic, aml_vrtc";
  1361. alarm_reg_addr = <0xc81000a8>;
  1362. timer_e_addr = <0xc1109988>;
  1363. init_date = "2017/01/01";
  1364. status = "okay";
  1365. };
  1366.  
  1367. pwm@c1108550 {
  1368. compatible = "amlogic,gx-ee-pwm";
  1369. reg = <0xc1108550 0x1c>;
  1370. #pwm-cells = <0x3>;
  1371. clocks = <0xf 0xf 0xf 0xf>;
  1372. clock-names = "clkin0", "clkin1", "clkin2", "clkin3";
  1373. status = "disabled";
  1374. phandle = <0xbc>;
  1375. };
  1376.  
  1377. pwm@c1108640 {
  1378. compatible = "amlogic,gx-ee-pwm";
  1379. reg = <0xc1108640 0x1c>;
  1380. #pwm-cells = <0x3>;
  1381. clocks = <0xf 0xf 0xf 0xf>;
  1382. clock-names = "clkin0", "clkin1", "clkin2", "clkin3";
  1383. status = "disabled";
  1384. phandle = <0xbd>;
  1385. };
  1386.  
  1387. pwm@c11086c0 {
  1388. compatible = "amlogic,gx-ee-pwm";
  1389. reg = <0xc11086c0 0x1c>;
  1390. #pwm-cells = <0x3>;
  1391. clocks = <0xf 0xf 0xf 0xf>;
  1392. clock-names = "clkin0", "clkin1", "clkin2", "clkin3";
  1393. status = "okay";
  1394. phandle = <0x36>;
  1395. };
  1396.  
  1397. pwm@c8100550 {
  1398. compatible = "amlogic,gx-ao-pwm";
  1399. reg = <0xc8100550 0x1c>;
  1400. #pwm-cells = <0x3>;
  1401. clocks = <0xf 0xf 0xf 0xf>;
  1402. clock-names = "clkin0", "clkin1", "clkin2", "clkin3";
  1403. status = "disabled";
  1404. phandle = <0xbe>;
  1405. };
  1406.  
  1407. ddr_bandwidth {
  1408. compatible = "amlogic, ddr-bandwidth";
  1409. status = "okay";
  1410. reg = <0xc8838000 0x100 0xc8837000 0x100>;
  1411. interrupts = <0x0 0x34 0x1>;
  1412. interrupt-names = "ddr_bandwidth";
  1413. };
  1414.  
  1415. dmc_monitor {
  1416. compatible = "amlogic, dmc_monitor";
  1417. status = "okay";
  1418. reg_base = <0xda838400>;
  1419. interrupts = <0x0 0x33 0x1>;
  1420. };
  1421.  
  1422. firmware {
  1423.  
  1424. android {
  1425. compatible = "android,firmware";
  1426.  
  1427. vbmeta {
  1428. compatible = "android,vbmeta";
  1429. parts = "vbmeta,boot,system,vendor";
  1430. by_name_prefix = "/dev/block";
  1431. };
  1432.  
  1433. fstab {
  1434. compatible = "android,fstab";
  1435.  
  1436. vendor {
  1437. compatible = "android,vendor";
  1438. dev = "/dev/block/vendor";
  1439. type = "ext4";
  1440. mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
  1441. fsmgr_flags = "wait";
  1442. };
  1443.  
  1444. product {
  1445. compatible = "android,product";
  1446. dev = "/dev/block/product";
  1447. type = "ext4";
  1448. mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
  1449. fsmgr_flags = "wait";
  1450. };
  1451.  
  1452. odm {
  1453. compatible = "android,odm";
  1454. dev = "/dev/block/odm";
  1455. type = "ext4";
  1456. mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
  1457. fsmgr_flags = "wait";
  1458. };
  1459. };
  1460. };
  1461. };
  1462.  
  1463. partitions {
  1464. parts = <0x11>;
  1465. part-0 = <0x22>;
  1466. part-1 = <0x23>;
  1467. part-2 = <0x24>;
  1468. part-3 = <0x25>;
  1469. part-4 = <0x26>;
  1470. part-5 = <0x27>;
  1471. part-6 = <0x28>;
  1472. part-7 = <0x29>;
  1473. part-8 = <0x2a>;
  1474. part-9 = <0x2b>;
  1475. part-10 = <0x2c>;
  1476. part-11 = <0x2d>;
  1477. part-12 = <0x2e>;
  1478. part-13 = <0x2f>;
  1479. part-14 = <0x30>;
  1480. part-15 = <0x31>;
  1481. part-16 = <0x32>;
  1482. phandle = <0xbf>;
  1483.  
  1484. logo {
  1485. pname = "logo";
  1486. size = <0x0 0x800000>;
  1487. mask = <0x1>;
  1488. phandle = <0x22>;
  1489. };
  1490.  
  1491. recovery {
  1492. pname = "recovery";
  1493. size = <0x0 0x1800000>;
  1494. mask = <0x1>;
  1495. phandle = <0x23>;
  1496. };
  1497.  
  1498. misc {
  1499. pname = "misc";
  1500. size = <0x0 0x800000>;
  1501. mask = <0x1>;
  1502. phandle = <0x24>;
  1503. };
  1504.  
  1505. dtbo {
  1506. pname = "dtbo";
  1507. size = <0x0 0x800000>;
  1508. mask = <0x1>;
  1509. phandle = <0x25>;
  1510. };
  1511.  
  1512. cri_data {
  1513. pname = "cri_data";
  1514. size = <0x0 0x800000>;
  1515. mask = <0x2>;
  1516. phandle = <0x26>;
  1517. };
  1518.  
  1519. rsv {
  1520. pname = "rsv";
  1521. size = <0x0 0x1000000>;
  1522. mask = <0x1>;
  1523. phandle = <0x29>;
  1524. };
  1525.  
  1526. metadata {
  1527. pname = "metadata";
  1528. size = <0x0 0x1000000>;
  1529. mask = <0x1>;
  1530. phandle = <0x2a>;
  1531. };
  1532.  
  1533. vbmeta {
  1534. pname = "vbmeta";
  1535. size = <0x0 0x200000>;
  1536. mask = <0x1>;
  1537. phandle = <0x2b>;
  1538. };
  1539.  
  1540. param {
  1541. pname = "param";
  1542. size = <0x0 0x1000000>;
  1543. mask = <0x2>;
  1544. phandle = <0x27>;
  1545. };
  1546.  
  1547. boot {
  1548. pname = "boot";
  1549. size = <0x0 0x1000000>;
  1550. mask = <0x1>;
  1551. phandle = <0x28>;
  1552. };
  1553.  
  1554. tee {
  1555. pname = "tee";
  1556. size = <0x0 0x2000000>;
  1557. mask = <0x1>;
  1558. phandle = <0x2c>;
  1559. };
  1560.  
  1561. vendor {
  1562. pname = "vendor";
  1563. size = <0x0 0x46000000>;
  1564. mask = <0x1>;
  1565. phandle = <0x2d>;
  1566. };
  1567.  
  1568. odm {
  1569. pname = "odm";
  1570. size = <0x0 0x8000000>;
  1571. mask = <0x1>;
  1572. phandle = <0x2e>;
  1573. };
  1574.  
  1575. system {
  1576. pname = "system";
  1577. size = <0x0 0x50000000>;
  1578. mask = <0x1>;
  1579. phandle = <0x2f>;
  1580. };
  1581.  
  1582. product {
  1583. pname = "product";
  1584. size = <0x0 0x8000000>;
  1585. mask = <0x1>;
  1586. phandle = <0x30>;
  1587. };
  1588.  
  1589. cache {
  1590. pname = "cache";
  1591. size = <0x0 0x46000000>;
  1592. mask = <0x2>;
  1593. phandle = <0x31>;
  1594. };
  1595.  
  1596. data {
  1597. pname = "data";
  1598. size = <0xffffffff 0xffffffff>;
  1599. mask = <0x4>;
  1600. phandle = <0x32>;
  1601. };
  1602. };
  1603.  
  1604. aliases {
  1605. serial0 = "/serial@c81004c0";
  1606. serial1 = "/serial@c11084c0";
  1607. serial2 = "/serial@c11084dc";
  1608. serial3 = "/serial@c1108700";
  1609. serial4 = "/serial@c81004e0";
  1610. };
  1611.  
  1612. ion_dev {
  1613. compatible = "amlogic, ion_dev";
  1614. memory-region = <0x33>;
  1615. };
  1616.  
  1617. memory@00000000 {
  1618. device_type = "memory";
  1619. linux,usable-memory = <0x100000 0x3ff00000>;
  1620. };
  1621.  
  1622. reserved-memory {
  1623. #address-cells = <0x1>;
  1624. #size-cells = <0x1>;
  1625. ranges;
  1626.  
  1627. linux,secmon {
  1628. compatible = "shared-dma-pool";
  1629. reusable;
  1630. size = <0x400000>;
  1631. alignment = <0x400000>;
  1632. alloc-ranges = <0x5000000 0x400000>;
  1633. phandle = <0xe>;
  1634. };
  1635.  
  1636. linux,secos {
  1637. status = "disable";
  1638. compatible = "amlogic, aml_secos_memory";
  1639. reg = <0x5300000 0x2000000>;
  1640. no-map;
  1641. phandle = <0xc0>;
  1642. };
  1643.  
  1644. linux,meson-fb {
  1645. compatible = "shared-dma-pool";
  1646. reusable;
  1647. size = <0x800000>;
  1648. alignment = <0x400000>;
  1649. alloc-ranges = <0x3f800000 0x800000>;
  1650. phandle = <0x57>;
  1651. };
  1652.  
  1653. linux,codec_mm_cma {
  1654. compatible = "shared-dma-pool";
  1655. reusable;
  1656. size = <0xd000000>;
  1657. alignment = <0x400000>;
  1658. linux,contiguous-region;
  1659. alloc-ranges = <0x30000000 0x10000000>;
  1660. phandle = <0x54>;
  1661. };
  1662.  
  1663. linux,di_cma {
  1664. compatible = "shared-dma-pool";
  1665. reusable;
  1666. size = <0x2000000>;
  1667. alignment = <0x400000>;
  1668. alloc-ranges = <0x30000000 0x10000000>;
  1669. phandle = <0x6c>;
  1670. };
  1671.  
  1672. linux,ion-dev {
  1673. compatible = "shared-dma-pool";
  1674. reusable;
  1675. size = <0x4c00000>;
  1676. alignment = <0x400000>;
  1677. alloc-ranges = <0x0 0x30000000>;
  1678. phandle = <0x33>;
  1679. };
  1680.  
  1681. linux,vdin1_cma {
  1682. compatible = "shared-dma-pool";
  1683. reusable;
  1684. size = <0x1000000>;
  1685. alignment = <0x400000>;
  1686. alloc-ranges = <0x0 0x30000000>;
  1687. phandle = <0x6d>;
  1688. };
  1689.  
  1690. linux,ppmgr {
  1691. compatible = "shared-dma-pool";
  1692. size = <0x0>;
  1693. phandle = <0x6b>;
  1694. };
  1695.  
  1696. linux,picdec {
  1697. compatible = "shared-dma-pool";
  1698. reusable;
  1699. size = <0x0>;
  1700. alignment = <0x0>;
  1701. linux,contiguous-region;
  1702. phandle = <0x6a>;
  1703. };
  1704.  
  1705. linux,codec_mm_reserved {
  1706. compatible = "amlogic, codec-mm-reserved";
  1707. size = <0x0>;
  1708. alignment = <0x100000>;
  1709. phandle = <0x55>;
  1710. };
  1711. };
  1712.  
  1713. dummy-battery {
  1714. compatible = "amlogic, dummy-battery";
  1715. status = "disabled";
  1716. phandle = <0xc1>;
  1717. };
  1718.  
  1719. dummy-charger {
  1720. compatible = "amlogic, dummy-charger";
  1721. status = "disabled";
  1722. phandle = <0xc2>;
  1723. };
  1724.  
  1725. bt-dev {
  1726. compatible = "amlogic, bt-dev";
  1727. dev_name = "bt-dev";
  1728. status = "okay";
  1729. gpio_reset = <0x10 0x60 0x0>;
  1730. };
  1731.  
  1732. wifi {
  1733. compatible = "amlogic, aml_wifi";
  1734. dev_name = "aml_wifi";
  1735. status = "okay";
  1736. interrupt_pin = <0x10 0x56 0x0>;
  1737. irq_trigger_type = "GPIO_IRQ_LOW";
  1738. dhd_static_buf;
  1739. power_on_pin = <0x10 0x55 0x0>;
  1740. pinctrl-names = "default";
  1741. pinctrl-0 = <0x34>;
  1742. pwm_config = <0x35>;
  1743. };
  1744.  
  1745. wifi_pwm_conf {
  1746. phandle = <0x35>;
  1747.  
  1748. pwm_channel1_conf {
  1749. pwms = <0x36 0x0 0x774d 0x0>;
  1750. duty-cycle = <0x3ba6>;
  1751. times = <0x8>;
  1752. };
  1753.  
  1754. pwm_channel2_conf {
  1755. pwms = <0x36 0x2 0x7724 0x0>;
  1756. duty-cycle = <0x3b92>;
  1757. times = <0xc>;
  1758. };
  1759. };
  1760.  
  1761. emmc@d0074000 {
  1762. status = "okay";
  1763. compatible = "amlogic, meson-mmc-gxl";
  1764. reg = <0xd0074000 0x2000>;
  1765. interrupts = <0x0 0xda 0x1>;
  1766. pinctrl-names = "emmc_clk_cmd_pins", "emmc_all_pins";
  1767. pinctrl-0 = <0x37>;
  1768. pinctrl-1 = <0x38 0x39>;
  1769. clocks = <0x7 0x2e 0x7 0x82 0x7 0x4>;
  1770. clock-names = "core", "clkin0", "clkin1";
  1771. bus-width = <0x8>;
  1772. cap-sd-highspeed;
  1773. cap-mmc-highspeed;
  1774. mmc-ddr-1_8v;
  1775. mmc-hs200-1_8v;
  1776. max-frequency = <0xbebc200>;
  1777. non-removable;
  1778. disable-wp;
  1779. phandle = <0xc3>;
  1780.  
  1781. emmc {
  1782. pinname = "emmc";
  1783. ocr_avail = <0x200080>;
  1784. caps = "MMC_CAP_8_BIT_DATA", "MMC_CAP_MMC_HIGHSPEED", "MMC_CAP_SD_HIGHSPEED", "MMC_CAP_NONREMOVABLE", "MMC_CAP_1_8V_DDR", "MMC_CAP_HW_RESET", "MMC_CAP_ERASE", "MMC_CAP_CMD23";
  1785. f_min = <0x493e0>;
  1786. f_max = <0x2faf080>;
  1787. max_req_size = <0x20000>;
  1788. gpio_dat3 = <0x10 0x1d 0x0>;
  1789. hw_reset = <0x10 0x23 0x0>;
  1790. card_type = <0x1>;
  1791. };
  1792. };
  1793.  
  1794. sd@d0072000 {
  1795. status = "okay";
  1796. compatible = "amlogic, meson-mmc-gxl";
  1797. reg = <0xd0072000 0x2000>;
  1798. interrupts = <0x0 0xd9 0x1>;
  1799. pinctrl-names = "sd_all_pins", "sd_clk_cmd_pins", "sd_1bit_pins", "sd_clk_cmd_uart_pins", "sd_1bit_uart_pins", "sd_to_ao_uart_pins", "ao_to_sd_uart_pins", "ao_to_sd_jtag_pins", "sd_to_ao_jtag_pins";
  1800. pinctrl-0 = <0x3a>;
  1801. pinctrl-1 = <0x3b>;
  1802. pinctrl-2 = <0x3c>;
  1803. pinctrl-3 = <0x3d 0x3b 0x3e>;
  1804. pinctrl-4 = <0x3d 0x3c 0x3e>;
  1805. pinctrl-5 = <0x3a 0x3f>;
  1806. pinctrl-6 = <0x3d 0x3e>;
  1807. pinctrl-7 = <0x3d 0x3e>;
  1808. pinctrl-8 = <0x3a 0x3f>;
  1809. clocks = <0x7 0x2d 0x7 0x7e 0x7 0x4>;
  1810. clock-names = "core", "clkin0", "clkin1";
  1811. bus-width = <0x4>;
  1812. cap-sd-highspeed;
  1813. max-frequency = <0x5f5e100>;
  1814. disable-wp;
  1815. phandle = <0xc4>;
  1816.  
  1817. sd {
  1818. pinname = "sd";
  1819. ocr_avail = <0x200080>;
  1820. caps = "MMC_CAP_4_BIT_DATA", "MMC_CAP_MMC_HIGHSPEED", "MMC_CAP_SD_HIGHSPEED";
  1821. f_min = <0x61a80>;
  1822. f_max = <0x5f5e100>;
  1823. max_req_size = <0x20000>;
  1824. gpio_dat3 = <0x10 0x2e 0x0>;
  1825. jtag_pin = <0x10 0x2a 0x0>;
  1826. gpio_cd = <0x10 0x30 0x0>;
  1827. card_type = <0x5>;
  1828. };
  1829. };
  1830.  
  1831. sdio@d0070000 {
  1832. status = "okay";
  1833. compatible = "amlogic, meson-mmc-gxl";
  1834. reg = <0xd0070000 0x2000>;
  1835. interrupts = <0x0 0xd8 0x4>;
  1836. pinctrl-names = "sdio_clk_cmd_pins", "sdio_all_pins";
  1837. pinctrl-0 = <0x40>;
  1838. pinctrl-1 = <0x41>;
  1839. clocks = <0x7 0x2c 0x7 0x7a 0x7 0x4>;
  1840. clock-names = "core", "clkin0", "clkin1";
  1841. bus-width = <0x4>;
  1842. cap-sd-highspeed;
  1843. cap-mmc-highspeed;
  1844. max-frequency = <0x5f5e100>;
  1845. non-removable;
  1846. disable-wp;
  1847. phandle = <0xc5>;
  1848.  
  1849. sdio {
  1850. pinname = "sdio";
  1851. ocr_avail = <0x200080>;
  1852. caps = "MMC_CAP_4_BIT_DATA", "MMC_CAP_MMC_HIGHSPEED", "MMC_CAP_SD_HIGHSPEED", "MMC_CAP_NONREMOVABLE", "MMC_CAP_UHS_SDR12", "MMC_CAP_UHS_SDR25", "MMC_CAP_UHS_SDR50", "MMC_CAP_UHS_SDR104", "MMC_PM_KEEP_POWER", "MMC_CAP_SDIO_IRQ";
  1853. f_min = <0x61a80>;
  1854. f_max = <0xbebc200>;
  1855. max_req_size = <0x20000>;
  1856. card_type = <0x3>;
  1857. };
  1858. };
  1859.  
  1860. mtd_nand {
  1861. compatible = "amlogic, aml_mtd_nand";
  1862. dev_name = "mtdnand";
  1863. status = "disabled";
  1864. reg = <0xd0074800 0x200>;
  1865. interrupts = <0x0 0x22 0x1>;
  1866. pinctrl-names = "nand_rb_mod", "nand_norb_mod", "nand_cs_only";
  1867. pinctrl-0 = <0x42>;
  1868. pinctrl-1 = <0x42>;
  1869. pinctrl-2 = <0x43>;
  1870. device_id = <0x0>;
  1871. plat-names = "bootloader", "nandnormal";
  1872. plat-num = <0x2>;
  1873. plat-part-0 = <0x44>;
  1874. plat-part-1 = <0x45>;
  1875.  
  1876. bootloader {
  1877. enable_pad = "ce0";
  1878. busy_pad = "rb0";
  1879. timming_mode = "mode5";
  1880. bch_mode = "bch60_1k";
  1881. t_rea = <0x14>;
  1882. t_rhoh = <0xf>;
  1883. chip_num = <0x1>;
  1884. part_num = <0x0>;
  1885. rb_detect = <0x1>;
  1886. phandle = <0x44>;
  1887. };
  1888.  
  1889. nandnormal {
  1890. enable_pad = "ce0", "ce1";
  1891. busy_pad = "rb0", "rb1";
  1892. timming_mode = "mode5";
  1893. bch_mode = "bch60_1k";
  1894. plane_mode = "twoplane";
  1895. t_rea = <0x14>;
  1896. t_rhoh = <0xf>;
  1897. chip_num = <0x2>;
  1898. part_num = <0x3>;
  1899. partition = <0x46>;
  1900. rb_detect = <0x1>;
  1901. phandle = <0x45>;
  1902. };
  1903.  
  1904. nand_partition {
  1905. phandle = <0x46>;
  1906.  
  1907. logo {
  1908. offset = <0x0 0x0>;
  1909. size = <0x0 0x200000>;
  1910. };
  1911.  
  1912. recovery {
  1913. offset = <0x0 0x0>;
  1914. size = <0x0 0x1000000>;
  1915. };
  1916.  
  1917. boot {
  1918. offset = <0x0 0x0>;
  1919. size = <0x0 0xc00000>;
  1920. };
  1921.  
  1922. system {
  1923. offset = <0x0 0x0>;
  1924. size = <0x0 0xdc40000>;
  1925. };
  1926.  
  1927. data {
  1928. offset = <0xffffffff 0xffffffff>;
  1929. size = <0x0 0x0>;
  1930. };
  1931. };
  1932. };
  1933.  
  1934. ethernet@0xc9410000 {
  1935. compatible = "amlogic, gxbb-eth-dwmac";
  1936. reg = <0xc9410000 0x10000 0xc8834540 0x8 0xc8834558 0xc>;
  1937. interrupts = <0x0 0x8 0x1>;
  1938. pinctrl-names = "external_eth_pins";
  1939. pinctrl-0 = <0x47>;
  1940. rst_pin-gpios = <0x10 0xe 0x0>;
  1941. GPIOZ4_pin-gpios = <0x10 0x4 0x0>;
  1942. GPIOZ5_pin-gpios = <0x10 0x5 0x0>;
  1943. mc_val_internal_phy = <0x1800>;
  1944. mc_val_external_phy = <0x1621>;
  1945. cali_val = <0x20000>;
  1946. interrupt-names = "macirq";
  1947. clocks = <0x7 0x34>;
  1948. clock-names = "ethclk81";
  1949. internal_phy = <0x1>;
  1950. phandle = <0xc6>;
  1951. };
  1952.  
  1953. aml-sensor@0 {
  1954. compatible = "amlogic, aml-thermal";
  1955. device_name = "thermal";
  1956. #thermal-sensor-cells = <0x1>;
  1957. phandle = <0x48>;
  1958.  
  1959. cooling_devices {
  1960.  
  1961. cpufreq_cool_cluster0 {
  1962. min_state = <0x124f80>;
  1963. dyn_coeff = <0x8c>;
  1964. cluster_id = <0x0>;
  1965. node_name = "cpufreq_cool0";
  1966. device_type = "cpufreq";
  1967. };
  1968.  
  1969. cpucore_cool_cluster0 {
  1970. min_state = <0x1>;
  1971. dyn_coeff = <0x0>;
  1972. cluster_id = <0x0>;
  1973. node_name = "cpucore_cool0";
  1974. device_type = "cpucore";
  1975. };
  1976.  
  1977. gpufreq_cool {
  1978. min_state = <0x1f4>;
  1979. dyn_coeff = <0x1b5>;
  1980. cluster_id = <0x0>;
  1981. node_name = "gpufreq_cool0";
  1982. device_type = "gpufreq";
  1983. };
  1984.  
  1985. gpucore_cool {
  1986. min_state = <0x1>;
  1987. dyn_coeff = <0x0>;
  1988. cluster_id = <0x0>;
  1989. node_name = "gpucore_cool0";
  1990. device_type = "gpucore";
  1991. };
  1992. };
  1993.  
  1994. cpufreq_cool0 {
  1995. #cooling-cells = <0x2>;
  1996. phandle = <0x4a>;
  1997. };
  1998.  
  1999. cpucore_cool0 {
  2000. #cooling-cells = <0x2>;
  2001. phandle = <0x4b>;
  2002. };
  2003.  
  2004. gpufreq_cool0 {
  2005. #cooling-cells = <0x2>;
  2006. phandle = <0x4c>;
  2007. };
  2008.  
  2009. gpucore_cool0 {
  2010. #cooling-cells = <0x2>;
  2011. phandle = <0x4d>;
  2012. };
  2013. };
  2014.  
  2015. thermal-zones {
  2016.  
  2017. soc_thermal {
  2018. polling-delay = <0x3e8>;
  2019. polling-delay-passive = <0x64>;
  2020. sustainable-power = <0x866>;
  2021. thermal-sensors = <0x48 0x3>;
  2022.  
  2023. trips {
  2024.  
  2025. trip-point@0 {
  2026. temperature = <0x13880>;
  2027. hysteresis = <0x3e8>;
  2028. type = "passive";
  2029. phandle = <0xc7>;
  2030. };
  2031.  
  2032. trip-point@1 {
  2033. temperature = <0x15f90>;
  2034. hysteresis = <0x3e8>;
  2035. type = "passive";
  2036. phandle = <0x49>;
  2037. };
  2038.  
  2039. trip-point@2 {
  2040. temperature = <0x186a0>;
  2041. hysteresis = <0x1388>;
  2042. type = "hot";
  2043. phandle = <0xc8>;
  2044. };
  2045.  
  2046. trip-point@3 {
  2047. temperature = <0x3f7a0>;
  2048. hysteresis = <0x3e8>;
  2049. type = "critical";
  2050. phandle = <0xc9>;
  2051. };
  2052. };
  2053.  
  2054. cooling-maps {
  2055.  
  2056. cpufreq_cooling_map {
  2057. trip = <0x49>;
  2058. cooling-device = <0x4a 0x0 0x4>;
  2059. contribution = <0x400>;
  2060. };
  2061.  
  2062. cpucore_cooling_map {
  2063. trip = <0x49>;
  2064. cooling-device = <0x4b 0x0 0x3>;
  2065. contribution = <0x400>;
  2066. };
  2067.  
  2068. gpufreq_cooling_map {
  2069. trip = <0x49>;
  2070. cooling-device = <0x4c 0x0 0x4>;
  2071. contribution = <0x400>;
  2072. };
  2073.  
  2074. gpucore_cooling_map {
  2075. trip = <0x49>;
  2076. cooling-device = <0x4d 0x0 0x2>;
  2077. contribution = <0x400>;
  2078. };
  2079. };
  2080. };
  2081. };
  2082.  
  2083. dwc3@c9000000 {
  2084. compatible = "synopsys, dwc3";
  2085. reg = <0xc9000000 0x100000>;
  2086. interrupts = <0x0 0x1e 0x4>;
  2087. usb-phy = <0x4e 0x4f>;
  2088. cpu-type = "gxl";
  2089. clock-src = "usb3.0";
  2090. phandle = <0xca>;
  2091. };
  2092.  
  2093. usb2phy@d0078000 {
  2094. compatible = "amlogic, amlogic-new-usb2";
  2095. portnum = <0x3>;
  2096. reg = <0xd0078000 0x80 0xc1104408 0x4>;
  2097. phandle = <0x4e>;
  2098. };
  2099.  
  2100. usb3phy@d0078080 {
  2101. compatible = "amlogic, amlogic-new-usb3";
  2102. portnum = <0x0>;
  2103. reg = <0xd0078080 0x20>;
  2104. phandle = <0x4f>;
  2105. };
  2106.  
  2107. dwc2_a {
  2108. compatible = "amlogic, dwc2";
  2109. device_name = "dwc2_a";
  2110. reg = <0xc9100000 0x40000>;
  2111. status = "okay";
  2112. interrupts = <0x0 0x1f 0x4>;
  2113. pl-periph-id = <0x0>;
  2114. clock-src = "usb0";
  2115. port-id = <0x0>;
  2116. port-type = <0x2>;
  2117. port-speed = <0x0>;
  2118. port-config = <0x0>;
  2119. port-dma = <0x0>;
  2120. port-id-mode = <0x0>;
  2121. usb-fifo = <0x2d8>;
  2122. cpu-type = "gxl";
  2123. controller-type = <0x1>;
  2124. phy-reg = <0xd0078000>;
  2125. phy-reg-size = <0xa0>;
  2126. clocks = <0x7 0x47 0x7 0x52 0x7 0x43>;
  2127. clock-names = "usb_general", "usb1", "usb1_to_ddr";
  2128. };
  2129.  
  2130. meson-amvideom {
  2131. compatible = "amlogic, amvideom";
  2132. dev_name = "amvideom";
  2133. status = "okay";
  2134. interrupts = <0x0 0x3 0x1>;
  2135. interrupt-names = "vsync";
  2136. };
  2137.  
  2138. vout {
  2139. compatible = "amlogic, vout";
  2140. dev_name = "vout";
  2141. status = "okay";
  2142. fr_auto_policy = <0x0>;
  2143. };
  2144.  
  2145. cvbsout {
  2146. compatible = "amlogic, cvbsout-gxl";
  2147. dev_name = "cvbsout";
  2148. status = "okay";
  2149. clocks = <0x7 0x65 0x7 0x5e 0x7 0x5f 0x7 0x67>;
  2150. clock-names = "venci_top_gate", "venci_0_gate", "venci_1_gate", "vdac_clk_gate";
  2151. performance = <0x1bf0 0x9 0x1b56 0x343 0x1b12 0x8080 0x1b05 0xfd 0x1c59 0xf752 0xffff 0x0>;
  2152. };
  2153.  
  2154. amhdmitx {
  2155. compatible = "amlogic, amhdmitx";
  2156. dev_name = "amhdmitx";
  2157. status = "okay";
  2158. vend-data = <0x50>;
  2159. pinctrl-names = "hdmitx_hpd", "hdmitx_ddc";
  2160. pinctrl-0 = <0x51>;
  2161. pinctrl-1 = <0x52>;
  2162. interrupts = <0x0 0x39 0x1>;
  2163. interrupt-names = "hdmitx_hpd";
  2164. ic_type = <0x3>;
  2165. phandle = <0xcb>;
  2166.  
  2167. vend_data {
  2168. vendor_name = "Amlogic";
  2169. vendor_id = <0x0>;
  2170. product_desc = "MBox Meson Ref";
  2171. phandle = <0x50>;
  2172. };
  2173. };
  2174.  
  2175. aocec {
  2176. compatible = "amlogic, amlogic-aocec";
  2177. device_name = "aocec";
  2178. status = "okay";
  2179. vendor_id = <0x0>;
  2180. cec_osd_string = "MBox";
  2181. cec_version = <0x5>;
  2182. port_num = <0x1>;
  2183. arc_port_mask = <0x0>;
  2184. interrupts = <0x0 0xc7 0x1>;
  2185. interrupt-names = "hdmi_aocec";
  2186. pinctrl-names = "default";
  2187. pinctrl-0 = <0x53>;
  2188. reg = <0xc810023c 0x4 0xc8100000 0x200>;
  2189. reg-names = "ao_exit", "ao";
  2190. phandle = <0xcc>;
  2191. };
  2192.  
  2193. sysled {
  2194. compatible = "amlogic, sysled";
  2195. dev_name = "sysled";
  2196. status = "okay";
  2197. led_gpio = <0x10 0x49 0x0>;
  2198. led_active_low = <0x1>;
  2199. };
  2200.  
  2201. meson-vfd {
  2202. compatible = "amlogic,aml_vfd";
  2203. dev_name = "meson-vfd";
  2204. status = "okay";
  2205. };
  2206.  
  2207. codec_io {
  2208. compatible = "amlogic, codec_io";
  2209. #address-cells = <0x1>;
  2210. #size-cells = <0x1>;
  2211. ranges;
  2212.  
  2213. io_cbus_base {
  2214. reg = <0xc1100000 0x100000>;
  2215. };
  2216.  
  2217. io_dos_base {
  2218. reg = <0xc8820000 0x10000>;
  2219. };
  2220.  
  2221. io_hiubus_base {
  2222. reg = <0xc883c000 0x2000>;
  2223. };
  2224.  
  2225. io_aobus_base {
  2226. reg = <0xc8100000 0x100000>;
  2227. };
  2228.  
  2229. io_vcbus_base {
  2230. reg = <0xd0100000 0x40000>;
  2231. };
  2232.  
  2233. io_dmc_base {
  2234. reg = <0xc8838000 0x400>;
  2235. };
  2236. };
  2237.  
  2238. codec_mm {
  2239. compatible = "amlogic, codec, mm";
  2240. memory-region = <0x54 0x55>;
  2241. dev_name = "codec_mm";
  2242. status = "okay";
  2243. };
  2244.  
  2245. canvas {
  2246. compatible = "amlogic, meson, canvas";
  2247. dev_name = "amlogic-canvas";
  2248. status = "ok";
  2249. reg = <0xc8838000 0x400>;
  2250. };
  2251.  
  2252. mesonstream {
  2253. compatible = "amlogic, codec, streambuf";
  2254. dev_name = "mesonstream";
  2255. status = "okay";
  2256. clocks = <0x7 0x46 0x7 0x35 0x7 0x1a 0x7 0xc 0x7 0xa0 0x7 0xa9 0x7 0xb2>;
  2257. clock-names = "parser_top", "demux", "vdec", "clk_81", "clk_vdec_mux", "clk_hcodec_mux", "clk_hevc_mux";
  2258. };
  2259.  
  2260. vdec {
  2261. compatible = "amlogic, vdec";
  2262. dev_name = "vdec.0";
  2263. status = "okay";
  2264. interrupts = <0x0 0x3 0x1 0x0 0x17 0x1 0x0 0x20 0x1 0x0 0x2b 0x1 0x0 0x2c 0x1 0x0 0x2d 0x1>;
  2265. interrupt-names = "vsync", "demux", "parser", "mailbox_0", "mailbox_1", "mailbox_2";
  2266. };
  2267.  
  2268. gpio_keypad {
  2269. compatible = "amlogic, gpio_keypad";
  2270. status = "okay";
  2271. scan_period = <0x14>;
  2272. key_num = <0x1>;
  2273. key_name = "power";
  2274. key_code = <0x74>;
  2275. key-gpios = <0x56 0x2 0x0>;
  2276. detect_mode = <0x0>;
  2277. };
  2278.  
  2279. meson-fb {
  2280. compatible = "amlogic, meson-gxl";
  2281. memory-region = <0x57>;
  2282. dev_name = "meson-fb";
  2283. status = "okay";
  2284. interrupts = <0x0 0x3 0x1 0x0 0x59 0x1>;
  2285. interrupt-names = "viu-vsync", "rdma";
  2286. mem_size = <0x800000 0x1800000 0x100000>;
  2287. display_mode_default = "720p60hz";
  2288. scale_mode = <0x1>;
  2289. display_size_default = <0x500 0x2d0 0x500 0x870 0x20>;
  2290. logo_addr = "0x3f800000";
  2291. };
  2292.  
  2293. ge2d {
  2294. compatible = "amlogic, ge2d-gxl";
  2295. dev_name = "ge2d";
  2296. status = "okay";
  2297. interrupts = <0x0 0x96 0x1>;
  2298. interrupt-names = "ge2d";
  2299. clocks = <0x7 0xc4 0x7 0x41 0x7 0xc5>;
  2300. clock-names = "clk_vapb_0", "clk_ge2d", "clk_ge2d_gate";
  2301. };
  2302.  
  2303. I2S {
  2304. #sound-dai-cells = <0x0>;
  2305. compatible = "amlogic, aml-i2s-dai";
  2306. clocks = <0x7 0xf 0x7 0xd1 0x7 0x36 0x7 0x37 0x7 0x38 0x7 0x39 0x7 0x3a 0x7 0x3b 0x7 0x3c 0x7 0x3d 0x7 0x3f 0x7 0x68 0x7 0x33>;
  2307. clock-names = "mpll", "mclk", "top_glue", "aud_buf", "i2s_out", "amclk_measure", "aififo2", "aud_mixer", "mixer_reg", "adc", "top_level", "aoclk", "aud_in";
  2308. i2s_pos_sync = <0x0>;
  2309. phandle = <0x64>;
  2310. };
  2311.  
  2312. snd_dmic {
  2313. #sound-dai-cells = <0x0>;
  2314. compatible = "aml, aml_snd_dmic";
  2315. reg = <0xd0042000 0x2000>;
  2316. status = "disabled";
  2317. resets = <0x7 0xd4>;
  2318. reset-names = "pdm";
  2319. pinctrl-names = "audio_dmic";
  2320. pinctrl-0 = <0x58>;
  2321. clocks = <0x7 0xd5 0x7 0xd1>;
  2322. clock-names = "pdm", "mclk";
  2323. phandle = <0xcd>;
  2324. };
  2325.  
  2326. SPDIF {
  2327. #sound-dai-cells = <0x0>;
  2328. compatible = "amlogic, aml-spdif-dai";
  2329. clocks = <0x7 0xe 0x7 0xd9 0x7 0xd1 0x7 0xe0 0x7 0xc 0x7 0x37 0x7 0x69>;
  2330. clock-names = "mpll1", "i958", "mclk", "spdif", "clk_81", "iec958", "iec958_amclk";
  2331. phandle = <0x65>;
  2332. };
  2333.  
  2334. PCM {
  2335. #sound-dai-cells = <0x0>;
  2336. compatible = "amlogic, aml-pcm-dai";
  2337. pinctrl-names = "audio_pcm";
  2338. pinctrl-0 = <0x59>;
  2339. clocks = <0x7 0xd 0x7 0xdd 0x7 0xdf>;
  2340. clock-names = "mpll0", "pcm_mclk", "pcm_sclk";
  2341. pcm_mode = <0x1>;
  2342. phandle = <0x66>;
  2343. };
  2344.  
  2345. i2s_platform {
  2346. compatible = "amlogic, aml-i2s";
  2347. interrupts = <0x0 0x1d 0x1>;
  2348. phandle = <0x62>;
  2349. };
  2350.  
  2351. pcm_platform {
  2352. compatible = "amlogic, aml-pcm";
  2353. phandle = <0x63>;
  2354. };
  2355.  
  2356. spdif_codec {
  2357. #sound-dai-cells = <0x0>;
  2358. compatible = "amlogic, aml-spdif-codec";
  2359. pinctrl-names = "audio_spdif";
  2360. pinctrl-0 = <0x5a>;
  2361. phandle = <0x68>;
  2362. };
  2363.  
  2364. pcm_codec {
  2365. #sound-dai-cells = <0x0>;
  2366. compatible = "amlogic, pcm2BT-codec";
  2367. phandle = <0x69>;
  2368. };
  2369.  
  2370. dummy {
  2371. #sound-dai-cells = <0x0>;
  2372. compatible = "amlogic, aml_dummy_codec";
  2373. status = "disable";
  2374. phandle = <0xce>;
  2375. };
  2376.  
  2377. t9015 {
  2378. #sound-dai-cells = <0x0>;
  2379. compatible = "amlogic, aml_codec_T9015";
  2380. reg = <0xc8832000 0x14>;
  2381. status = "okay";
  2382. phandle = <0x67>;
  2383. };
  2384.  
  2385. aml_sound_meson {
  2386. compatible = "aml, meson-snd-card";
  2387. status = "okay";
  2388. aml-sound-card,format = "i2s";
  2389. aml_sound_card,name = "AML-MESONAUDIO";
  2390. aml,audio-routing = "Ext Spk", "LOUTL", "Ext Spk", "LOUTR";
  2391. mute_gpio-gpios = <0x10 0x15 0x0>;
  2392. mute_inv;
  2393. hp_disable;
  2394. hp_paraments = <0x320 0x12c 0x0 0x5 0x1>;
  2395. pinctrl-names = "audio_i2s";
  2396. pinctrl-0 = <0x5b>;
  2397. cpu_list = <0x5c 0x5d 0x5e>;
  2398. codec_list = <0x5f 0x60 0x61>;
  2399. plat_list = <0x62 0x62 0x63>;
  2400.  
  2401. cpudai0 {
  2402. sound-dai = <0x64>;
  2403. phandle = <0x5c>;
  2404. };
  2405.  
  2406. cpudai1 {
  2407. sound-dai = <0x65>;
  2408. phandle = <0x5d>;
  2409. };
  2410.  
  2411. cpudai2 {
  2412. sound-dai = <0x66>;
  2413. phandle = <0x5e>;
  2414. };
  2415.  
  2416. codec0 {
  2417. sound-dai = <0x67>;
  2418. phandle = <0x5f>;
  2419. };
  2420.  
  2421. codec1 {
  2422. sound-dai = <0x68>;
  2423. phandle = <0x60>;
  2424. };
  2425.  
  2426. codec2 {
  2427. sound-dai = <0x69>;
  2428. phandle = <0x61>;
  2429. };
  2430. };
  2431.  
  2432. rdma {
  2433. compatible = "amlogic, meson, rdma";
  2434. dev_name = "amlogic-rdma";
  2435. status = "ok";
  2436. interrupts = <0x0 0x59 0x1>;
  2437. interrupt-names = "rdma";
  2438. };
  2439.  
  2440. amvenc_avc {
  2441. compatible = "amlogic, amvenc_avc";
  2442. dev_name = "amvenc_avc";
  2443. status = "okay";
  2444. interrupts = <0x0 0x2d 0x1>;
  2445. interrupt-names = "mailbox_2";
  2446. };
  2447.  
  2448. hevc_enc {
  2449. compatible = "cnm, HevcEnc";
  2450. dev_name = "HevcEnc";
  2451. status = "okay";
  2452. interrupts = <0x0 0xbb 0x1>;
  2453. interrupt-names = "wave420l_irq";
  2454. #address-cells = <0x1>;
  2455. #size-cells = <0x1>;
  2456. ranges;
  2457.  
  2458. io_reg_base {
  2459. reg = <0xc8810000 0x4000>;
  2460. };
  2461. };
  2462.  
  2463. picdec {
  2464. compatible = "amlogic, picdec";
  2465. memory-region = <0x6a>;
  2466. dev_name = "picdec";
  2467. status = "okay";
  2468. };
  2469.  
  2470. ppmgr {
  2471. compatible = "amlogic, ppmgr";
  2472. memory-region = <0x6b>;
  2473. dev_name = "ppmgr";
  2474. status = "okay";
  2475. };
  2476.  
  2477. deinterlace {
  2478. compatible = "amlogic, deinterlace";
  2479. status = "okay";
  2480. flag_cma = <0x1>;
  2481. memory-region = <0x6c>;
  2482. interrupts = <0x0 0x2e 0x1 0x0 0x6 0x1>;
  2483. interrupt-names = "de_irq", "timerc";
  2484. buffer-size = <0x2fd000>;
  2485. hw-version = <0x2>;
  2486. };
  2487.  
  2488. ionvideo {
  2489. compatible = "amlogic, ionvideo";
  2490. dev_name = "ionvideo";
  2491. status = "okay";
  2492. };
  2493.  
  2494. amlvideo {
  2495. compatible = "amlogic, amlvideo";
  2496. dev_name = "amlvideo";
  2497. status = "okay";
  2498. };
  2499.  
  2500. amlvideo2_0 {
  2501. compatible = "amlogic, amlvideo2";
  2502. dev_name = "amlvideo2";
  2503. status = "okay";
  2504. amlvideo2_id = <0x0>;
  2505. cma_mode = <0x1>;
  2506. };
  2507.  
  2508. amlvideo2_1 {
  2509. compatible = "amlogic, amlvideo2";
  2510. dev_name = "amlvideo2";
  2511. status = "okay";
  2512. amlvideo2_id = <0x1>;
  2513. cma_mode = <0x1>;
  2514. };
  2515.  
  2516. vdin0 {
  2517. compatible = "amlogic, vdin";
  2518. dev_name = "vdin0";
  2519. status = "ok";
  2520. reserve-iomap = "true";
  2521. flag_cma = <0x1>;
  2522. cma_size = <0x10>;
  2523. interrupts = <0x0 0x53 0x1>;
  2524. rdma-irq = <0x2>;
  2525. vdin_id = <0x0>;
  2526. tv_bit_mode = <0x1>;
  2527. };
  2528.  
  2529. vdin1 {
  2530. compatible = "amlogic, vdin";
  2531. memory-region = <0x6d>;
  2532. dev_name = "vdin1";
  2533. status = "ok";
  2534. reserve-iomap = "true";
  2535. flag_cma = <0x0>;
  2536. interrupts = <0x0 0x55 0x1>;
  2537. rdma-irq = <0x4>;
  2538. vdin_id = <0x1>;
  2539. tv_bit_mode = <0x1>;
  2540. };
  2541.  
  2542. amlvecm {
  2543. compatible = "amlogic, vecm";
  2544. dev_name = "aml_vecm";
  2545. status = "okay";
  2546. gamma_en = <0x0>;
  2547. wb_en = <0x0>;
  2548. cm_en = <0x0>;
  2549. cfg_en_osd_100 = <0x1>;
  2550. tx_op_color_primary = <0x0>;
  2551. };
  2552.  
  2553. unifykey {
  2554. compatible = "amlogic, unifykey";
  2555. status = "ok";
  2556. unifykey-num = <0x11>;
  2557. unifykey-index-0 = <0x6e>;
  2558. unifykey-index-1 = <0x6f>;
  2559. unifykey-index-2 = <0x70>;
  2560. unifykey-index-3 = <0x71>;
  2561. unifykey-index-4 = <0x72>;
  2562. unifykey-index-5 = <0x73>;
  2563. unifykey-index-6 = <0x74>;
  2564. unifykey-index-7 = <0x75>;
  2565. unifykey-index-8 = <0x76>;
  2566. unifykey-index-9 = <0x77>;
  2567. unifykey-index-10 = <0x78>;
  2568. unifykey-index-11 = <0x79>;
  2569. unifykey-index-12 = <0x7a>;
  2570. unifykey-index-13 = <0x7b>;
  2571. unifykey-index-14 = <0x7c>;
  2572. unifykey-index-15 = <0x7d>;
  2573. unifykey-index-16 = <0x7e>;
  2574.  
  2575. key_0 {
  2576. key-name = "usid";
  2577. key-device = "normal";
  2578. key-permit = "read", "write", "del";
  2579. phandle = <0x6e>;
  2580. };
  2581.  
  2582. key_1 {
  2583. key-name = "mac";
  2584. key-device = "normal";
  2585. key-permit = "read", "write", "del";
  2586. phandle = <0x6f>;
  2587. };
  2588.  
  2589. key_2 {
  2590. key-name = "hdcp";
  2591. key-device = "secure";
  2592. key-type = "sha1";
  2593. key-permit = "read", "write", "del";
  2594. phandle = <0x70>;
  2595. };
  2596.  
  2597. key_3 {
  2598. key-name = "secure_boot_set";
  2599. key-device = "efuse";
  2600. key-permit = "write";
  2601. phandle = <0x71>;
  2602. };
  2603.  
  2604. key_4 {
  2605. key-name = "mac_bt";
  2606. key-device = "normal";
  2607. key-permit = "read", "write", "del";
  2608. key-type = "mac";
  2609. phandle = <0x72>;
  2610. };
  2611.  
  2612. key_5 {
  2613. key-name = "mac_wifi";
  2614. key-device = "normal";
  2615. key-permit = "read", "write", "del";
  2616. key-type = "mac";
  2617. phandle = <0x73>;
  2618. };
  2619.  
  2620. key_6 {
  2621. key-name = "hdcp2_tx";
  2622. key-device = "normal";
  2623. key-permit = "read", "write", "del";
  2624. phandle = <0x74>;
  2625. };
  2626.  
  2627. key_7 {
  2628. key-name = "hdcp2_rx";
  2629. key-device = "normal";
  2630. key-permit = "read", "write", "del";
  2631. phandle = <0x75>;
  2632. };
  2633.  
  2634. key_8 {
  2635. key-name = "widevinekeybox";
  2636. key-device = "secure";
  2637. key-permit = "read", "write", "del";
  2638. phandle = <0x76>;
  2639. };
  2640.  
  2641. key_9 {
  2642. key-name = "deviceid";
  2643. key-device = "normal";
  2644. key-permit = "read", "write", "del";
  2645. phandle = <0x77>;
  2646. };
  2647.  
  2648. key_10 {
  2649. key-name = "hdcp22_fw_private";
  2650. key-device = "secure";
  2651. key-permit = "read", "write", "del";
  2652. phandle = <0x78>;
  2653. };
  2654.  
  2655. key_11 {
  2656. key-name = "PlayReadykeybox25";
  2657. key-device = "secure";
  2658. key-permit = "read", "write", "del";
  2659. phandle = <0x79>;
  2660. };
  2661.  
  2662. key_12 {
  2663. key-name = "prpubkeybox";
  2664. key-device = "secure";
  2665. key-permit = "read", "write", "del";
  2666. phandle = <0x7a>;
  2667. };
  2668.  
  2669. key_13 {
  2670. key-name = "prprivkeybox";
  2671. key-device = "secure";
  2672. key-permit = "read", "write", "del";
  2673. phandle = <0x7b>;
  2674. };
  2675.  
  2676. key_14 {
  2677. key-name = "attestationkeybox";
  2678. key-device = "secure";
  2679. key-permit = "read", "write", "del";
  2680. phandle = <0x7c>;
  2681. };
  2682.  
  2683. key_15 {
  2684. key-name = "region_code";
  2685. key-device = "normal";
  2686. key-permit = "read", "write", "del";
  2687. phandle = <0x7d>;
  2688. };
  2689.  
  2690. key_16 {
  2691. key-name = "netflix_mgkid";
  2692. key-device = "secure";
  2693. key-permit = "read", "write", "del";
  2694. phandle = <0x7e>;
  2695. };
  2696. };
  2697.  
  2698. __symbols__ {
  2699. gpu = "/mali@d00c0000";
  2700. clk125_cfg = "/mali@d00c0000/clk125_cfg";
  2701. clk250_cfg = "/mali@d00c0000/clk250_cfg";
  2702. clk285_cfg = "/mali@d00c0000/clk285_cfg";
  2703. clk400_cfg = "/mali@d00c0000/clk400_cfg";
  2704. clk500_cfg = "/mali@d00c0000/clk500_cfg";
  2705. clk666_cfg = "/mali@d00c0000/clk666_cfg";
  2706. clk750_cfg = "/mali@d00c0000/clk750_cfg";
  2707. clk800_cfg = "/mali@d00c0000/clk800_cfg";
  2708. cpus = "/cpus";
  2709. cluster0 = "/cpus/cpu-map/cluster0";
  2710. CPU0 = "/cpus/cpu@0";
  2711. CPU1 = "/cpus/cpu@1";
  2712. CPU2 = "/cpus/cpu@2";
  2713. CPU3 = "/cpus/cpu@3";
  2714. SYSTEM_SLEEP_0 = "/cpus/idle-states/system-sleep-0";
  2715. gic = "/interrupt-controller@2c001000";
  2716. meson_suspend = "/pm";
  2717. wdt = "/watchdog@0xffd0f0d0";
  2718. mailbox = "/mhu@c883c400";
  2719. scpi_dvfs = "/scpi_clocks/scpi_clocks@0";
  2720. xtal = "/xtal-clk";
  2721. spicc = "/@c1108d80";
  2722. uart_AO = "/serial@c81004c0";
  2723. uart_A = "/serial@c11084c0";
  2724. uart_B = "/serial@c11084dc";
  2725. uart_C = "/serial@c1108700";
  2726. uart_AO_B = "/serial@c81004e0";
  2727. pinctrl_aobus = "/pinctrl@14";
  2728. gpio_ao = "/pinctrl@14/bank@14";
  2729. remote_pins = "/pinctrl@14/remote_pin";
  2730. sd_to_ao_uart_clr_pins = "/pinctrl@14/sd_to_ao_uart_clr_pins";
  2731. sd_to_ao_uart_pins = "/pinctrl@14/sd_to_ao_uart_pins";
  2732. ao_uart_pins = "/pinctrl@14/ao_uart";
  2733. ao_b_uart_pins = "/pinctrl@14/ao_b_uart";
  2734. ao_i2c_master = "/pinctrl@14/ao_i2c";
  2735. hdmitx_aocec = "/pinctrl@14/hdmitx_aocec";
  2736. hdmitx_eecec = "/pinctrl@14/hdmitx_eecec";
  2737. pinctrl_periphs = "/pinctrl@4b0";
  2738. gpio = "/pinctrl@4b0/bank@4b0";
  2739. external_eth_pins = "/pinctrl@4b0/external_eth_pins";
  2740. jtag_apao_pins = "/pinctrl@4b0/jtag_apao_pin";
  2741. jtag_apee_pins = "/pinctrl@4b0/jtag_apee_pin";
  2742. a_uart_pins = "/pinctrl@4b0/a_uart";
  2743. b_uart_pins = "/pinctrl@4b0/b_uart";
  2744. c_uart_pins = "/pinctrl@4b0/c_uart";
  2745. wifi_32k_pins = "/pinctrl@4b0/wifi_32k_pins";
  2746. ao_to_sd_uart_clr_pins = "/pinctrl@4b0/ao_to_sd_uart_clr_pins";
  2747. sd_1bit_pins = "/pinctrl@4b0/sd_1bit_pins";
  2748. ao_to_sd_uart_pins = "/pinctrl@4b0/ao_to_sd_uart_pins";
  2749. emmc_clk_cmd_pins = "/pinctrl@4b0/emmc_clk_cmd_pins";
  2750. emmc_conf_pull_up = "/pinctrl@4b0/emmc_conf_pull_up";
  2751. emmc_conf_pull_done = "/pinctrl@4b0/emmc_conf_pull_done";
  2752. sd_clk_cmd_pins = "/pinctrl@4b0/sd_clk_cmd_pins";
  2753. sd_all_pins = "/pinctrl@4b0/sd_all_pins";
  2754. sdio_clk_cmd_pins = "/pinctrl@4b0/sdio_clk_cmd_pins";
  2755. sdio_all_pins = "/pinctrl@4b0/sdio_all_pins";
  2756. sd_iso7816_pins = "/pinctrl@4b0/sd_iso7816_pins";
  2757. nand_pulldown = "/pinctrl@4b0/nand_pulldown";
  2758. nand_pullup = "/pinctrl@4b0/nand_pullup";
  2759. all_nand_pins = "/pinctrl@4b0/all_nand_pins";
  2760. nand_cs_pins = "/pinctrl@4b0/nand_cs";
  2761. hdmitx_hpd = "/pinctrl@4b0/hdmitx_hpd";
  2762. hdmitx_ddc = "/pinctrl@4b0/hdmitx_ddc";
  2763. a_i2c_master = "/pinctrl@4b0/a_i2c";
  2764. b_i2c_master = "/pinctrl@4b0/b_i2c";
  2765. c_i2c_master = "/pinctrl@4b0/c_i2c";
  2766. c_i2c_master_pin1 = "/pinctrl@4b0/c_i2c_pin1";
  2767. d_i2c_master = "/pinctrl@4b0/d_i2c";
  2768. spicc_pulldown_z11z12z13 = "/pinctrl@4b0/spicc_pulldown_z11z12z13";
  2769. spicc_pullup_z11z12z13 = "/pinctrl@4b0/spicc_pullup_z11z12z13";
  2770. spicc_pulldown_x8x9x11 = "/pinctrl@4b0/spicc_pulldown_x8x9x11";
  2771. spicc_pullup_x8x9x11 = "/pinctrl@4b0/spicc_pullup_x8x9x11";
  2772. audio_i2s_pins = "/pinctrl@4b0/audio_i2s";
  2773. audio_spdif_pins = "/pinctrl@4b0/audio_spdif";
  2774. audio_spdif_in_pins = "/pinctrl@4b0/audio_spdif_in";
  2775. audio_spdif_in_1_pins = "/pinctrl@4b0/audio_spdif_in_1";
  2776. audio_pcm_pins = "/pinctrl@4b0/audio_pcm";
  2777. aml_dmic_pins = "/pinctrl@4b0/audio_dmic";
  2778. dvb_p_ts0_pins = "/pinctrl@4b0/dvb_p_ts0_pins";
  2779. dvb_s_ts0_pins = "/pinctrl@4b0/dvb_s_ts0_pins";
  2780. lcd_ttl_rgb_6bit_on_pins = "/pinctrl@4b0/lcd_ttl_rgb_6bit_on";
  2781. lcd_ttl_rgb_6bit_off_pins = "/pinctrl@4b0/lcd_ttl_rgb_6bit_off";
  2782. lcd_ttl_rgb_8bit_on_pins = "/pinctrl@4b0/lcd_ttl_rgb_8bit_on";
  2783. lcd_ttl_rgb_8bit_off_pins = "/pinctrl@4b0/lcd_ttl_rgb_8bit_off";
  2784. lcd_ttl_de_on_pins = "/pinctrl@4b0/lcd_ttl_de_on_pin";
  2785. lcd_ttl_hvsync_on_pins = "/pinctrl@4b0/lcd_ttl_hvsync_on_pin";
  2786. lcd_ttl_de_hvsync_on_pins = "/pinctrl@4b0/lcd_ttl_de_hvsync_on_pin";
  2787. lcd_ttl_de_hvsync_off_pins = "/pinctrl@4b0/lcd_ttl_de_hvsync_off_pin";
  2788. cbus = "/soc/cbus@c1100000";
  2789. gpio_intc = "/soc/cbus@c1100000/interrupt-controller@9880";
  2790. i2c0 = "/soc/cbus@c1100000/i2c@8500";
  2791. i2c1 = "/soc/cbus@c1100000/i2c@87c0";
  2792. i2c2 = "/soc/cbus@c1100000/i2c@87e0";
  2793. i2c3 = "/soc/cbus@c1100000/i2c@8d20";
  2794. reset = "/soc/cbus@c1100000/reset-controller@4404";
  2795. aobus = "/soc/aobus@c8100000";
  2796. i2c_AO = "/soc/aobus@c8100000/i2c@0500";
  2797. periphs = "/soc/periphs@c8834000";
  2798. hiubus = "/soc/hiubus@c883c000";
  2799. clkc = "/soc/hiubus@c883c000/clock-controller@0";
  2800. apb = "/soc/apb@d0000000";
  2801. defendkey = "/defendkey";
  2802. audio_data = "/audio_data";
  2803. saradc = "/saradc";
  2804. efuse = "/efuse";
  2805. efusekey = "/efusekey";
  2806. key_0 = "/efusekey/key_0";
  2807. key_1 = "/efusekey/key_1";
  2808. key_2 = "/efusekey/key_2";
  2809. key_3 = "/efusekey/key_3";
  2810. remote = "/rc@c8100580";
  2811. custom_maps = "/custom_maps";
  2812. map_0 = "/custom_maps/map_0";
  2813. map_1 = "/custom_maps/map_1";
  2814. map_2 = "/custom_maps/map_2";
  2815. pwm_ab = "/pwm@c1108550";
  2816. pwm_cd = "/pwm@c1108640";
  2817. pwm_ef = "/pwm@c11086c0";
  2818. pwm_aoab = "/pwm@c8100550";
  2819. partitions = "/partitions";
  2820. logo = "/partitions/logo";
  2821. recovery = "/partitions/recovery";
  2822. misc = "/partitions/misc";
  2823. dtbo = "/partitions/dtbo";
  2824. cri_data = "/partitions/cri_data";
  2825. rsv = "/partitions/rsv";
  2826. metadata = "/partitions/metadata";
  2827. vbmeta = "/partitions/vbmeta";
  2828. param = "/partitions/param";
  2829. boot = "/partitions/boot";
  2830. tee = "/partitions/tee";
  2831. vendor = "/partitions/vendor";
  2832. odm = "/partitions/odm";
  2833. system = "/partitions/system";
  2834. product = "/partitions/product";
  2835. cache = "/partitions/cache";
  2836. data = "/partitions/data";
  2837. secmon_reserved = "/reserved-memory/linux,secmon";
  2838. secos_reserved = "/reserved-memory/linux,secos";
  2839. logo_reserved = "/reserved-memory/linux,meson-fb";
  2840. codec_mm_cma = "/reserved-memory/linux,codec_mm_cma";
  2841. di_cma_reserved = "/reserved-memory/linux,di_cma";
  2842. ion_reserved = "/reserved-memory/linux,ion-dev";
  2843. vdin1_cma_reserved = "/reserved-memory/linux,vdin1_cma";
  2844. ppmgr_reserved = "/reserved-memory/linux,ppmgr";
  2845. picdec_cma_reserved = "/reserved-memory/linux,picdec";
  2846. codec_mm_reserved = "/reserved-memory/linux,codec_mm_reserved";
  2847. amlogic_battery = "/dummy-battery";
  2848. amlogic_charger = "/dummy-charger";
  2849. wifi_pwm_conf = "/wifi_pwm_conf";
  2850. sd_emmc_c = "/emmc@d0074000";
  2851. sd_emmc_b = "/sd@d0072000";
  2852. sd_emmc_a = "/sdio@d0070000";
  2853. bootloader = "/mtd_nand/bootloader";
  2854. nandnormal = "/mtd_nand/nandnormal";
  2855. nand_partitions = "/mtd_nand/nand_partition";
  2856. ethmac = "/ethernet@0xc9410000";
  2857. aml_sensor0 = "/aml-sensor@0";
  2858. cpufreq_cool0 = "/aml-sensor@0/cpufreq_cool0";
  2859. cpucore_cool0 = "/aml-sensor@0/cpucore_cool0";
  2860. gpufreq_cool0 = "/aml-sensor@0/gpufreq_cool0";
  2861. gpucore_cool0 = "/aml-sensor@0/gpucore_cool0";
  2862. switch_on = "/thermal-zones/soc_thermal/trips/trip-point@0";
  2863. control = "/thermal-zones/soc_thermal/trips/trip-point@1";
  2864. hot = "/thermal-zones/soc_thermal/trips/trip-point@2";
  2865. critical = "/thermal-zones/soc_thermal/trips/trip-point@3";
  2866. dwc3 = "/dwc3@c9000000";
  2867. usb2_phy = "/usb2phy@d0078000";
  2868. usb3_phy = "/usb3phy@d0078080";
  2869. amhdmitx = "/amhdmitx";
  2870. vend_data = "/amhdmitx/vend_data";
  2871. aocec = "/aocec";
  2872. i2s_dai = "/I2S";
  2873. dmic = "/snd_dmic";
  2874. spdif_dai = "/SPDIF";
  2875. pcm_dai = "/PCM";
  2876. i2s_plat = "/i2s_platform";
  2877. pcm_plat = "/pcm_platform";
  2878. spdif_codec = "/spdif_codec";
  2879. pcm_codec = "/pcm_codec";
  2880. dummy_codec = "/dummy";
  2881. amlogic_codec = "/t9015";
  2882. cpudai0 = "/aml_sound_meson/cpudai0";
  2883. cpudai1 = "/aml_sound_meson/cpudai1";
  2884. cpudai2 = "/aml_sound_meson/cpudai2";
  2885. codec0 = "/aml_sound_meson/codec0";
  2886. codec1 = "/aml_sound_meson/codec1";
  2887. codec2 = "/aml_sound_meson/codec2";
  2888. keysn_0 = "/unifykey/key_0";
  2889. keysn_1 = "/unifykey/key_1";
  2890. keysn_2 = "/unifykey/key_2";
  2891. keysn_3 = "/unifykey/key_3";
  2892. keysn_4 = "/unifykey/key_4";
  2893. keysn_5 = "/unifykey/key_5";
  2894. keysn_6 = "/unifykey/key_6";
  2895. keysn_7 = "/unifykey/key_7";
  2896. keysn_8 = "/unifykey/key_8";
  2897. keysn_9 = "/unifykey/key_9";
  2898. keysn_10 = "/unifykey/key_10";
  2899. keysn_11 = "/unifykey/key_11";
  2900. keysn_12 = "/unifykey/key_12";
  2901. keysn_13 = "/unifykey/key_13";
  2902. keysn_14 = "/unifykey/key_14";
  2903. keysn_15 = "/unifykey/key_15";
  2904. keysn_16 = "/unifykey/key_16";
  2905. };
  2906. };
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