ALU

`timescale 1ns / 1ps

// part of the EXECUTE phase of the pipeline

module ALU  (
            input [31:0] A, B,
            input [4:0] SH, FS,
            output reg Z, C, N, V,  // Z needs to end up in top phase comb. ckt.
            output reg [31:0] F
            );

localparam ADD = 5'b00010; //1-
localparam SUB = 5'b00101; //2--
localparam SLT = 5'b00101; //2--
localparam AND = 5'b01000; //3---
localparam OR = 5'b01010;  //4----
localparam XOR = 5'b01100; //5-----
localparam ADI = 5'b00010; //1-
localparam SBI = 5'b00101; //2--
localparam NOT = 5'b01110;
localparam ANI = 5'b01000; //3---
localparam ORI = 5'b01010; //4----
localparam XRI = 5'b01100; //5-----
localparam AIU = 5'b00010; //1-
localparam SIU = 5'b00101; //2--
localparam MOV = 5'b00000; //6------
localparam LSL = 5'b10000;
localparam LSR = 5'b10001;
localparam BZ = 5'b00000;  //6------
localparam BNZ = 5'b00000; //6------
localparam JML = 5'b00111;
// in total, 10 unique cases

initial begin
    {Z,C,N,V} = 0;
end

always@(*) begin
    case(FS)
        ADD:    // ADI, ADI, AIU
        begin
            {C,F} = A + B;
            V = (((A[31]) && (B[31])) && (!F[31]))? 1 : // neg + neg --> pos
                (((!A[31]) && (!B[31])) && (F[31]))? 1 : 0; // pos + pos --> neg
        end
        SUB:    // SLT, SBI, SIU
        begin
            F = A - B;  // A + (~B) + 1;
            V = (((A[31]) && (!B[31])) && (!F[31]))? 1 : // neg - pos --> pos
                (((!A[31]) && (B[31])) && (F[31]))? 1 : 0; // pos - (neg) --> neg
        end
        AND:    // ANI
            F = A&B;
        OR:     // ORI
            F = A|B;
        XOR:    // XRI
            F = A^B;
        NOT:
            F = ~A;
        MOV:    // BZ, BNZ
            F = A;
        LSL:
            F = A<<SH;
        LSR:
            F = A>>SH;
        JML:
            F = A;  // PC_1 passes thru from MUX A (MA = 1)
        default: F = 0; //?
    endcase
    // c, z, v, n
    // c, v taken care of
    Z = ((FS == MOV) || (FS == JML))? Z :
        (F==0)? 1 : 0;

    N = ((FS == MOV) || (FS == JML))? N : // Move operation or any branching results in no status bit effects
        (F[31])? 1 : 0;
end

endmodule