dtung

fir_tb.v

Jun 23rd, 2021
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  1. `timescale 1ns / 1ps
  2. //////////////////////////////////////////////////////////////////////////////////
  3. // Company:
  4. // Engineer:
  5. //
  6. // Create Date: 06/22/2021 04:41:03 PM
  7. // Design Name:
  8. // Module Name: fir_tb
  9. // Project Name:
  10. // Target Devices:
  11. // Tool Versions:
  12. // Description:
  13. //
  14. // Dependencies:
  15. //
  16. // Revision:
  17. // Revision 0.01 - File Created
  18. // Additional Comments:
  19. //
  20. //////////////////////////////////////////////////////////////////////////////////
  21.  
  22.  
  23. module fir_tb(
  24.     );
  25.     parameter COEFF_WIDTH = 8, DATA_WIDTH = 16, OUT_WIDTH = 32, FIR_LENGTH = 16;
  26.    
  27.     reg clk, reset;
  28.     reg coeff_en;
  29.     reg signed [COEFF_WIDTH-1:0] coeff;
  30.     reg data_en;
  31.     reg signed [DATA_WIDTH-1:0] data;
  32.     wire out_en;
  33.     wire signed [OUT_WIDTH-1:0] out;
  34.    
  35.     fir #(.COEFF_WIDTH(COEFF_WIDTH), .DATA_WIDTH(DATA_WIDTH), .OUT_WIDTH(OUT_WIDTH), .FIR_LENGTH(FIR_LENGTH)) f0(
  36.         .clk(clk), .reset(reset), .coeff_en(coeff_en), .coeff(coeff),
  37.         .data_en(data_en), .data(data), .out_en(out_en), .out(out));
  38.      
  39.     always
  40.         #5 clk <= ~clk;
  41.  
  42.     initial
  43.     begin
  44.         clk <= 1; reset <= 1; coeff_en <= 0; data_en <= 0; coeff <= 0; data <= 0;
  45.         #10 reset <= 0;
  46.         #0.01
  47.         #10 coeff <= 1; coeff_en <= 1;
  48.         #10 coeff <= 3; coeff_en <= 1;
  49.         #10 coeff <= 9; coeff_en <= 1;
  50.         #10 coeff <= 22; coeff_en <= 1;
  51.         #10 coeff <= 44; coeff_en <= 1;
  52.         #10 coeff <= 74; coeff_en <= 1;
  53.         #10 coeff <= 105; coeff_en <= 1;
  54.         #10 coeff <= 124; coeff_en <= 1;
  55.         #10 coeff <= 124; coeff_en <= 1;
  56.         #10 coeff <= 105; coeff_en <= 1;
  57.         #10 coeff <= 74; coeff_en <= 1;
  58.         #10 coeff <= 44; coeff_en <= 1;
  59.         #10 coeff <= 22; coeff_en <= 1;
  60.         #10 coeff <= 9; coeff_en <= 1;
  61.         #10 coeff <= 3; coeff_en <= 1;
  62.         #10 coeff <= 1; coeff_en <= 1;
  63.         #10 data <= 0; coeff_en <= 0; data_en <= 1;
  64.         #10 data <= 49; data_en <= 1;
  65.         #10 data <= 90; data_en <= 1;
  66.         #10 data <= 117; data_en <= 1;
  67.         #10 data <= 127; data_en <= 1;
  68.         #10 data <= 117; data_en <= 1;
  69.         #10 data <= 90; data_en <= 1;
  70.         #10 data <= 49; data_en <= 1;
  71.         #10 data <= 0; data_en <= 1;
  72.         #10 data <= -49; data_en <= 1;
  73.         #10 data <= -90; data_en <= 1;
  74.         #10 data <= -117; data_en <= 1;
  75.         #10 data <= -127; data_en <= 1;
  76.         #10 data <= -117; data_en <= 1;
  77.         #10 data <= -90; data_en <= 1;
  78.         #10 data <= -49; data_en <= 1;
  79.         #10 data <= 0; data_en <= 1;
  80.         #10 data <= 0; data_en <= 1;
  81.         #10 data <= 0; data_en <= 1;
  82.         #10 data <= 0; data_en <= 1;
  83.         #10 data <= 0; data_en <= 1;
  84.         #10 data <= 0; data_en <= 1;
  85.         #10 data <= 0; data_en <= 1;
  86.         #10 data <= 0; data_en <= 1;
  87.         #10 data <= 0; data_en <= 1;
  88.         #10 data <= 0; data_en <= 1;
  89.         #10 data <= 0; data_en <= 1;
  90.         #10 data <= 0; data_en <= 1;
  91.         #10 data <= 0; data_en <= 1;
  92.         #10 data <= 0; data_en <= 1;
  93.         #10 data <= 0; data_en <= 1;
  94.         #10 data_en <= 0;        
  95.         #50 $finish;
  96.     end
  97. endmodule
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