mov r5, 32
    loop end_test, 32    // loop through the first 32 data bits
    wbs	DCLK              // wait for DCLK to go high
    wbc DCLK              // wait till the DCLK goes low
    qbbc skippy, r10, r5   // if the bit is clear, skip setting it
    set T1_OUT
skippy:
    qbbs skippy2, r10, r5
    clr T1_OUT
skippy2:
    sub r5, r5, 1
end_test:             // the first 32 bits have been received