Lab4

module Lab4(
                input [17:0] SW,
                output reg [17:0] LEDR
);

    reg[3:0] ov;
    initial begin
        LEDR[17:0] = 18'b0;

    end

    always
        begin
            if(SW[8]==0) begin
                if(SW[3] != SW[7]) begin
                    LEDR[3:0] = SW[3:0]+SW[7:4];
                end
                else if(SW[3] == 0 && SW[7] == 0) begin
                    ov = SW[2:0] + SW[6:4];
                    if(ov[3] == 1) begin
                        LEDR[17] = 1;
                    end
                    else begin
                        LEDR[3:0] = SW[2:0]+SW[6:4];
                        LEDR[17] = 0;
                    end
                end
            end
        end

endmodule