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mocha.dts

Insei
Jul 19th, 2016
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  1. /dts-v1/;
  2.  
  3. / {
  4. #address-cells = <0x1>;
  5. #size-cells = <0x1>;
  6. compatible = "nvidia,mocha", "nvidia,tegra124";
  7. interrupt-parent = <0x1>;
  8. model = "NVIDIA Tegra124 TN8";
  9. nvidia,dtsfilename = __FILE__;
  10. nvidia,boardids = "1780:1100:3:A:7", "1845:1000:0:A:7";
  11.  
  12. aliases {
  13. i2c0 = "/i2c@7000c000";
  14. i2c1 = "/i2c@7000c400";
  15. i2c2 = "/i2c@7000c500";
  16. i2c3 = "/i2c@7000c700";
  17. i2c4 = "/i2c@7000d000";
  18. i2c5 = "/i2c@7000d100";
  19. serial0 = "/serial@70006000";
  20. serial1 = "/serial@70006040";
  21. serial2 = "/serial@70006200";
  22. serial3 = "/serial@70006300";
  23. spi0 = "/spi@7000d400";
  24. spi1 = "/spi@7000d600";
  25. spi2 = "/spi@7000d800";
  26. spi3 = "/spi@7000da00";
  27. spi4 = "/spi@7000dc00";
  28. spi5 = "/spi@7000de00";
  29. };
  30.  
  31. gpio@6000d000 {
  32. compatible = "nvidia,tegra124-gpio", "nvidia,tegra30-gpio";
  33. reg = <0x6000d000 0x1000>;
  34. interrupts = <0x0 0x20 0x4 0x0 0x21 0x4 0x0 0x22 0x4 0x0 0x23 0x4 0x0 0x37 0x4 0x0 0x57 0x4 0x0 0x59 0x4 0x0 0x7d 0x4>;
  35. #gpio-cells = <0x2>;
  36. gpio-controller;
  37. #interrupt-cells = <0x2>;
  38. interrupt-controller;
  39. gpio-init-names = "default";
  40. gpio-init-0 = <0x2>;
  41. linux,phandle = <0x7>;
  42. phandle = <0x7>;
  43.  
  44. default {
  45. gpio-input = <0x2 0x3 0x32 0x33 0x45 0x46 0x47 0x48 0x52 0x80 0x85 0x86 0x87 0x8f 0x90 0x95 0xa5 0xa6 0xb2 0xb3 0xbb>;
  46. gpio-output-low = <0x4 0x5 0x36 0x37 0x3d 0x40 0x51 0x54 0x84 0x88 0x89 0x8b 0x8d 0x96 0xb9 0xbf 0xdb 0xde 0xdf 0xe1 0xe5 0xf1>;
  47. gpio-output-high = <0x3b 0x44 0x8a 0x92 0xb5 0xbd 0xdc 0xdd>;
  48. linux,phandle = <0x2>;
  49. phandle = <0x2>;
  50. };
  51. };
  52.  
  53. se@70012000 {
  54. compatible = "nvidia,tegra124-se";
  55. reg = <0x70012000 0x2000 0x7000e400 0x400>;
  56. interrupts = <0x0 0x3a 0x4>;
  57. };
  58.  
  59. clock {
  60. compatible = "nvidia,tegra124-car";
  61. reg = <0x60006000 0x1000>;
  62. #clock-cells = <0x1>;
  63. linux,phandle = <0xe>;
  64. phandle = <0xe>;
  65. };
  66.  
  67. dma@60020000 {
  68. compatible = "nvidia,tegra124-apbdma";
  69. reg = <0x60020000 0x1400>;
  70. interrupts = <0x0 0x68 0x4 0x0 0x69 0x4 0x0 0x6a 0x4 0x0 0x6b 0x4 0x0 0x6c 0x4 0x0 0x6d 0x4 0x0 0x6e 0x4 0x0 0x6f 0x4 0x0 0x70 0x4 0x0 0x71 0x4 0x0 0x72 0x4 0x0 0x73 0x4 0x0 0x74 0x4 0x0 0x75 0x4 0x0 0x76 0x4 0x0 0x77 0x4 0x0 0x80 0x4 0x0 0x81 0x4 0x0 0x82 0x4 0x0 0x83 0x4 0x0 0x84 0x4 0x0 0x85 0x4 0x0 0x86 0x4 0x0 0x87 0x4 0x0 0x88 0x4 0x0 0x89 0x4 0x0 0x8a 0x4 0x0 0x8b 0x4 0x0 0x8c 0x4 0x0 0x8d 0x4 0x0 0x8e 0x4 0x0 0x8f 0x4>;
  71. linux,phandle = <0x6>;
  72. phandle = <0x6>;
  73. };
  74.  
  75. pinmux {
  76. compatible = "nvidia,tegra124-pinmux";
  77. reg = <0x70000868 0x164 0x70003000 0x434>;
  78. status = "okay";
  79. pinctrl-names = "default", "drive", "unused";
  80. pinctrl-0 = <0x3>;
  81. pinctrl-1 = <0x4>;
  82. pinctrl-2 = <0x5>;
  83.  
  84. common {
  85. linux,phandle = <0x3>;
  86. phandle = <0x3>;
  87.  
  88. dap_mclk1_pw4 {
  89. nvidia,pins = "dap_mclk1_pw4";
  90. nvidia,function = "extperiph1";
  91. nvidia,enable-input = <0x0>;
  92. nvidia,pull = <0x0>;
  93. nvidia,tristate = <0x0>;
  94. };
  95.  
  96. dap1_din_pn1 {
  97. nvidia,pins = "dap1_din_pn1";
  98. nvidia,function = "i2s0";
  99. nvidia,enable-input = <0x1>;
  100. nvidia,pull = <0x0>;
  101. nvidia,tristate = <0x1>;
  102. };
  103.  
  104. dap1_dout_pn2 {
  105. nvidia,pins = "dap1_dout_pn2";
  106. nvidia,function = "i2s0";
  107. nvidia,enable-input = <0x0>;
  108. nvidia,pull = <0x0>;
  109. nvidia,tristate = <0x1>;
  110. };
  111.  
  112. dap1_fs_pn0 {
  113. nvidia,pins = "dap1_fs_pn0";
  114. nvidia,function = "i2s0";
  115. nvidia,enable-input = <0x1>;
  116. nvidia,pull = <0x0>;
  117. nvidia,tristate = <0x1>;
  118. };
  119.  
  120. dap1_sclk_pn3 {
  121. nvidia,pins = "dap1_sclk_pn3";
  122. nvidia,function = "i2s0";
  123. nvidia,enable-input = <0x1>;
  124. nvidia,pull = <0x0>;
  125. nvidia,tristate = <0x1>;
  126. };
  127.  
  128. dap2_din_pa4 {
  129. nvidia,pins = "dap2_din_pa4";
  130. nvidia,function = "safe";
  131. nvidia,enable-input = <0x0>;
  132. nvidia,pull = <0x0>;
  133. nvidia,tristate = <0x0>;
  134. };
  135.  
  136. dap2_dout_pa5 {
  137. nvidia,pins = "dap2_dout_pa5";
  138. nvidia,function = "safe";
  139. nvidia,enable-input = <0x0>;
  140. nvidia,pull = <0x0>;
  141. nvidia,tristate = <0x0>;
  142. };
  143.  
  144. dap2_fs_pa2 {
  145. nvidia,pins = "dap2_fs_pa2";
  146. nvidia,function = "safe";
  147. nvidia,enable-input = <0x1>;
  148. nvidia,pull = <0x2>;
  149. nvidia,tristate = <0x0>;
  150. };
  151.  
  152. dap2_sclk_pa3 {
  153. nvidia,pins = "dap2_sclk_pa3";
  154. nvidia,function = "safe";
  155. nvidia,enable-input = <0x1>;
  156. nvidia,pull = <0x2>;
  157. nvidia,tristate = <0x0>;
  158. };
  159.  
  160. dvfs_pwm_px0 {
  161. nvidia,pins = "dvfs_pwm_px0";
  162. nvidia,function = "cldvfs";
  163. nvidia,enable-input = <0x0>;
  164. nvidia,pull = <0x0>;
  165. nvidia,tristate = <0x1>;
  166. };
  167.  
  168. dvfs_clk_px2 {
  169. nvidia,pins = "dvfs_clk_px2";
  170. nvidia,function = "cldvfs";
  171. nvidia,enable-input = <0x0>;
  172. nvidia,pull = <0x0>;
  173. nvidia,tristate = <0x0>;
  174. };
  175.  
  176. cam_i2c_scl_pbb1 {
  177. nvidia,pins = "cam_i2c_scl_pbb1";
  178. nvidia,function = "i2c3";
  179. nvidia,enable-input = <0x1>;
  180. nvidia,pull = <0x0>;
  181. nvidia,tristate = <0x0>;
  182. nvidia,lock = <0x0>;
  183. nvidia,open-drain = <0x0>;
  184. };
  185.  
  186. cam_i2c_sda_pbb2 {
  187. nvidia,pins = "cam_i2c_sda_pbb2";
  188. nvidia,function = "i2c3";
  189. nvidia,enable-input = <0x1>;
  190. nvidia,pull = <0x0>;
  191. nvidia,tristate = <0x0>;
  192. nvidia,lock = <0x0>;
  193. nvidia,open-drain = <0x0>;
  194. };
  195.  
  196. cam_mclk_pcc0 {
  197. nvidia,pins = "cam_mclk_pcc0";
  198. nvidia,function = "vi_alt3";
  199. nvidia,enable-input = <0x0>;
  200. nvidia,pull = <0x0>;
  201. nvidia,tristate = <0x0>;
  202. };
  203.  
  204. pbb0 {
  205. nvidia,pins = "pbb0";
  206. nvidia,function = "vimclk2_alt";
  207. nvidia,enable-input = <0x0>;
  208. nvidia,pull = <0x0>;
  209. nvidia,tristate = <0x0>;
  210. };
  211.  
  212. gen2_i2c_scl_pt5 {
  213. nvidia,pins = "gen2_i2c_scl_pt5";
  214. nvidia,function = "i2c2";
  215. nvidia,enable-input = <0x1>;
  216. nvidia,pull = <0x0>;
  217. nvidia,tristate = <0x0>;
  218. nvidia,lock = <0x0>;
  219. nvidia,open-drain = <0x0>;
  220. };
  221.  
  222. gen2_i2c_sda_pt6 {
  223. nvidia,pins = "gen2_i2c_sda_pt6";
  224. nvidia,function = "i2c2";
  225. nvidia,enable-input = <0x1>;
  226. nvidia,pull = <0x0>;
  227. nvidia,tristate = <0x0>;
  228. nvidia,lock = <0x0>;
  229. nvidia,open-drain = <0x0>;
  230. };
  231.  
  232. pj7 {
  233. nvidia,pins = "pj7";
  234. nvidia,function = "uartd";
  235. nvidia,enable-input = <0x0>;
  236. nvidia,pull = <0x0>;
  237. nvidia,tristate = <0x0>;
  238. };
  239.  
  240. pb0 {
  241. nvidia,pins = "pb0";
  242. nvidia,function = "uartd";
  243. nvidia,enable-input = <0x1>;
  244. nvidia,pull = <0x2>;
  245. nvidia,tristate = <0x1>;
  246. };
  247.  
  248. pg6 {
  249. nvidia,pins = "pg6";
  250. nvidia,function = "safe";
  251. nvidia,enable-input = <0x0>;
  252. nvidia,pull = <0x0>;
  253. nvidia,tristate = <0x0>;
  254. };
  255.  
  256. pg7 {
  257. nvidia,pins = "pg7";
  258. nvidia,function = "safe";
  259. nvidia,enable-input = <0x0>;
  260. nvidia,pull = <0x0>;
  261. nvidia,tristate = <0x0>;
  262. };
  263.  
  264. ph0 {
  265. nvidia,pins = "ph0";
  266. nvidia,function = "pwm0";
  267. nvidia,enable-input = <0x0>;
  268. nvidia,pull = <0x0>;
  269. nvidia,tristate = <0x0>;
  270. };
  271.  
  272. ph1 {
  273. nvidia,pins = "ph1";
  274. nvidia,function = "pwm1";
  275. nvidia,enable-input = <0x0>;
  276. nvidia,pull = <0x0>;
  277. nvidia,tristate = <0x0>;
  278. };
  279.  
  280. pj2 {
  281. nvidia,pins = "pj2";
  282. nvidia,function = "soc";
  283. nvidia,enable-input = <0x1>;
  284. nvidia,pull = <0x2>;
  285. nvidia,tristate = <0x0>;
  286. };
  287.  
  288. kb_row15_ps7 {
  289. nvidia,pins = "kb_row15_ps7";
  290. nvidia,function = "soc";
  291. nvidia,enable-input = <0x1>;
  292. nvidia,pull = <0x2>;
  293. nvidia,tristate = <0x0>;
  294. };
  295.  
  296. clk_32k_out_pa0 {
  297. nvidia,pins = "clk_32k_out_pa0";
  298. nvidia,function = "soc";
  299. nvidia,enable-input = <0x1>;
  300. nvidia,pull = <0x2>;
  301. nvidia,tristate = <0x0>;
  302. };
  303.  
  304. clk2_out_pw5 {
  305. nvidia,pins = "clk2_out_pw5";
  306. nvidia,function = "safe";
  307. nvidia,enable-input = <0x0>;
  308. nvidia,pull = <0x2>;
  309. nvidia,tristate = <0x0>;
  310. };
  311.  
  312. sdmmc1_clk_pz0 {
  313. nvidia,pins = "sdmmc1_clk_pz0";
  314. nvidia,function = "sdmmc1";
  315. nvidia,enable-input = <0x1>;
  316. nvidia,pull = <0x0>;
  317. nvidia,tristate = <0x0>;
  318. };
  319.  
  320. sdmmc1_cmd_pz1 {
  321. nvidia,pins = "sdmmc1_cmd_pz1";
  322. nvidia,function = "sdmmc1";
  323. nvidia,enable-input = <0x1>;
  324. nvidia,pull = <0x2>;
  325. nvidia,tristate = <0x0>;
  326. };
  327.  
  328. sdmmc1_dat0_py7 {
  329. nvidia,pins = "sdmmc1_dat0_py7";
  330. nvidia,function = "sdmmc1";
  331. nvidia,enable-input = <0x1>;
  332. nvidia,pull = <0x2>;
  333. nvidia,tristate = <0x0>;
  334. };
  335.  
  336. sdmmc1_dat1_py6 {
  337. nvidia,pins = "sdmmc1_dat1_py6";
  338. nvidia,function = "sdmmc1";
  339. nvidia,enable-input = <0x1>;
  340. nvidia,pull = <0x2>;
  341. nvidia,tristate = <0x0>;
  342. };
  343.  
  344. sdmmc1_dat2_py5 {
  345. nvidia,pins = "sdmmc1_dat2_py5";
  346. nvidia,function = "sdmmc1";
  347. nvidia,enable-input = <0x1>;
  348. nvidia,pull = <0x2>;
  349. nvidia,tristate = <0x0>;
  350. };
  351.  
  352. sdmmc1_dat3_py4 {
  353. nvidia,pins = "sdmmc1_dat3_py4";
  354. nvidia,function = "sdmmc1";
  355. nvidia,enable-input = <0x1>;
  356. nvidia,pull = <0x2>;
  357. nvidia,tristate = <0x0>;
  358. };
  359.  
  360. sdmmc3_clk_pa6 {
  361. nvidia,pins = "sdmmc3_clk_pa6";
  362. nvidia,function = "sdmmc3";
  363. nvidia,enable-input = <0x1>;
  364. nvidia,pull = <0x0>;
  365. nvidia,tristate = <0x0>;
  366. };
  367.  
  368. sdmmc3_cmd_pa7 {
  369. nvidia,pins = "sdmmc3_cmd_pa7";
  370. nvidia,function = "sdmmc3";
  371. nvidia,enable-input = <0x1>;
  372. nvidia,pull = <0x2>;
  373. nvidia,tristate = <0x0>;
  374. };
  375.  
  376. sdmmc3_dat0_pb7 {
  377. nvidia,pins = "sdmmc3_dat0_pb7";
  378. nvidia,function = "sdmmc3";
  379. nvidia,enable-input = <0x1>;
  380. nvidia,pull = <0x2>;
  381. nvidia,tristate = <0x0>;
  382. };
  383.  
  384. sdmmc3_dat1_pb6 {
  385. nvidia,pins = "sdmmc3_dat1_pb6";
  386. nvidia,function = "sdmmc3";
  387. nvidia,enable-input = <0x1>;
  388. nvidia,pull = <0x2>;
  389. nvidia,tristate = <0x0>;
  390. };
  391.  
  392. sdmmc3_dat2_pb5 {
  393. nvidia,pins = "sdmmc3_dat2_pb5";
  394. nvidia,function = "sdmmc3";
  395. nvidia,enable-input = <0x1>;
  396. nvidia,pull = <0x2>;
  397. nvidia,tristate = <0x0>;
  398. };
  399.  
  400. sdmmc3_dat3_pb4 {
  401. nvidia,pins = "sdmmc3_dat3_pb4";
  402. nvidia,function = "sdmmc3";
  403. nvidia,enable-input = <0x1>;
  404. nvidia,pull = <0x2>;
  405. nvidia,tristate = <0x0>;
  406. };
  407.  
  408. sdmmc3_clk_lb_out_pee4 {
  409. nvidia,pins = "sdmmc3_clk_lb_out_pee4";
  410. nvidia,function = "sdmmc3";
  411. nvidia,enable-input = <0x1>;
  412. nvidia,pull = <0x2>;
  413. nvidia,tristate = <0x0>;
  414. };
  415.  
  416. sdmmc3_clk_lb_in_pee5 {
  417. nvidia,pins = "sdmmc3_clk_lb_in_pee5";
  418. nvidia,function = "sdmmc3";
  419. nvidia,enable-input = <0x1>;
  420. nvidia,pull = <0x2>;
  421. nvidia,tristate = <0x0>;
  422. };
  423.  
  424. sdmmc3_cd_n_pv2 {
  425. nvidia,pins = "sdmmc3_cd_n_pv2";
  426. nvidia,function = "sdmmc3";
  427. nvidia,enable-input = <0x1>;
  428. nvidia,pull = <0x0>;
  429. nvidia,tristate = <0x0>;
  430. };
  431.  
  432. sdmmc4_clk_pcc4 {
  433. nvidia,pins = "sdmmc4_clk_pcc4";
  434. nvidia,function = "sdmmc4";
  435. nvidia,enable-input = <0x1>;
  436. nvidia,pull = <0x0>;
  437. nvidia,tristate = <0x0>;
  438. };
  439.  
  440. sdmmc4_cmd_pt7 {
  441. nvidia,pins = "sdmmc4_cmd_pt7";
  442. nvidia,function = "sdmmc4";
  443. nvidia,enable-input = <0x1>;
  444. nvidia,pull = <0x2>;
  445. nvidia,tristate = <0x0>;
  446. };
  447.  
  448. sdmmc4_dat0_paa0 {
  449. nvidia,pins = "sdmmc4_dat0_paa0";
  450. nvidia,function = "sdmmc4";
  451. nvidia,enable-input = <0x1>;
  452. nvidia,pull = <0x2>;
  453. nvidia,tristate = <0x0>;
  454. };
  455.  
  456. sdmmc4_dat1_paa1 {
  457. nvidia,pins = "sdmmc4_dat1_paa1";
  458. nvidia,function = "sdmmc4";
  459. nvidia,enable-input = <0x1>;
  460. nvidia,pull = <0x2>;
  461. nvidia,tristate = <0x0>;
  462. };
  463.  
  464. sdmmc4_dat2_paa2 {
  465. nvidia,pins = "sdmmc4_dat2_paa2";
  466. nvidia,function = "sdmmc4";
  467. nvidia,enable-input = <0x1>;
  468. nvidia,pull = <0x2>;
  469. nvidia,tristate = <0x0>;
  470. };
  471.  
  472. sdmmc4_dat3_paa3 {
  473. nvidia,pins = "sdmmc4_dat3_paa3";
  474. nvidia,function = "sdmmc4";
  475. nvidia,enable-input = <0x1>;
  476. nvidia,pull = <0x2>;
  477. nvidia,tristate = <0x0>;
  478. };
  479.  
  480. sdmmc4_dat4_paa4 {
  481. nvidia,pins = "sdmmc4_dat4_paa4";
  482. nvidia,function = "sdmmc4";
  483. nvidia,enable-input = <0x1>;
  484. nvidia,pull = <0x2>;
  485. nvidia,tristate = <0x0>;
  486. };
  487.  
  488. sdmmc4_dat5_paa5 {
  489. nvidia,pins = "sdmmc4_dat5_paa5";
  490. nvidia,function = "sdmmc4";
  491. nvidia,enable-input = <0x1>;
  492. nvidia,pull = <0x2>;
  493. nvidia,tristate = <0x0>;
  494. };
  495.  
  496. sdmmc4_dat6_paa6 {
  497. nvidia,pins = "sdmmc4_dat6_paa6";
  498. nvidia,function = "sdmmc4";
  499. nvidia,enable-input = <0x1>;
  500. nvidia,pull = <0x2>;
  501. nvidia,tristate = <0x0>;
  502. };
  503.  
  504. sdmmc4_dat7_paa7 {
  505. nvidia,pins = "sdmmc4_dat7_paa7";
  506. nvidia,function = "sdmmc4";
  507. nvidia,enable-input = <0x1>;
  508. nvidia,pull = <0x2>;
  509. nvidia,tristate = <0x0>;
  510. };
  511.  
  512. kb_row3_pr3 {
  513. nvidia,pins = "kb_row3_pr3";
  514. nvidia,function = "safe";
  515. nvidia,enable-input = <0x1>;
  516. nvidia,pull = <0x0>;
  517. nvidia,tristate = <0x0>;
  518. };
  519.  
  520. kb_row6_pr6 {
  521. nvidia,pins = "kb_row6_pr6";
  522. nvidia,function = "displaya_alt";
  523. nvidia,enable-input = <0x1>;
  524. nvidia,pull = <0x0>;
  525. nvidia,tristate = <0x0>;
  526. };
  527.  
  528. pwr_i2c_scl_pz6 {
  529. nvidia,pins = "pwr_i2c_scl_pz6";
  530. nvidia,function = "i2cpwr";
  531. nvidia,enable-input = <0x1>;
  532. nvidia,pull = <0x0>;
  533. nvidia,tristate = <0x0>;
  534. nvidia,open-drain = <0x0>;
  535. };
  536.  
  537. pwr_i2c_sda_pz7 {
  538. nvidia,pins = "pwr_i2c_sda_pz7";
  539. nvidia,function = "i2cpwr";
  540. nvidia,enable-input = <0x1>;
  541. nvidia,pull = <0x0>;
  542. nvidia,tristate = <0x0>;
  543. nvidia,open-drain = <0x0>;
  544. };
  545.  
  546. clk_32k_in {
  547. nvidia,pins = "clk_32k_in";
  548. nvidia,function = "clk";
  549. nvidia,enable-input = <0x1>;
  550. nvidia,pull = <0x0>;
  551. nvidia,tristate = <0x0>;
  552. };
  553.  
  554. core_pwr_req {
  555. nvidia,pins = "core_pwr_req";
  556. nvidia,function = "pwron";
  557. nvidia,enable-input = <0x0>;
  558. nvidia,pull = <0x0>;
  559. nvidia,tristate = <0x0>;
  560. };
  561.  
  562. cpu_pwr_req {
  563. nvidia,pins = "cpu_pwr_req";
  564. nvidia,function = "cpu";
  565. nvidia,enable-input = <0x0>;
  566. nvidia,pull = <0x0>;
  567. nvidia,tristate = <0x0>;
  568. };
  569.  
  570. pwr_int_n {
  571. nvidia,pins = "pwr_int_n";
  572. nvidia,function = "pmi";
  573. nvidia,enable-input = <0x1>;
  574. nvidia,pull = <0x2>;
  575. nvidia,tristate = <0x0>;
  576. };
  577.  
  578. reset_out_n {
  579. nvidia,pins = "reset_out_n";
  580. nvidia,function = "reset_out_n";
  581. nvidia,enable-input = <0x0>;
  582. nvidia,pull = <0x0>;
  583. nvidia,tristate = <0x0>;
  584. };
  585.  
  586. gen1_i2c_sda_pc5 {
  587. nvidia,pins = "gen1_i2c_sda_pc5";
  588. nvidia,function = "i2c1";
  589. nvidia,enable-input = <0x1>;
  590. nvidia,pull = <0x0>;
  591. nvidia,tristate = <0x0>;
  592. nvidia,lock = <0x0>;
  593. nvidia,open-drain = <0x0>;
  594. };
  595.  
  596. gen1_i2c_scl_pc4 {
  597. nvidia,pins = "gen1_i2c_scl_pc4";
  598. nvidia,function = "i2c1";
  599. nvidia,enable-input = <0x1>;
  600. nvidia,pull = <0x0>;
  601. nvidia,tristate = <0x0>;
  602. nvidia,lock = <0x0>;
  603. nvidia,open-drain = <0x0>;
  604. };
  605.  
  606. uart2_cts_n_pj5 {
  607. nvidia,pins = "uart2_cts_n_pj5";
  608. nvidia,function = "uartb";
  609. nvidia,enable-input = <0x1>;
  610. nvidia,pull = <0x2>;
  611. nvidia,tristate = <0x0>;
  612. };
  613.  
  614. uart2_rts_n_pj6 {
  615. nvidia,pins = "uart2_rts_n_pj6";
  616. nvidia,function = "uartb";
  617. nvidia,enable-input = <0x0>;
  618. nvidia,pull = <0x2>;
  619. nvidia,tristate = <0x0>;
  620. };
  621.  
  622. uart2_rxd_pc3 {
  623. nvidia,pins = "uart2_rxd_pc3";
  624. nvidia,function = "irda";
  625. nvidia,enable-input = <0x1>;
  626. nvidia,pull = <0x2>;
  627. nvidia,tristate = <0x0>;
  628. };
  629.  
  630. uart2_txd_pc2 {
  631. nvidia,pins = "uart2_txd_pc2";
  632. nvidia,function = "irda";
  633. nvidia,enable-input = <0x0>;
  634. nvidia,pull = <0x2>;
  635. nvidia,tristate = <0x0>;
  636. };
  637.  
  638. uart3_cts_n_pa1 {
  639. nvidia,pins = "uart3_cts_n_pa1";
  640. nvidia,function = "uartc";
  641. nvidia,enable-input = <0x1>;
  642. nvidia,pull = <0x2>;
  643. nvidia,tristate = <0x0>;
  644. };
  645.  
  646. uart3_rts_n_pc0 {
  647. nvidia,pins = "uart3_rts_n_pc0";
  648. nvidia,function = "uartc";
  649. nvidia,enable-input = <0x0>;
  650. nvidia,pull = <0x2>;
  651. nvidia,tristate = <0x0>;
  652. };
  653.  
  654. uart3_rxd_pw7 {
  655. nvidia,pins = "uart3_rxd_pw7";
  656. nvidia,function = "uartc";
  657. nvidia,enable-input = <0x1>;
  658. nvidia,pull = <0x2>;
  659. nvidia,tristate = <0x0>;
  660. };
  661.  
  662. uart3_txd_pw6 {
  663. nvidia,pins = "uart3_txd_pw6";
  664. nvidia,function = "uartc";
  665. nvidia,enable-input = <0x0>;
  666. nvidia,pull = <0x2>;
  667. nvidia,tristate = <0x0>;
  668. };
  669.  
  670. ddc_scl_pv4 {
  671. nvidia,pins = "ddc_scl_pv4";
  672. nvidia,function = "i2c4";
  673. nvidia,enable-input = <0x1>;
  674. nvidia,pull = <0x0>;
  675. nvidia,tristate = <0x0>;
  676. };
  677.  
  678. ddc_sda_pv5 {
  679. nvidia,pins = "ddc_sda_pv5";
  680. nvidia,function = "i2c4";
  681. nvidia,enable-input = <0x1>;
  682. nvidia,pull = <0x0>;
  683. nvidia,tristate = <0x0>;
  684. };
  685.  
  686. pi7 {
  687. nvidia,pins = "pi7";
  688. nvidia,function = "safe";
  689. nvidia,enable-input = <0x1>;
  690. nvidia,pull = <0x2>;
  691. nvidia,tristate = <0x0>;
  692. };
  693.  
  694. gpio_x5_aud_px5 {
  695. nvidia,pins = "gpio_x5_aud_px5";
  696. nvidia,function = "safe";
  697. nvidia,enable-input = <0x0>;
  698. nvidia,pull = <0x0>;
  699. nvidia,tristate = <0x0>;
  700. };
  701.  
  702. gpio_x7_aud_px7 {
  703. nvidia,pins = "gpio_x7_aud_px7";
  704. nvidia,function = "safe";
  705. nvidia,enable-input = <0x0>;
  706. nvidia,pull = <0x0>;
  707. nvidia,tristate = <0x0>;
  708. };
  709.  
  710. gpio_w2_aud_pw2 {
  711. nvidia,pins = "gpio_w2_aud_pw2";
  712. nvidia,function = "safe";
  713. nvidia,enable-input = <0x1>;
  714. nvidia,pull = <0x2>;
  715. nvidia,tristate = <0x0>;
  716. };
  717.  
  718. gpio_w3_aud_pw3 {
  719. nvidia,pins = "gpio_w3_aud_pw3";
  720. nvidia,function = "safe";
  721. nvidia,enable-input = <0x1>;
  722. nvidia,pull = <0x2>;
  723. nvidia,tristate = <0x0>;
  724. };
  725.  
  726. gpio_x1_aud_px1 {
  727. nvidia,pins = "gpio_x1_aud_px1";
  728. nvidia,function = "safe";
  729. nvidia,enable-input = <0x0>;
  730. nvidia,pull = <0x0>;
  731. nvidia,tristate = <0x0>;
  732. };
  733.  
  734. gpio_x3_aud_px3 {
  735. nvidia,pins = "gpio_x3_aud_px3";
  736. nvidia,function = "safe";
  737. nvidia,enable-input = <0x1>;
  738. nvidia,pull = <0x2>;
  739. nvidia,tristate = <0x0>;
  740. };
  741.  
  742. ulpi_data1_po2 {
  743. nvidia,pins = "ulpi_data1_po2";
  744. nvidia,function = "spi3";
  745. nvidia,enable-input = <0x1>;
  746. nvidia,pull = <0x2>;
  747. nvidia,tristate = <0x0>;
  748. };
  749.  
  750. ulpi_data2_po3 {
  751. nvidia,pins = "ulpi_data2_po3";
  752. nvidia,function = "spi3";
  753. nvidia,enable-input = <0x1>;
  754. nvidia,pull = <0x2>;
  755. nvidia,tristate = <0x0>;
  756. };
  757.  
  758. pbb3 {
  759. nvidia,pins = "pbb3";
  760. nvidia,function = "safe";
  761. nvidia,enable-input = <0x0>;
  762. nvidia,pull = <0x0>;
  763. nvidia,tristate = <0x0>;
  764. };
  765.  
  766. pbb4 {
  767. nvidia,pins = "pbb4";
  768. nvidia,function = "safe";
  769. nvidia,enable-input = <0x0>;
  770. nvidia,pull = <0x2>;
  771. nvidia,tristate = <0x0>;
  772. };
  773.  
  774. pbb5 {
  775. nvidia,pins = "pbb5";
  776. nvidia,function = "safe";
  777. nvidia,enable-input = <0x0>;
  778. nvidia,pull = <0x2>;
  779. nvidia,tristate = <0x0>;
  780. };
  781.  
  782. pbb6 {
  783. nvidia,pins = "pbb6";
  784. nvidia,function = "safe";
  785. nvidia,enable-input = <0x0>;
  786. nvidia,pull = <0x0>;
  787. nvidia,tristate = <0x0>;
  788. };
  789.  
  790. pbb7 {
  791. nvidia,pins = "pbb7";
  792. nvidia,function = "safe";
  793. nvidia,enable-input = <0x0>;
  794. nvidia,pull = <0x0>;
  795. nvidia,tristate = <0x0>;
  796. };
  797.  
  798. pcc1 {
  799. nvidia,pins = "pcc1";
  800. nvidia,function = "safe";
  801. nvidia,enable-input = <0x0>;
  802. nvidia,pull = <0x0>;
  803. nvidia,tristate = <0x0>;
  804. };
  805.  
  806. ph2 {
  807. nvidia,pins = "ph2";
  808. nvidia,function = "pwm2";
  809. nvidia,enable-input = <0x0>;
  810. nvidia,pull = <0x0>;
  811. nvidia,tristate = <0x0>;
  812. };
  813.  
  814. ph3 {
  815. nvidia,pins = "ph3";
  816. nvidia,function = "safe";
  817. nvidia,enable-input = <0x0>;
  818. nvidia,pull = <0x2>;
  819. nvidia,tristate = <0x0>;
  820. };
  821.  
  822. ph5 {
  823. nvidia,pins = "ph5";
  824. nvidia,function = "safe";
  825. nvidia,enable-input = <0x0>;
  826. nvidia,pull = <0x0>;
  827. nvidia,tristate = <0x0>;
  828. };
  829.  
  830. pg2 {
  831. nvidia,pins = "pg2";
  832. nvidia,function = "safe";
  833. nvidia,enable-input = <0x1>;
  834. nvidia,pull = <0x1>;
  835. nvidia,tristate = <0x0>;
  836. };
  837.  
  838. pg3 {
  839. nvidia,pins = "pg3";
  840. nvidia,function = "safe";
  841. nvidia,enable-input = <0x1>;
  842. nvidia,pull = <0x1>;
  843. nvidia,tristate = <0x0>;
  844. };
  845.  
  846. pk1 {
  847. nvidia,pins = "pk1";
  848. nvidia,function = "safe";
  849. nvidia,enable-input = <0x0>;
  850. nvidia,pull = <0x0>;
  851. nvidia,tristate = <0x0>;
  852. };
  853.  
  854. pj0 {
  855. nvidia,pins = "pj0";
  856. nvidia,function = "safe";
  857. nvidia,enable-input = <0x1>;
  858. nvidia,pull = <0x2>;
  859. nvidia,tristate = <0x0>;
  860. };
  861.  
  862. pk4 {
  863. nvidia,pins = "pk4";
  864. nvidia,function = "safe";
  865. nvidia,enable-input = <0x0>;
  866. nvidia,pull = <0x0>;
  867. nvidia,tristate = <0x0>;
  868. };
  869.  
  870. pk2 {
  871. nvidia,pins = "pk2";
  872. nvidia,function = "safe";
  873. nvidia,enable-input = <0x1>;
  874. nvidia,pull = <0x2>;
  875. nvidia,tristate = <0x0>;
  876. };
  877.  
  878. pi6 {
  879. nvidia,pins = "pi6";
  880. nvidia,function = "safe";
  881. nvidia,enable-input = <0x1>;
  882. nvidia,pull = <0x2>;
  883. nvidia,tristate = <0x0>;
  884. };
  885.  
  886. pi5 {
  887. nvidia,pins = "pi5";
  888. nvidia,function = "safe";
  889. nvidia,enable-input = <0x1>;
  890. nvidia,pull = <0x2>;
  891. nvidia,tristate = <0x0>;
  892. };
  893.  
  894. pi4 {
  895. nvidia,pins = "pi4";
  896. nvidia,function = "safe";
  897. nvidia,enable-input = <0x0>;
  898. nvidia,pull = <0x2>;
  899. nvidia,tristate = <0x0>;
  900. };
  901.  
  902. pi0 {
  903. nvidia,pins = "pi0";
  904. nvidia,function = "safe";
  905. nvidia,enable-input = <0x0>;
  906. nvidia,pull = <0x0>;
  907. nvidia,tristate = <0x0>;
  908. };
  909.  
  910. clk2_req_pcc5 {
  911. nvidia,pins = "clk2_req_pcc5";
  912. nvidia,function = "safe";
  913. nvidia,enable-input = <0x0>;
  914. nvidia,pull = <0x0>;
  915. nvidia,tristate = <0x0>;
  916. };
  917.  
  918. kb_col0_pq0 {
  919. nvidia,pins = "kb_col0_pq0";
  920. nvidia,function = "safe";
  921. nvidia,enable-input = <0x1>;
  922. nvidia,pull = <0x2>;
  923. nvidia,tristate = <0x0>;
  924. };
  925.  
  926. kb_col5_pq5 {
  927. nvidia,pins = "kb_col5_pq5";
  928. nvidia,function = "safe";
  929. nvidia,enable-input = <0x1>;
  930. nvidia,pull = <0x2>;
  931. nvidia,tristate = <0x0>;
  932. };
  933.  
  934. kb_col6_pq6 {
  935. nvidia,pins = "kb_col6_pq6";
  936. nvidia,function = "safe";
  937. nvidia,enable-input = <0x1>;
  938. nvidia,pull = <0x2>;
  939. nvidia,tristate = <0x0>;
  940. };
  941.  
  942. kb_col7_pq7 {
  943. nvidia,pins = "kb_col7_pq7";
  944. nvidia,function = "safe";
  945. nvidia,enable-input = <0x1>;
  946. nvidia,pull = <0x2>;
  947. nvidia,tristate = <0x0>;
  948. };
  949.  
  950. kb_row0_pr0 {
  951. nvidia,pins = "kb_row0_pr0";
  952. nvidia,function = "safe";
  953. nvidia,enable-input = <0x0>;
  954. nvidia,pull = <0x0>;
  955. nvidia,tristate = <0x0>;
  956. };
  957.  
  958. kb_row1_pr1 {
  959. nvidia,pins = "kb_row1_pr1";
  960. nvidia,function = "safe";
  961. nvidia,enable-input = <0x0>;
  962. nvidia,pull = <0x0>;
  963. nvidia,tristate = <0x0>;
  964. };
  965.  
  966. kb_row13_ps5 {
  967. nvidia,pins = "kb_row13_ps5";
  968. nvidia,function = "safe";
  969. nvidia,enable-input = <0x1>;
  970. nvidia,pull = <0x2>;
  971. nvidia,tristate = <0x0>;
  972. };
  973.  
  974. kb_row14_ps6 {
  975. nvidia,pins = "kb_row14_ps6";
  976. nvidia,function = "safe";
  977. nvidia,enable-input = <0x0>;
  978. nvidia,pull = <0x0>;
  979. nvidia,tristate = <0x0>;
  980. };
  981.  
  982. kb_row2_pr2 {
  983. nvidia,pins = "kb_row2_pr2";
  984. nvidia,function = "safe";
  985. nvidia,enable-input = <0x0>;
  986. nvidia,pull = <0x0>;
  987. nvidia,tristate = <0x0>;
  988. };
  989.  
  990. kb_row5_pr5 {
  991. nvidia,pins = "kb_row5_pr5";
  992. nvidia,function = "safe";
  993. nvidia,enable-input = <0x0>;
  994. nvidia,pull = <0x0>;
  995. nvidia,tristate = <0x0>;
  996. };
  997.  
  998. kb_row7_pr7 {
  999. nvidia,pins = "kb_row7_pr7";
  1000. nvidia,function = "safe";
  1001. nvidia,enable-input = <0x1>;
  1002. nvidia,pull = <0x2>;
  1003. nvidia,tristate = <0x0>;
  1004. };
  1005.  
  1006. kb_row8_ps0 {
  1007. nvidia,pins = "kb_row8_ps0";
  1008. nvidia,function = "safe";
  1009. nvidia,enable-input = <0x1>;
  1010. nvidia,pull = <0x2>;
  1011. nvidia,tristate = <0x0>;
  1012. };
  1013.  
  1014. kb_row10_ps2 {
  1015. nvidia,pins = "kb_row10_ps2";
  1016. nvidia,function = "safe";
  1017. nvidia,enable-input = <0x0>;
  1018. nvidia,pull = <0x2>;
  1019. nvidia,tristate = <0x0>;
  1020. };
  1021.  
  1022. clk3_req_pee1 {
  1023. nvidia,pins = "clk3_req_pee1";
  1024. nvidia,function = "safe";
  1025. nvidia,enable-input = <0x0>;
  1026. nvidia,pull = <0x0>;
  1027. nvidia,tristate = <0x0>;
  1028. };
  1029.  
  1030. pu4 {
  1031. nvidia,pins = "pu4";
  1032. nvidia,function = "safe";
  1033. nvidia,enable-input = <0x0>;
  1034. nvidia,pull = <0x0>;
  1035. nvidia,tristate = <0x0>;
  1036. };
  1037.  
  1038. pu5 {
  1039. nvidia,pins = "pu5";
  1040. nvidia,function = "safe";
  1041. nvidia,enable-input = <0x1>;
  1042. nvidia,pull = <0x2>;
  1043. nvidia,tristate = <0x0>;
  1044. };
  1045.  
  1046. pu6 {
  1047. nvidia,pins = "pu6";
  1048. nvidia,function = "safe";
  1049. nvidia,enable-input = <0x1>;
  1050. nvidia,pull = <0x2>;
  1051. nvidia,tristate = <0x0>;
  1052. };
  1053.  
  1054. ulpi_data0_po1 {
  1055. nvidia,pins = "ulpi_data0_po1";
  1056. nvidia,function = "spi3";
  1057. nvidia,enable-input = <0x0>;
  1058. nvidia,pull = <0x1>;
  1059. nvidia,tristate = <0x1>;
  1060. };
  1061.  
  1062. ulpi_data3_po4 {
  1063. nvidia,pins = "ulpi_data3_po4";
  1064. nvidia,function = "spi3";
  1065. nvidia,enable-input = <0x0>;
  1066. nvidia,pull = <0x1>;
  1067. nvidia,tristate = <0x1>;
  1068. };
  1069.  
  1070. pi1 {
  1071. nvidia,pins = "pi1";
  1072. nvidia,function = "safe";
  1073. nvidia,enable-input = <0x0>;
  1074. nvidia,pull = <0x1>;
  1075. nvidia,tristate = <0x1>;
  1076. };
  1077. };
  1078.  
  1079. unused_lowpower {
  1080. linux,phandle = <0x5>;
  1081. phandle = <0x5>;
  1082.  
  1083. dap_mclk1_req_pee2 {
  1084. nvidia,pins = "dap_mclk1_req_pee2";
  1085. nvidia,function = "safe";
  1086. nvidia,enable-input = <0x0>;
  1087. nvidia,pull = <0x1>;
  1088. nvidia,tristate = <0x1>;
  1089. };
  1090.  
  1091. dap3_din_pp1 {
  1092. nvidia,pins = "dap3_din_pp1";
  1093. nvidia,function = "safe";
  1094. nvidia,enable-input = <0x0>;
  1095. nvidia,pull = <0x1>;
  1096. nvidia,tristate = <0x1>;
  1097. };
  1098.  
  1099. dap3_dout_pp2 {
  1100. nvidia,pins = "dap3_dout_pp2";
  1101. nvidia,function = "safe";
  1102. nvidia,enable-input = <0x0>;
  1103. nvidia,pull = <0x1>;
  1104. nvidia,tristate = <0x1>;
  1105. };
  1106.  
  1107. dap3_fs_pp0 {
  1108. nvidia,pins = "dap3_fs_pp0";
  1109. nvidia,function = "safe";
  1110. nvidia,enable-input = <0x0>;
  1111. nvidia,pull = <0x1>;
  1112. nvidia,tristate = <0x1>;
  1113. };
  1114.  
  1115. dap3_sclk_pp3 {
  1116. nvidia,pins = "dap3_sclk_pp3";
  1117. nvidia,function = "safe";
  1118. nvidia,enable-input = <0x0>;
  1119. nvidia,pull = <0x1>;
  1120. nvidia,tristate = <0x1>;
  1121. };
  1122.  
  1123. pex_l0_clkreq_n_pdd2 {
  1124. nvidia,pins = "pex_l0_clkreq_n_pdd2";
  1125. nvidia,function = "safe";
  1126. nvidia,enable-input = <0x0>;
  1127. nvidia,pull = <0x1>;
  1128. nvidia,tristate = <0x1>;
  1129. };
  1130.  
  1131. pex_l0_rst_n_pdd1 {
  1132. nvidia,pins = "pex_l0_rst_n_pdd1";
  1133. nvidia,function = "safe";
  1134. nvidia,enable-input = <0x0>;
  1135. nvidia,pull = <0x1>;
  1136. nvidia,tristate = <0x1>;
  1137. };
  1138.  
  1139. pex_l1_clkreq_n_pdd6 {
  1140. nvidia,pins = "pex_l1_clkreq_n_pdd6";
  1141. nvidia,function = "safe";
  1142. nvidia,enable-input = <0x0>;
  1143. nvidia,pull = <0x1>;
  1144. nvidia,tristate = <0x1>;
  1145. };
  1146.  
  1147. pex_l1_rst_n_pdd5 {
  1148. nvidia,pins = "pex_l1_rst_n_pdd5";
  1149. nvidia,function = "safe";
  1150. nvidia,enable-input = <0x0>;
  1151. nvidia,pull = <0x1>;
  1152. nvidia,tristate = <0x1>;
  1153. };
  1154.  
  1155. pex_wake_n_pdd3 {
  1156. nvidia,pins = "pex_wake_n_pdd3";
  1157. nvidia,function = "safe";
  1158. nvidia,enable-input = <0x0>;
  1159. nvidia,pull = <0x1>;
  1160. nvidia,tristate = <0x1>;
  1161. };
  1162.  
  1163. pff2 {
  1164. nvidia,pins = "pff2";
  1165. nvidia,function = "safe";
  1166. nvidia,enable-input = <0x0>;
  1167. nvidia,pull = <0x1>;
  1168. nvidia,tristate = <0x1>;
  1169. };
  1170.  
  1171. kb_col3_pq3 {
  1172. nvidia,pins = "kb_col3_pq3";
  1173. nvidia,function = "safe";
  1174. nvidia,enable-input = <0x0>;
  1175. nvidia,pull = <0x1>;
  1176. nvidia,tristate = <0x1>;
  1177. };
  1178.  
  1179. kb_row16_pt0 {
  1180. nvidia,pins = "kb_row16_pt0";
  1181. nvidia,function = "safe";
  1182. nvidia,enable-input = <0x0>;
  1183. nvidia,pull = <0x1>;
  1184. nvidia,tristate = <0x1>;
  1185. };
  1186.  
  1187. kb_row17_pt1 {
  1188. nvidia,pins = "kb_row17_pt1";
  1189. nvidia,function = "safe";
  1190. nvidia,enable-input = <0x0>;
  1191. nvidia,pull = <0x1>;
  1192. nvidia,tristate = <0x1>;
  1193. };
  1194.  
  1195. owr {
  1196. nvidia,pins = "owr";
  1197. nvidia,function = "safe";
  1198. nvidia,enable-input = <0x0>;
  1199. nvidia,pull = <0x1>;
  1200. nvidia,tristate = <0x1>;
  1201. };
  1202.  
  1203. ulpi_clk_py0 {
  1204. nvidia,pins = "ulpi_clk_py0";
  1205. nvidia,function = "safe";
  1206. nvidia,enable-input = <0x0>;
  1207. nvidia,pull = <0x1>;
  1208. nvidia,tristate = <0x1>;
  1209. };
  1210.  
  1211. ulpi_dir_py1 {
  1212. nvidia,pins = "ulpi_dir_py1";
  1213. nvidia,function = "safe";
  1214. nvidia,enable-input = <0x0>;
  1215. nvidia,pull = <0x1>;
  1216. nvidia,tristate = <0x1>;
  1217. };
  1218.  
  1219. ulpi_nxt_py2 {
  1220. nvidia,pins = "ulpi_nxt_py2";
  1221. nvidia,function = "safe";
  1222. nvidia,enable-input = <0x0>;
  1223. nvidia,pull = <0x1>;
  1224. nvidia,tristate = <0x1>;
  1225. };
  1226.  
  1227. ulpi_stp_py3 {
  1228. nvidia,pins = "ulpi_stp_py3";
  1229. nvidia,function = "safe";
  1230. nvidia,enable-input = <0x0>;
  1231. nvidia,pull = <0x1>;
  1232. nvidia,tristate = <0x1>;
  1233. };
  1234.  
  1235. hdmi_cec_pee3 {
  1236. nvidia,pins = "hdmi_cec_pee3";
  1237. nvidia,function = "safe";
  1238. nvidia,enable-input = <0x0>;
  1239. nvidia,pull = <0x1>;
  1240. nvidia,tristate = <0x1>;
  1241. };
  1242.  
  1243. clk3_out_pee0 {
  1244. nvidia,pins = "clk3_out_pee0";
  1245. nvidia,function = "safe";
  1246. nvidia,enable-input = <0x0>;
  1247. nvidia,pull = <0x1>;
  1248. nvidia,tristate = <0x1>;
  1249. };
  1250.  
  1251. dp_hpd_pff0 {
  1252. nvidia,pins = "dp_hpd_pff0";
  1253. nvidia,function = "safe";
  1254. nvidia,enable-input = <0x0>;
  1255. nvidia,pull = <0x1>;
  1256. nvidia,tristate = <0x1>;
  1257. };
  1258.  
  1259. dap4_din_pp5 {
  1260. nvidia,pins = "dap4_din_pp5";
  1261. nvidia,function = "safe";
  1262. nvidia,enable-input = <0x0>;
  1263. nvidia,pull = <0x1>;
  1264. nvidia,tristate = <0x1>;
  1265. };
  1266.  
  1267. dap4_dout_pp6 {
  1268. nvidia,pins = "dap4_dout_pp6";
  1269. nvidia,function = "safe";
  1270. nvidia,enable-input = <0x0>;
  1271. nvidia,pull = <0x1>;
  1272. nvidia,tristate = <0x1>;
  1273. };
  1274.  
  1275. dap4_fs_pp4 {
  1276. nvidia,pins = "dap4_fs_pp4";
  1277. nvidia,function = "safe";
  1278. nvidia,enable-input = <0x0>;
  1279. nvidia,pull = <0x1>;
  1280. nvidia,tristate = <0x1>;
  1281. };
  1282.  
  1283. dap4_sclk_pp7 {
  1284. nvidia,pins = "dap4_sclk_pp7";
  1285. nvidia,function = "safe";
  1286. nvidia,enable-input = <0x0>;
  1287. nvidia,pull = <0x1>;
  1288. nvidia,tristate = <0x1>;
  1289. };
  1290.  
  1291. kb_row9_ps1 {
  1292. nvidia,pins = "kb_row9_ps1";
  1293. nvidia,function = "safe";
  1294. nvidia,enable-input = <0x0>;
  1295. nvidia,pull = <0x1>;
  1296. nvidia,tristate = <0x1>;
  1297. };
  1298.  
  1299. pk0 {
  1300. nvidia,pins = "pk0";
  1301. nvidia,function = "safe";
  1302. nvidia,enable-input = <0x0>;
  1303. nvidia,pull = <0x1>;
  1304. nvidia,tristate = <0x1>;
  1305. };
  1306.  
  1307. pi3 {
  1308. nvidia,pins = "pi3";
  1309. nvidia,function = "safe";
  1310. nvidia,enable-input = <0x0>;
  1311. nvidia,pull = <0x1>;
  1312. nvidia,tristate = <0x1>;
  1313. };
  1314.  
  1315. pb1 {
  1316. nvidia,pins = "pb1";
  1317. nvidia,function = "safe";
  1318. nvidia,enable-input = <0x0>;
  1319. nvidia,pull = <0x1>;
  1320. nvidia,tristate = <0x1>;
  1321. };
  1322.  
  1323. ulpi_data4_po5 {
  1324. nvidia,pins = "ulpi_data4_po5";
  1325. nvidia,function = "safe";
  1326. nvidia,enable-input = <0x0>;
  1327. nvidia,pull = <0x1>;
  1328. nvidia,tristate = <0x1>;
  1329. };
  1330.  
  1331. ulpi_data5_po6 {
  1332. nvidia,pins = "ulpi_data5_po6";
  1333. nvidia,function = "safe";
  1334. nvidia,enable-input = <0x0>;
  1335. nvidia,pull = <0x1>;
  1336. nvidia,tristate = <0x1>;
  1337. };
  1338.  
  1339. ulpi_data6_po7 {
  1340. nvidia,pins = "ulpi_data6_po7";
  1341. nvidia,function = "safe";
  1342. nvidia,enable-input = <0x0>;
  1343. nvidia,pull = <0x1>;
  1344. nvidia,tristate = <0x1>;
  1345. };
  1346.  
  1347. ulpi_data7_po0 {
  1348. nvidia,pins = "ulpi_data7_po0";
  1349. nvidia,function = "safe";
  1350. nvidia,enable-input = <0x0>;
  1351. nvidia,pull = <0x1>;
  1352. nvidia,tristate = <0x1>;
  1353. };
  1354.  
  1355. pv0 {
  1356. nvidia,pins = "pv0";
  1357. nvidia,function = "safe";
  1358. nvidia,enable-input = <0x0>;
  1359. nvidia,pull = <0x1>;
  1360. nvidia,tristate = <0x1>;
  1361. };
  1362.  
  1363. pv1 {
  1364. nvidia,pins = "pv1";
  1365. nvidia,function = "safe";
  1366. nvidia,enable-input = <0x0>;
  1367. nvidia,pull = <0x1>;
  1368. nvidia,tristate = <0x1>;
  1369. };
  1370.  
  1371. gpio_x6_aud_px6 {
  1372. nvidia,pins = "gpio_x6_aud_px6";
  1373. nvidia,function = "safe";
  1374. nvidia,enable-input = <0x0>;
  1375. nvidia,pull = <0x1>;
  1376. nvidia,tristate = <0x1>;
  1377. };
  1378.  
  1379. gpio_x4_aud_px4 {
  1380. nvidia,pins = "gpio_x4_aud_px4";
  1381. nvidia,function = "safe";
  1382. nvidia,enable-input = <0x0>;
  1383. nvidia,pull = <0x1>;
  1384. nvidia,tristate = <0x1>;
  1385. };
  1386.  
  1387. ph6 {
  1388. nvidia,pins = "ph6";
  1389. nvidia,function = "safe";
  1390. nvidia,enable-input = <0x0>;
  1391. nvidia,pull = <0x1>;
  1392. nvidia,tristate = <0x1>;
  1393. };
  1394.  
  1395. ph7 {
  1396. nvidia,pins = "ph7";
  1397. nvidia,function = "safe";
  1398. nvidia,enable-input = <0x0>;
  1399. nvidia,pull = <0x1>;
  1400. nvidia,tristate = <0x1>;
  1401. };
  1402.  
  1403. hdmi_int_pn7 {
  1404. nvidia,pins = "hdmi_int_pn7";
  1405. nvidia,function = "safe";
  1406. nvidia,enable-input = <0x0>;
  1407. nvidia,pull = <0x1>;
  1408. nvidia,tristate = <0x1>;
  1409. };
  1410.  
  1411. spdif_out_pk5 {
  1412. nvidia,pins = "spdif_out_pk5";
  1413. nvidia,function = "safe";
  1414. nvidia,enable-input = <0x0>;
  1415. nvidia,pull = <0x1>;
  1416. nvidia,tristate = <0x1>;
  1417. };
  1418.  
  1419. spdif_in_pk6 {
  1420. nvidia,pins = "spdif_in_pk6";
  1421. nvidia,function = "safe";
  1422. nvidia,enable-input = <0x0>;
  1423. nvidia,pull = <0x1>;
  1424. nvidia,tristate = <0x1>;
  1425. };
  1426.  
  1427. pu2 {
  1428. nvidia,pins = "pu2";
  1429. nvidia,function = "safe";
  1430. nvidia,enable-input = <0x0>;
  1431. nvidia,pull = <0x1>;
  1432. nvidia,tristate = <0x1>;
  1433. };
  1434.  
  1435. pu3 {
  1436. nvidia,pins = "pu3";
  1437. nvidia,function = "safe";
  1438. nvidia,enable-input = <0x0>;
  1439. nvidia,pull = <0x1>;
  1440. nvidia,tristate = <0x1>;
  1441. };
  1442.  
  1443. kb_row4_pr4 {
  1444. nvidia,pins = "kb_row4_pr4";
  1445. nvidia,function = "safe";
  1446. nvidia,enable-input = <0x0>;
  1447. nvidia,pull = <0x1>;
  1448. nvidia,tristate = <0x1>;
  1449. };
  1450.  
  1451. kb_row11_ps3 {
  1452. nvidia,pins = "kb_row11_ps3";
  1453. nvidia,function = "safe";
  1454. nvidia,enable-input = <0x0>;
  1455. nvidia,pull = <0x1>;
  1456. nvidia,tristate = <0x1>;
  1457. };
  1458.  
  1459. kb_row12_ps4 {
  1460. nvidia,pins = "kb_row12_ps4";
  1461. nvidia,function = "safe";
  1462. nvidia,enable-input = <0x0>;
  1463. nvidia,pull = <0x1>;
  1464. nvidia,tristate = <0x1>;
  1465. };
  1466.  
  1467. kb_col1_pq1 {
  1468. nvidia,pins = "kb_col1_pq1";
  1469. nvidia,function = "safe";
  1470. nvidia,enable-input = <0x0>;
  1471. nvidia,pull = <0x1>;
  1472. nvidia,tristate = <0x1>;
  1473. };
  1474.  
  1475. kb_col2_pq2 {
  1476. nvidia,pins = "kb_col2_pq2";
  1477. nvidia,function = "safe";
  1478. nvidia,enable-input = <0x0>;
  1479. nvidia,pull = <0x1>;
  1480. nvidia,tristate = <0x1>;
  1481. };
  1482.  
  1483. kb_col4_pq4 {
  1484. nvidia,pins = "kb_col4_pq4";
  1485. nvidia,function = "safe";
  1486. nvidia,enable-input = <0x0>;
  1487. nvidia,pull = <0x0>;
  1488. nvidia,tristate = <0x0>;
  1489. };
  1490.  
  1491. sdmmc1_wp_n_pv3 {
  1492. nvidia,pins = "sdmmc1_wp_n_pv3";
  1493. nvidia,function = "safe";
  1494. nvidia,enable-input = <0x0>;
  1495. nvidia,pull = <0x1>;
  1496. nvidia,tristate = <0x1>;
  1497. };
  1498.  
  1499. pc7 {
  1500. nvidia,pins = "pc7";
  1501. nvidia,function = "safe";
  1502. nvidia,enable-input = <0x0>;
  1503. nvidia,pull = <0x1>;
  1504. nvidia,tristate = <0x1>;
  1505. };
  1506.  
  1507. pi2 {
  1508. nvidia,pins = "pi2";
  1509. nvidia,function = "safe";
  1510. nvidia,enable-input = <0x0>;
  1511. nvidia,pull = <0x1>;
  1512. nvidia,tristate = <0x1>;
  1513. };
  1514.  
  1515. pk3 {
  1516. nvidia,pins = "pk3";
  1517. nvidia,function = "safe";
  1518. nvidia,enable-input = <0x0>;
  1519. nvidia,pull = <0x1>;
  1520. nvidia,tristate = <0x1>;
  1521. };
  1522.  
  1523. ph4 {
  1524. nvidia,pins = "ph4";
  1525. nvidia,function = "safe";
  1526. nvidia,enable-input = <0x0>;
  1527. nvidia,pull = <0x1>;
  1528. nvidia,tristate = <0x1>;
  1529. };
  1530.  
  1531. pcc2 {
  1532. nvidia,pins = "pcc2";
  1533. nvidia,function = "safe";
  1534. nvidia,enable-input = <0x0>;
  1535. nvidia,pull = <0x1>;
  1536. nvidia,tristate = <0x1>;
  1537. };
  1538.  
  1539. pg0 {
  1540. nvidia,pins = "pg0";
  1541. nvidia,function = "safe";
  1542. nvidia,enable-input = <0x0>;
  1543. nvidia,pull = <0x1>;
  1544. nvidia,tristate = <0x1>;
  1545. };
  1546.  
  1547. pg1 {
  1548. nvidia,pins = "pg1";
  1549. nvidia,function = "safe";
  1550. nvidia,enable-input = <0x0>;
  1551. nvidia,pull = <0x1>;
  1552. nvidia,tristate = <0x1>;
  1553. };
  1554.  
  1555. pk7 {
  1556. nvidia,pins = "pk7";
  1557. nvidia,function = "safe";
  1558. nvidia,enable-input = <0x0>;
  1559. nvidia,pull = <0x1>;
  1560. nvidia,tristate = <0x1>;
  1561. };
  1562.  
  1563. pu0 {
  1564. nvidia,pins = "pu0";
  1565. nvidia,function = "safe";
  1566. nvidia,enable-input = <0x0>;
  1567. nvidia,pull = <0x1>;
  1568. nvidia,tristate = <0x1>;
  1569. };
  1570.  
  1571. pu1 {
  1572. nvidia,pins = "pu1";
  1573. nvidia,function = "safe";
  1574. nvidia,enable-input = <0x0>;
  1575. nvidia,pull = <0x1>;
  1576. nvidia,tristate = <0x1>;
  1577. };
  1578.  
  1579. pg4 {
  1580. nvidia,pins = "pg4";
  1581. nvidia,function = "safe";
  1582. nvidia,enable-input = <0x0>;
  1583. nvidia,pull = <0x1>;
  1584. nvidia,tristate = <0x1>;
  1585. };
  1586.  
  1587. pg5 {
  1588. nvidia,pins = "pg5";
  1589. nvidia,function = "safe";
  1590. nvidia,enable-input = <0x0>;
  1591. nvidia,pull = <0x1>;
  1592. nvidia,tristate = <0x1>;
  1593. };
  1594.  
  1595. usb_vbus_en0_pn4 {
  1596. nvidia,pins = "usb_vbus_en0_pn4";
  1597. nvidia,function = "safe";
  1598. nvidia,enable-input = <0x0>;
  1599. nvidia,pull = <0x1>;
  1600. nvidia,tristate = <0x1>;
  1601. };
  1602.  
  1603. usb_vbus_en1_pn5 {
  1604. nvidia,pins = "usb_vbus_en1_pn5";
  1605. nvidia,function = "safe";
  1606. nvidia,enable-input = <0x0>;
  1607. nvidia,pull = <0x1>;
  1608. nvidia,tristate = <0x1>;
  1609. };
  1610.  
  1611. usb_vbus_en2_pff1 {
  1612. nvidia,pins = "usb_vbus_en2_pff1";
  1613. nvidia,function = "safe";
  1614. nvidia,enable-input = <0x0>;
  1615. nvidia,pull = <0x1>;
  1616. nvidia,tristate = <0x1>;
  1617. };
  1618.  
  1619. jtag_rtck {
  1620. nvidia,pins = "jtag_rtck";
  1621. nvidia,function = "safe";
  1622. nvidia,enable-input = <0x0>;
  1623. nvidia,pull = <0x1>;
  1624. nvidia,tristate = <0x1>;
  1625. };
  1626. };
  1627.  
  1628. drive {
  1629. linux,phandle = <0x4>;
  1630. phandle = <0x4>;
  1631.  
  1632. drive_sdio1 {
  1633. nvidia,pins = "drive_sdio1";
  1634. nvidia,high-speed-mode = <0x1>;
  1635. nvidia,schmitt = <0x0>;
  1636. nvidia,low-power-mode = <0x3>;
  1637. nvidia,pull-down-strength = <0x20>;
  1638. nvidia,pull-up-strength = <0x2a>;
  1639. nvidia,slew-rate-rising = <0x0>;
  1640. nvidia,slew-rate-falling = <0x0>;
  1641. };
  1642.  
  1643. drive_sdio3 {
  1644. nvidia,pins = "drive_sdio3";
  1645. nvidia,high-speed-mode = <0x1>;
  1646. nvidia,schmitt = <0x0>;
  1647. nvidia,low-power-mode = <0x3>;
  1648. nvidia,pull-down-strength = <0x14>;
  1649. nvidia,pull-up-strength = <0x24>;
  1650. nvidia,slew-rate-rising = <0x0>;
  1651. nvidia,slew-rate-falling = <0x0>;
  1652. };
  1653.  
  1654. drive_gma {
  1655. nvidia,pins = "drive_gma";
  1656. nvidia,high-speed-mode = <0x1>;
  1657. nvidia,schmitt = <0x0>;
  1658. nvidia,low-power-mode = <0x3>;
  1659. nvidia,pull-down-strength = <0x1>;
  1660. nvidia,pull-up-strength = <0x2>;
  1661. nvidia,slew-rate-rising = <0x0>;
  1662. nvidia,slew-rate-falling = <0x0>;
  1663. nvidia,drive-type = <0x1>;
  1664. };
  1665. };
  1666. };
  1667.  
  1668. serial@70006000 {
  1669. compatible = "nvidia,tegra114-hsuart";
  1670. reg = <0x70006000 0x40>;
  1671. reg-shift = <0x2>;
  1672. interrupts = <0x0 0x24 0x4>;
  1673. nvidia,dma-request-selector = <0x6 0x8>;
  1674. nvidia,memory-clients = <0xe>;
  1675. status = "okay";
  1676. };
  1677.  
  1678. serial@70006040 {
  1679. compatible = "nvidia,tegra114-hsuart";
  1680. reg = <0x70006040 0x40>;
  1681. reg-shift = <0x2>;
  1682. interrupts = <0x0 0x25 0x4>;
  1683. nvidia,dma-request-selector = <0x6 0x9>;
  1684. nvidia,memory-clients = <0xe>;
  1685. status = "okay";
  1686. };
  1687.  
  1688. serial@70006200 {
  1689. compatible = "nvidia,tegra114-hsuart";
  1690. reg = <0x70006200 0x40>;
  1691. reg-shift = <0x2>;
  1692. interrupts = <0x0 0x2e 0x4>;
  1693. nvidia,dma-request-selector = <0x6 0xa>;
  1694. nvidia,memory-clients = <0xe>;
  1695. status = "okay";
  1696. };
  1697.  
  1698. serial@70006300 {
  1699. compatible = "nvidia,tegra114-uart", "nvidia,tegra20-uart";
  1700. reg = <0x70006300 0x40>;
  1701. reg-shift = <0x2>;
  1702. interrupts = <0x0 0x5a 0x4>;
  1703. nvidia,dma-request-selector = <0x6 0x13>;
  1704. nvidia,memory-clients = <0xe>;
  1705. status = "disabled";
  1706. };
  1707.  
  1708. i2c@7000c000 {
  1709. #address-cells = <0x1>;
  1710. #size-cells = <0x0>;
  1711. compatible = "nvidia,tegra124-i2c";
  1712. reg = <0x7000c000 0x100>;
  1713. interrupts = <0x0 0x26 0x4>;
  1714. scl-gpio = <0x7 0x14 0x0>;
  1715. sda-gpio = <0x7 0x15 0x0>;
  1716. nvidia,memory-clients = <0xe>;
  1717. status = "okay";
  1718. clock-frequency = <0x61a80>;
  1719.  
  1720. backlight@2c {
  1721. compatible = "ti,lp8556";
  1722. reg = <0x2c>;
  1723. dev-ctrl = [83];
  1724. init-brt = [1f];
  1725. led-en = [0f];
  1726.  
  1727. rom_98h {
  1728. rom-addr = [98];
  1729. rom-val = [80];
  1730. };
  1731.  
  1732. rom_9eh {
  1733. rom-addr = [9e];
  1734. rom-val = [21];
  1735. };
  1736.  
  1737. rom_a0h {
  1738. rom-addr = [a0];
  1739. rom-val = [ff];
  1740. };
  1741.  
  1742. rom_a1h {
  1743. rom-addr = [a1];
  1744. rom-val = [3f];
  1745. };
  1746.  
  1747. rom_a2h {
  1748. rom-addr = [a2];
  1749. rom-val = [20];
  1750. };
  1751.  
  1752. rom_a3h {
  1753. rom-addr = [a3];
  1754. rom-val = [00];
  1755. };
  1756.  
  1757. rom_a4h {
  1758. rom-addr = [a4];
  1759. rom-val = [72];
  1760. };
  1761.  
  1762. rom_a5h {
  1763. rom-addr = [a5];
  1764. rom-val = [24];
  1765. };
  1766.  
  1767. rom_a6h {
  1768. rom-addr = [a6];
  1769. rom-val = [80];
  1770. };
  1771.  
  1772. rom_a7h {
  1773. rom-addr = [a7];
  1774. rom-val = [f5];
  1775. };
  1776.  
  1777. rom_a8h {
  1778. rom-addr = [a8];
  1779. rom-val = [24];
  1780. };
  1781.  
  1782. rom_a9h {
  1783. rom-addr = [a9];
  1784. rom-val = [b2];
  1785. };
  1786.  
  1787. rom_aah {
  1788. rom-addr = [aa];
  1789. rom-val = [8f];
  1790. };
  1791.  
  1792. rom_aeh {
  1793. rom-addr = [ae];
  1794. rom-val = [0f];
  1795. };
  1796. };
  1797.  
  1798. lsm6db0@08 {
  1799. compatible = "st,lsm6db0";
  1800. reg = <0x8>;
  1801. st,irq-gpio = <0x7 0x8b 0x0>;
  1802. st,reset-gpio = <0x7 0xb5 0x0>;
  1803. st,wakeup-gpio = <0x7 0x90 0x0>;
  1804. };
  1805.  
  1806. bmp280@77 {
  1807. compatible = "bmp,bmp280";
  1808. reg = <0x77>;
  1809. };
  1810.  
  1811. isl29035@44 {
  1812. compatible = "intersil,isl29035";
  1813. reg = <0x44>;
  1814. interrupt-parent = <0x7>;
  1815. interrupts = <0xbb 0x8>;
  1816. als_factor = <0x10>;
  1817. als_highrange = <0x2>;
  1818. als_lowthres = <0xe00>;
  1819. als_highthres = <0xf800>;
  1820. als_sensitive = <0x19>;
  1821. };
  1822.  
  1823. akm09911@0c {
  1824. compatible = "akm,akm09911";
  1825. reg = <0xc>;
  1826. akm,layout = <0x6>;
  1827. akm,gpio_rst = <0x84>;
  1828. };
  1829.  
  1830. mpu6515@68 {
  1831. compatible = "inven,mpu6515";
  1832. reg = <0x68>;
  1833. interrupt-parent = <0x7>;
  1834. interrupts = <0x8b 0x1>;
  1835. regulator_config = <0x0>;
  1836. fs_range = <0x0>;
  1837. axis_map_x = <0x0>;
  1838. axis_map_y = <0x1>;
  1839. axis_map_z = <0x2>;
  1840. negate_x = <0x0>;
  1841. negate_y = <0x1>;
  1842. negate_z = <0x1>;
  1843. poll_interval = <0xc8>;
  1844. min_interval = <0x5>;
  1845. inven,secondary_type = "none";
  1846. inven,secondary_reg = <0xc>;
  1847. inven,secondary_name = "ak8963";
  1848. inven,secondary_axis_map_x = <0x1>;
  1849. inven,secondary_axis_map_y = <0x0>;
  1850. inven,secondary_axis_map_z = <0x2>;
  1851. inven,secondary_negate_x = <0x0>;
  1852. inven,secondary_negate_y = <0x0>;
  1853. inven,secondary_negate_z = <0x1>;
  1854. inven,aux_type = "none";
  1855. inven,aux_reg = <0x76>;
  1856. inven,aus_name = "bmp280";
  1857. };
  1858. };
  1859.  
  1860. i2c@7000c400 {
  1861. #address-cells = <0x1>;
  1862. #size-cells = <0x0>;
  1863. compatible = "nvidia,tegra124-i2c";
  1864. reg = <0x7000c400 0x100>;
  1865. interrupts = <0x0 0x54 0x4>;
  1866. scl-gpio = <0x7 0x9d 0x0>;
  1867. sda-gpio = <0x7 0x9e 0x0>;
  1868. nvidia,memory-clients = <0xe>;
  1869. status = "okay";
  1870. clock-frequency = <0x61a80>;
  1871.  
  1872. bq2419x@6b {
  1873. compatible = "ti,bq2419x";
  1874. interrupt-parent = <0x7>;
  1875. interrupts = <0x48 0x0>;
  1876. reg = <0x6b>;
  1877.  
  1878. charger {
  1879. regulator-name = "batt_regulator";
  1880. regulator-max-microamp = <0x1e8480>;
  1881. ti,watchdog-timeout = <0x0>;
  1882. rtc-alarm-time = <0xe10>;
  1883. ti,auto-recharge-time = <0x3c>;
  1884. ti,input-voltage-limit-millivolt = <0x10cc>;
  1885. ti,fast-charge-current-limit-milliamp = <0x9c4>;
  1886. ti,pre-charge-current-limit-milliamp = <0x100>;
  1887. ti,charge-term-current-limit-milliamp = <0x190>;
  1888. ti,ir-comp-resister-ohm = <0xa>;
  1889. ti,ir-comp-voltage-millivolt = <0x20>;
  1890. ti,thermal-regulation-threshold-degc = <0x64>;
  1891. ti,charge-voltage-limit-millivolt = <0x10fe>;
  1892. ti,disbale-suspend-during-charging;
  1893.  
  1894. consumers {
  1895.  
  1896. c1 {
  1897. regulator-consumer-supply = "usb_bat_chg";
  1898. regulator-consumer-device = "tegra-udc.0";
  1899. };
  1900. };
  1901. };
  1902.  
  1903. vbus {
  1904. regulator-name = "vbus_regulator";
  1905.  
  1906. consumers {
  1907.  
  1908. c1 {
  1909. regulator-consumer-supply = "usb_vbus";
  1910. regulator-consumer-device = "tegra-ehci.0";
  1911. };
  1912.  
  1913. c2 {
  1914. regulator-consumer-supply = "usb_vbus";
  1915. regulator-consumer-device = "tegra-otg";
  1916. };
  1917. };
  1918. };
  1919. };
  1920. };
  1921.  
  1922. i2c@7000c500 {
  1923. #address-cells = <0x1>;
  1924. #size-cells = <0x0>;
  1925. compatible = "nvidia,tegra124-i2c";
  1926. reg = <0x7000c500 0x100>;
  1927. interrupts = <0x0 0x5c 0x4>;
  1928. scl-gpio = <0x7 0xd9 0x0>;
  1929. sda-gpio = <0x7 0xda 0x0>;
  1930. nvidia,memory-clients = <0xe>;
  1931. status = "okay";
  1932. clock-frequency = <0x61a80>;
  1933. };
  1934.  
  1935. i2c@7000c700 {
  1936. #address-cells = <0x1>;
  1937. #size-cells = <0x0>;
  1938. compatible = "nvidia,tegra124-i2c";
  1939. reg = <0x7000c700 0x100>;
  1940. interrupts = <0x0 0x78 0x4>;
  1941. scl-gpio = <0x7 0xac 0x0>;
  1942. sda-gpio = <0x7 0xad 0x0>;
  1943. nvidia,memory-clients = <0xe>;
  1944. status = "okay";
  1945. clock-frequency = <0x61a80>;
  1946. nvidia,clock-always-on;
  1947. };
  1948.  
  1949. i2c@7000d000 {
  1950. #address-cells = <0x1>;
  1951. #size-cells = <0x0>;
  1952. compatible = "nvidia,tegra124-i2c";
  1953. reg = <0x7000d000 0x100>;
  1954. interrupts = <0x0 0x35 0x4>;
  1955. nvidia,require-cldvfs-clock;
  1956. scl-gpio = <0x7 0xce 0x0>;
  1957. sda-gpio = <0x7 0xcf 0x0>;
  1958. nvidia,memory-clients = <0xe>;
  1959. status = "okay";
  1960. clock-frequency = <0x61a80>;
  1961. nvidia,bit-banging-xfer-after-shutdown;
  1962.  
  1963. tps65913 {
  1964. compatible = "ti,palmas";
  1965. reg = <0x58>;
  1966. interrupts = <0x0 0x56 0x0>;
  1967. #interrupt-cells = <0x2>;
  1968. interrupt-controller;
  1969. ti,long_press_delay = <0x1>;
  1970. linux,phandle = <0x8>;
  1971. phandle = <0x8>;
  1972.  
  1973. gpio {
  1974. compatible = "ti,palmas-gpio";
  1975. gpio-controller;
  1976. #gpio-cells = <0x2>;
  1977. linux,phandle = <0x10>;
  1978. phandle = <0x10>;
  1979. };
  1980.  
  1981. rtc {
  1982. compatible = "ti,palmas-rtc";
  1983. interrupt-parent = <0x8>;
  1984. interrupts = <0x8 0x0>;
  1985. };
  1986.  
  1987. pinmux {
  1988. compatible = "ti,tps65913-pinctrl";
  1989. pinctrl-names = "default";
  1990. pinctrl-0 = <0x9>;
  1991.  
  1992. pinmux {
  1993. linux,phandle = <0x9>;
  1994. phandle = <0x9>;
  1995.  
  1996. powergood {
  1997. pins = "powergood";
  1998. function = "powergood";
  1999. };
  2000.  
  2001. vac {
  2002. pins = "vac";
  2003. function = "vac";
  2004. };
  2005.  
  2006. pin_gpio0 {
  2007. pins = "gpio0";
  2008. function = "id";
  2009. bias-pull-up;
  2010. };
  2011.  
  2012. pin_gpio1 {
  2013. pins = "gpio1";
  2014. function = "gpio";
  2015. };
  2016.  
  2017. pin_gpio6 {
  2018. pins = "gpio2", "gpio3", "gpio4", "gpio6", "gpio7";
  2019. function = "gpio";
  2020. };
  2021.  
  2022. pin_gpio5 {
  2023. pins = "gpio5";
  2024. function = "clk32kgaudio";
  2025. };
  2026. };
  2027. };
  2028.  
  2029. extcon {
  2030. compatible = "ti,palmas-usb";
  2031. extcon-name = "palmas-extcon";
  2032. ti,wakeup;
  2033. ti,enable-id-detection;
  2034. ti,enable-vbus-detection;
  2035. };
  2036.  
  2037. power_pm {
  2038. compatible = "ti,palmas-pm";
  2039. system-pmic-power-off;
  2040. };
  2041.  
  2042. gpadc {
  2043. compatible = "ti,palmas-gpadc";
  2044. interrupt-parent = <0x8>;
  2045. interrupts = <0x12 0x0 0x10 0x0 0x11 0x0>;
  2046. ti,channel0-current-microamp = <0x14>;
  2047.  
  2048. iio_map {
  2049.  
  2050. ch1 {
  2051. ti,adc-channel-number = <0x1>;
  2052. ti,adc-consumer-device = "generic-adc-thermal.0";
  2053. ti,adc-consumer-channel = "battery-temp-channel";
  2054. };
  2055.  
  2056. ch6 {
  2057. ti,adc-channel-number = <0x6>;
  2058. ti,adc-consumer-device = "palmas-battery";
  2059. ti,adc-consumer-channel = "vbat_channel";
  2060. };
  2061. };
  2062. };
  2063.  
  2064. clock {
  2065. compatible = "ti,palmas-clk";
  2066.  
  2067. clk32k_kg {
  2068. ti,clock-boot-enable;
  2069. };
  2070.  
  2071. clk32k_kg_audio {
  2072. ti,clock-boot-enable;
  2073. };
  2074. };
  2075.  
  2076. pmic {
  2077. compatible = "ti,tps65913-pmic", "ti,palmas-pmic";
  2078. ldo1-in-supply = <0xa>;
  2079. ldo2-in-supply = <0xa>;
  2080. ldo3-in-supply = <0xb>;
  2081. ldo5-in-supply = <0xc>;
  2082. ldo6-in-supply = <0xd>;
  2083. ldo7-in-supply = <0xd>;
  2084. ldo9-in-supply = <0xd>;
  2085. ldoln-in-supply = <0xb>;
  2086. smps10-out2-supply = <0xb>;
  2087.  
  2088. regulators {
  2089.  
  2090. smps123 {
  2091. regulator-name = "vdd-cpu";
  2092. regulator-min-microvolt = <0xaae60>;
  2093. regulator-max-microvolt = <0x155cc0>;
  2094. regulator-always-on;
  2095. regulator-boot-on;
  2096. ti,roof-floor = <0x1>;
  2097. ti,config-flags = <0x8>;
  2098.  
  2099. consumers {
  2100.  
  2101. c1 {
  2102. regulator-consumer-supply = "vdd_cpu";
  2103. };
  2104. };
  2105. };
  2106.  
  2107. smps45 {
  2108. regulator-name = "vdd-gpu";
  2109. regulator-min-microvolt = <0xaae60>;
  2110. regulator-max-microvolt = <0x155cc0>;
  2111. regulator-init-microvolt = <0xf4240>;
  2112. regulator-boot-on;
  2113.  
  2114. consumers {
  2115.  
  2116. c1 {
  2117. regulator-consumer-supply = "vdd_gpu";
  2118. };
  2119. };
  2120. };
  2121.  
  2122. smps6 {
  2123. regulator-name = "vddio-ddr";
  2124. regulator-min-microvolt = <0x124f80>;
  2125. regulator-max-microvolt = <0x124f80>;
  2126. regulator-always-on;
  2127. regulator-boot-on;
  2128. linux,phandle = <0xa>;
  2129. phandle = <0xa>;
  2130.  
  2131. consumers {
  2132.  
  2133. c1 {
  2134. regulator-consumer-supply = "vddio_ddr";
  2135. };
  2136.  
  2137. c2 {
  2138. regulator-consumer-supply = "vddio_ddr_mclk";
  2139. };
  2140.  
  2141. c3 {
  2142. regulator-consumer-supply = "vddio_ddr3";
  2143. };
  2144.  
  2145. c4 {
  2146. regulator-consumer-supply = "vcore1_ddr3";
  2147. };
  2148. };
  2149. };
  2150.  
  2151. smps7 {
  2152. regulator-name = "vdd-core";
  2153. regulator-min-microvolt = <0xaae60>;
  2154. regulator-max-microvolt = <0x155cc0>;
  2155. regulator-always-on;
  2156. regulator-boot-on;
  2157. ti,roof-floor = <0x3>;
  2158.  
  2159. consumers {
  2160.  
  2161. c1 {
  2162. regulator-consumer-supply = "vdd_core";
  2163. };
  2164. };
  2165. };
  2166.  
  2167. smps8 {
  2168. regulator-name = "vdd-1v8";
  2169. regulator-min-microvolt = <0x1b7740>;
  2170. regulator-max-microvolt = <0x1b7740>;
  2171. regulator-always-on;
  2172. regulator-boot-on;
  2173. linux,phandle = <0xc>;
  2174. phandle = <0xc>;
  2175.  
  2176. consumers {
  2177.  
  2178. c1 {
  2179. regulator-consumer-supply = "dbvdd";
  2180. regulator-consumer-device = "tegra-snd-rt5639.0";
  2181. };
  2182.  
  2183. c2 {
  2184. regulator-consumer-supply = "dbvdd";
  2185. regulator-consumer-device = "tegra-snd-rt5645.0";
  2186. };
  2187.  
  2188. c3 {
  2189. regulator-consumer-supply = "avdd";
  2190. regulator-consumer-device = "tegra-snd-rt5639.0";
  2191. };
  2192.  
  2193. c4 {
  2194. regulator-consumer-supply = "avdd";
  2195. regulator-consumer-device = "tegra-snd-rt5645.0";
  2196. };
  2197.  
  2198. c5 {
  2199. regulator-consumer-supply = "dmicvdd";
  2200. regulator-consumer-device = "tegra-snd-rt5639.0";
  2201. };
  2202.  
  2203. c6 {
  2204. regulator-consumer-supply = "dmicvdd";
  2205. regulator-consumer-device = "tegra-snd-rt5645.0";
  2206. };
  2207.  
  2208. c7 {
  2209. regulator-consumer-supply = "avdd_osc";
  2210. };
  2211.  
  2212. c8 {
  2213. regulator-consumer-supply = "vddio_sys";
  2214. };
  2215.  
  2216. c9 {
  2217. regulator-consumer-supply = "vddio_sys_2";
  2218. };
  2219.  
  2220. c10 {
  2221. regulator-consumer-supply = "pwrdet_nand";
  2222. };
  2223.  
  2224. c11 {
  2225. regulator-consumer-supply = "vddio_sdmmc";
  2226. regulator-consumer-device = "sdhci-tegra.0";
  2227. };
  2228.  
  2229. c12 {
  2230. regulator-consumer-supply = "pwrdet_sdmmc1";
  2231. };
  2232.  
  2233. c13 {
  2234. regulator-consumer-supply = "vddio_sdmmc";
  2235. regulator-consumer-device = "sdhci-tegra.3";
  2236. };
  2237.  
  2238. c14 {
  2239. regulator-consumer-supply = "pwrdet_sdmmc4";
  2240. };
  2241.  
  2242. c15 {
  2243. regulator-consumer-supply = "avdd_pll_utmip";
  2244. regulator-consumer-device = "tegra-udc.0";
  2245. };
  2246.  
  2247. c16 {
  2248. regulator-consumer-supply = "avdd_pll_utmip";
  2249. regulator-consumer-device = "tegra-ehci.0";
  2250. };
  2251.  
  2252. c17 {
  2253. regulator-consumer-supply = "avdd_pll_utmip";
  2254. regulator-consumer-device = "tegra-ehci.1";
  2255. };
  2256.  
  2257. c18 {
  2258. regulator-consumer-supply = "avdd_pll_utmip";
  2259. regulator-consumer-device = "tegra-ehci.2";
  2260. };
  2261.  
  2262. c19 {
  2263. regulator-consumer-supply = "avdd_pll_utmip";
  2264. regulator-consumer-device = "tegra-xhci";
  2265. };
  2266.  
  2267. c20 {
  2268. regulator-consumer-supply = "vddio_audio";
  2269. };
  2270.  
  2271. c21 {
  2272. regulator-consumer-supply = "pwrdet_audio";
  2273. };
  2274.  
  2275. c22 {
  2276. regulator-consumer-supply = "vddio_uart";
  2277. };
  2278.  
  2279. c23 {
  2280. regulator-consumer-supply = "pwrdet_uart";
  2281. };
  2282.  
  2283. c24 {
  2284. regulator-consumer-supply = "vddio_bb";
  2285. };
  2286.  
  2287. c25 {
  2288. regulator-consumer-supply = "pwrdet_bb";
  2289. };
  2290.  
  2291. c26 {
  2292. regulator-consumer-supply = "vdd_dtv";
  2293. };
  2294.  
  2295. c27 {
  2296. regulator-consumer-supply = "vdd_1v8_eeprom";
  2297. };
  2298.  
  2299. c28 {
  2300. regulator-consumer-supply = "vddio_cam";
  2301. regulator-consumer-device = "tegra_camera";
  2302. };
  2303.  
  2304. c29 {
  2305. regulator-consumer-supply = "vddio_cam";
  2306. regulator-consumer-device = "vi";
  2307. };
  2308.  
  2309. c30 {
  2310. regulator-consumer-supply = "pwrdet_cam";
  2311. };
  2312.  
  2313. c31 {
  2314. regulator-consumer-supply = "dvdd";
  2315. regulator-consumer-device = "spi0.0";
  2316. };
  2317.  
  2318. c32 {
  2319. regulator-consumer-supply = "vdd";
  2320. regulator-consumer-device = "0-004c";
  2321. };
  2322.  
  2323. c33 {
  2324. regulator-consumer-supply = "vdd";
  2325. regulator-consumer-device = "0-004d";
  2326. };
  2327.  
  2328. c34 {
  2329. regulator-consumer-supply = "vddio";
  2330. regulator-consumer-device = "0-0077";
  2331. };
  2332.  
  2333. c35 {
  2334. regulator-consumer-supply = "dvdd_lcd";
  2335. };
  2336.  
  2337. c36 {
  2338. regulator-consumer-supply = "vdd_lcd_1v8_s";
  2339. };
  2340. };
  2341. };
  2342.  
  2343. smps9 {
  2344. regulator-name = "vdd-snsr";
  2345. regulator-min-microvolt = <0x325aa0>;
  2346. regulator-max-microvolt = <0x325aa0>;
  2347. linux,phandle = <0xd>;
  2348. phandle = <0xd>;
  2349.  
  2350. consumers {
  2351.  
  2352. c1 {
  2353. regulator-consumer-supply = "vdd_snsr";
  2354. };
  2355.  
  2356. c2 {
  2357. regulator-consumer-supply = "vddio_sd_slot";
  2358. regulator-consumer-device = "sdhci-tegra.3";
  2359. };
  2360.  
  2361. c3 {
  2362. regulator-consumer-supply = "vddio_sd_slot";
  2363. regulator-consumer-device = "sdhci-tegra.2";
  2364. };
  2365.  
  2366. c4 {
  2367. regulator-consumer-supply = "vdd_3v3_gps";
  2368. };
  2369.  
  2370. c5 {
  2371. regulator-consumer-supply = "vdd_3v3_nfc";
  2372. };
  2373.  
  2374. c8 {
  2375. regulator-consumer-supply = "vdd";
  2376. regulator-consumer-device = "0-0077";
  2377. };
  2378. };
  2379. };
  2380.  
  2381. smps10_out1 {
  2382. regulator-name = "vdd-out1-5v0";
  2383. regulator-min-microvolt = <0x4c4b40>;
  2384. regulator-max-microvolt = <0x4c4b40>;
  2385. regulator-always-on;
  2386. regulator-boot-on;
  2387. linux,phandle = <0x11>;
  2388. phandle = <0x11>;
  2389. };
  2390.  
  2391. smps10_out2 {
  2392. regulator-name = "vdd-out2-5v0";
  2393. regulator-min-microvolt = <0x4c4b40>;
  2394. regulator-max-microvolt = <0x4c4b40>;
  2395. linux,phandle = <0xb>;
  2396. phandle = <0xb>;
  2397.  
  2398. consumers {
  2399.  
  2400. c1 {
  2401. regulator-consumer-supply = "vdd_5v0_mdm";
  2402. };
  2403.  
  2404. c2 {
  2405. regulator-consumer-supply = "vdd_5v0_snsr";
  2406. };
  2407.  
  2408. c3 {
  2409. regulator-consumer-supply = "vdd_5v0_dis";
  2410. };
  2411.  
  2412. c6 {
  2413. regulator-consumer-supply = "avddio_pex";
  2414. regulator-consumer-device = "tegra-pcie";
  2415. };
  2416.  
  2417. c7 {
  2418. regulator-consumer-supply = "dvddio_pex";
  2419. regulator-consumer-device = "tegra-pcie";
  2420. };
  2421.  
  2422. c8 {
  2423. regulator-consumer-supply = "avddio_usb";
  2424. regulator-consumer-device = "tegra-xhci";
  2425. };
  2426. };
  2427. };
  2428.  
  2429. ldo1 {
  2430. regulator-name = "avdd-pll";
  2431. regulator-min-microvolt = <0x100590>;
  2432. regulator-max-microvolt = <0x100590>;
  2433. regulator-always-on;
  2434. regulator-boot-on;
  2435. ti,roof-floor = <0x3>;
  2436.  
  2437. consumers {
  2438.  
  2439. c1 {
  2440. regulator-consumer-supply = "avdd_pll_m";
  2441. };
  2442.  
  2443. c2 {
  2444. regulator-consumer-supply = "avdd_pll_ap_c2_c3";
  2445. };
  2446.  
  2447. c3 {
  2448. regulator-consumer-supply = "avdd_pll_cud2dpd";
  2449. };
  2450.  
  2451. c4 {
  2452. regulator-consumer-supply = "avdd_pll_c4";
  2453. };
  2454.  
  2455. c5 {
  2456. regulator-consumer-supply = "avdd_lvds0_io";
  2457. };
  2458.  
  2459. c6 {
  2460. regulator-consumer-supply = "vddio_ddr_hs";
  2461. };
  2462.  
  2463. c7 {
  2464. regulator-consumer-supply = "avdd_pll_erefe";
  2465. };
  2466.  
  2467. c8 {
  2468. regulator-consumer-supply = "avdd_pll_x";
  2469. };
  2470.  
  2471. c9 {
  2472. regulator-consumer-supply = "avdd_pll_cg";
  2473. };
  2474.  
  2475. c10 {
  2476. regulator-consumer-supply = "avdd_pex_pll";
  2477. regulator-consumer-device = "tegra-pcie";
  2478. };
  2479.  
  2480. c11 {
  2481. regulator-consumer-supply = "avdd_hdmi_pll";
  2482. regulator-consumer-device = "tegradc.1";
  2483. };
  2484. };
  2485. };
  2486.  
  2487. ldo2 {
  2488. regulator-name = "vdd-lcd-io";
  2489. regulator-min-microvolt = <0x1b7740>;
  2490. regulator-max-microvolt = <0x1b7740>;
  2491. regulator-boot-on;
  2492.  
  2493. consumers {
  2494.  
  2495. c1 {
  2496. regulator-consumer-supply = "vdd_cam_1v1_cam";
  2497. };
  2498.  
  2499. c2 {
  2500. regulator-consumer-supply = "imx179_reg2";
  2501. };
  2502.  
  2503. c3 {
  2504. regulator-consumer-supply = "vdd_1v2_cam";
  2505. };
  2506.  
  2507. c4 {
  2508. regulator-consumer-supply = "vdig";
  2509. regulator-consumer-device = "2-0010";
  2510. };
  2511.  
  2512. c5 {
  2513. regulator-consumer-supply = "dvdd";
  2514. regulator-consumer-device = "2-0036";
  2515. };
  2516.  
  2517. c6 {
  2518. regulator-consumer-supply = "vdig";
  2519. regulator-consumer-device = "2-0036";
  2520. };
  2521.  
  2522. c7 {
  2523. regulator-consumer-supply = "vdig_lv";
  2524. regulator-consumer-device = "2-0010";
  2525. };
  2526.  
  2527. c8 {
  2528. regulator-consumer-supply = "dvdd_lcdio";
  2529. };
  2530. };
  2531. };
  2532.  
  2533. ldo3 {
  2534. regulator-name = "vdd-touch";
  2535. regulator-min-microvolt = <0x325aa0>;
  2536. regulator-max-microvolt = <0x325aa0>;
  2537.  
  2538. consumers {
  2539.  
  2540. c1 {
  2541. regulator-consumer-supply = "avdd";
  2542. regulator-consumer-device = "spi0.0";
  2543. };
  2544.  
  2545. c2 {
  2546. regulator-consumer-supply = "vdd-touch";
  2547. regulator-consumer-device = "3-004a";
  2548. };
  2549. };
  2550. };
  2551.  
  2552. ldo4 {
  2553. regulator-name = "avdd-cam";
  2554. regulator-min-microvolt = <0x2932e0>;
  2555. regulator-max-microvolt = <0x2932e0>;
  2556.  
  2557. consumers {
  2558.  
  2559. c1 {
  2560. regulator-consumer-supply = "vdd_2v7_hv";
  2561. };
  2562.  
  2563. c2 {
  2564. regulator-consumer-supply = "avdd_cam1_cam";
  2565. };
  2566.  
  2567. c3 {
  2568. regulator-consumer-supply = "avdd_cam2_cam";
  2569. };
  2570.  
  2571. c4 {
  2572. regulator-consumer-supply = "avdd_cam3_cam";
  2573. };
  2574.  
  2575. c5 {
  2576. regulator-consumer-supply = "vana";
  2577. regulator-consumer-device = "2-0010";
  2578. };
  2579.  
  2580. c6 {
  2581. regulator-consumer-supply = "avdd";
  2582. regulator-consumer-device = "2-0010";
  2583. };
  2584.  
  2585. c7 {
  2586. regulator-consumer-supply = "avdd_ov5693";
  2587. regulator-consumer-device = "2-0036";
  2588. };
  2589. };
  2590. };
  2591.  
  2592. ldo5 {
  2593. regulator-name = "avdd-dsi-csi";
  2594. regulator-min-microvolt = <0x124f80>;
  2595. regulator-max-microvolt = <0x124f80>;
  2596.  
  2597. consumers {
  2598.  
  2599. c1 {
  2600. regulator-consumer-supply = "vddio_hsic";
  2601. regulator-consumer-device = "tegra-ehci.1";
  2602. };
  2603.  
  2604. c2 {
  2605. regulator-consumer-supply = "vddio_hsic";
  2606. regulator-consumer-device = "tegra-ehci.2";
  2607. };
  2608.  
  2609. c3 {
  2610. regulator-consumer-supply = "vddio_hsic";
  2611. regulator-consumer-device = "tegra-xhci";
  2612. };
  2613.  
  2614. c4 {
  2615. regulator-consumer-supply = "avdd_dsi_csi";
  2616. regulator-consumer-device = "tegradc.0";
  2617. };
  2618.  
  2619. c5 {
  2620. regulator-consumer-supply = "avdd_dsi_csi";
  2621. regulator-consumer-device = "tegradc.1";
  2622. };
  2623.  
  2624. c6 {
  2625. regulator-consumer-supply = "avdd_dsi_csi";
  2626. regulator-consumer-device = "vi.0";
  2627. };
  2628.  
  2629. c7 {
  2630. regulator-consumer-supply = "avdd_dsi_csi";
  2631. regulator-consumer-device = "vi.1";
  2632. };
  2633.  
  2634. c8 {
  2635. regulator-consumer-supply = "pwrdet_mipi";
  2636. };
  2637.  
  2638. c9 {
  2639. regulator-consumer-supply = "avdd_hsic_com";
  2640. };
  2641.  
  2642. c10 {
  2643. regulator-consumer-supply = "avdd_hsic_mdm";
  2644. };
  2645.  
  2646. c11 {
  2647. regulator-consumer-supply = "vdd_lcd_bl";
  2648. };
  2649. };
  2650. };
  2651.  
  2652. ldo6 {
  2653. regulator-name = "vdd-cam-af";
  2654. regulator-min-microvolt = <0x1b7740>;
  2655. regulator-max-microvolt = <0x1b7740>;
  2656.  
  2657. consumers {
  2658.  
  2659. c1 {
  2660. regulator-consumer-supply = "vdd_cam1_1v8_cam";
  2661. };
  2662.  
  2663. c2 {
  2664. regulator-consumer-supply = "vdd_cam2_1v8_cam";
  2665. };
  2666.  
  2667. c3 {
  2668. regulator-consumer-supply = "vif";
  2669. regulator-consumer-device = "2-0010";
  2670. };
  2671.  
  2672. c4 {
  2673. regulator-consumer-supply = "dovdd";
  2674. regulator-consumer-device = "2-0036";
  2675. };
  2676.  
  2677. c5 {
  2678. regulator-consumer-supply = "vif2";
  2679. regulator-consumer-device = "2-0021";
  2680. };
  2681.  
  2682. c6 {
  2683. regulator-consumer-supply = "vif";
  2684. regulator-consumer-device = "2-0036";
  2685. };
  2686.  
  2687. c7 {
  2688. regulator-consumer-supply = "vdd_i2c";
  2689. regulator-consumer-device = "2-000c";
  2690. };
  2691.  
  2692. c8 {
  2693. regulator-consumer-supply = "vi2c";
  2694. regulator-consumer-device = "2-0030";
  2695. };
  2696.  
  2697. c9 {
  2698. regulator-consumer-supply = "vdd";
  2699. regulator-consumer-device = "2-004a";
  2700. };
  2701.  
  2702. c10 {
  2703. regulator-consumer-supply = "vif";
  2704. regulator-consumer-device = "2-0048";
  2705. };
  2706. };
  2707. };
  2708.  
  2709. ldo7 {
  2710. regulator-name = "avdd-cam-af";
  2711. regulator-min-microvolt = <0x2932e0>;
  2712. regulator-max-microvolt = <0x2932e0>;
  2713.  
  2714. consumers {
  2715.  
  2716. c1 {
  2717. regulator-consumer-supply = "avdd_af1_cam";
  2718. };
  2719.  
  2720. c2 {
  2721. regulator-consumer-supply = "imx179_reg1";
  2722. };
  2723.  
  2724. c3 {
  2725. regulator-consumer-supply = "vana";
  2726. regulator-consumer-device = "2-0021";
  2727. };
  2728.  
  2729. c4 {
  2730. regulator-consumer-supply = "vdd";
  2731. regulator-consumer-device = "2-000c";
  2732. };
  2733.  
  2734. c5 {
  2735. regulator-consumer-supply = "vdd_af1";
  2736. regulator-consumer-device = "2-0010";
  2737. };
  2738.  
  2739. c6 {
  2740. regulator-consumer-supply = "vin";
  2741. regulator-consumer-device = "2-0030";
  2742. };
  2743.  
  2744. c7 {
  2745. regulator-consumer-supply = "vin";
  2746. regulator-consumer-device = "2-004a";
  2747. };
  2748.  
  2749. c8 {
  2750. regulator-consumer-supply = "vana";
  2751. regulator-consumer-device = "2-0036";
  2752. };
  2753.  
  2754. c9 {
  2755. regulator-consumer-supply = "vana";
  2756. regulator-consumer-device = "2-0048";
  2757. };
  2758. };
  2759. };
  2760.  
  2761. ldo8 {
  2762. regulator-name = "vdd-rtc";
  2763. regulator-min-microvolt = <0xe7ef0>;
  2764. regulator-max-microvolt = <0xe7ef0>;
  2765. regulator-always-on;
  2766. regulator-boot-on;
  2767.  
  2768. consumers {
  2769.  
  2770. c1 {
  2771. regulator-consumer-supply = "vdd_rtc";
  2772. };
  2773. };
  2774. };
  2775.  
  2776. ldo9 {
  2777. regulator-name = "vddio-sdmmc-2";
  2778. regulator-min-microvolt = <0x1b7740>;
  2779. regulator-max-microvolt = <0x325aa0>;
  2780.  
  2781. consumers {
  2782.  
  2783. c1 {
  2784. regulator-consumer-supply = "vddio_sdmmc";
  2785. regulator-consumer-device = "sdhci-tegra.2";
  2786. };
  2787.  
  2788. c2 {
  2789. regulator-consumer-supply = "pwrdet_sdmmc3";
  2790. };
  2791. };
  2792. };
  2793.  
  2794. ldoln {
  2795. regulator-name = "vddio-hv";
  2796. regulator-min-microvolt = <0x325aa0>;
  2797. regulator-max-microvolt = <0x325aa0>;
  2798. regulator-always-on;
  2799. regulator-boot-on;
  2800.  
  2801. consumers {
  2802.  
  2803. c1 {
  2804. regulator-consumer-supply = "vddio_hv";
  2805. regulator-consumer-device = "tegradc.1";
  2806. };
  2807.  
  2808. c2 {
  2809. regulator-consumer-supply = "avdd_hdmi";
  2810. regulator-consumer-device = "tegradc.1";
  2811. };
  2812.  
  2813. c3 {
  2814. regulator-consumer-supply = "pwrdet_hv";
  2815. };
  2816.  
  2817. c4 {
  2818. regulator-consumer-supply = "vddio_pex_ctl";
  2819. regulator-consumer-device = "tegra-pcie";
  2820. };
  2821. };
  2822. };
  2823.  
  2824. ldousb {
  2825. regulator-name = "avdd-usb";
  2826. regulator-min-microvolt = <0x325aa0>;
  2827. regulator-max-microvolt = <0x325aa0>;
  2828. regulator-always-on;
  2829. regulator-boot-on;
  2830.  
  2831. consumers {
  2832.  
  2833. c1 {
  2834. regulator-consumer-supply = "pwrdet_pex_ctl";
  2835. };
  2836.  
  2837. c2 {
  2838. regulator-consumer-supply = "avdd_usb";
  2839. regulator-consumer-device = "tegra-udc.0";
  2840. };
  2841.  
  2842. c3 {
  2843. regulator-consumer-supply = "avdd_usb";
  2844. regulator-consumer-device = "tegra-ehci.0";
  2845. };
  2846.  
  2847. c4 {
  2848. regulator-consumer-supply = "avdd_usb";
  2849. regulator-consumer-device = "tegra-ehci.1";
  2850. };
  2851.  
  2852. c5 {
  2853. regulator-consumer-supply = "avdd_usb";
  2854. regulator-consumer-device = "tegra-ehci.2";
  2855. };
  2856.  
  2857. c6 {
  2858. regulator-consumer-supply = "hvdd_usb";
  2859. regulator-consumer-device = "tegra-xhci";
  2860. };
  2861.  
  2862. c7 {
  2863. regulator-consumer-supply = "hvdd_pex";
  2864. regulator-consumer-device = "tegra-pcie";
  2865. };
  2866.  
  2867. c8 {
  2868. regulator-consumer-supply = "hvdd_pex_pll_e";
  2869. regulator-consumer-device = "tegra-pcie";
  2870. };
  2871. };
  2872. };
  2873. };
  2874. };
  2875. };
  2876. };
  2877.  
  2878. i2c@7000d100 {
  2879. #address-cells = <0x1>;
  2880. #size-cells = <0x0>;
  2881. compatible = "nvidia,tegra124-i2c";
  2882. reg = <0x7000d100 0x100>;
  2883. interrupts = <0x0 0x3f 0x4>;
  2884. nvidia,memory-clients = <0xe>;
  2885. status = "okay";
  2886. clock-frequency = <0x61a80>;
  2887. };
  2888.  
  2889. spi@7000d400 {
  2890. compatible = "nvidia,tegra114-spi";
  2891. reg = <0x7000d400 0x200>;
  2892. interrupts = <0x0 0x3b 0x4>;
  2893. nvidia,dma-request-selector = <0x6 0xf>;
  2894. nvidia,memory-clients = <0xe>;
  2895. #address-cells = <0x1>;
  2896. #size-cells = <0x0>;
  2897. status = "okay";
  2898. spi-max-frequency = <0x17d7840>;
  2899. };
  2900.  
  2901. spi@7000d600 {
  2902. compatible = "nvidia,tegra114-spi";
  2903. reg = <0x7000d600 0x200>;
  2904. interrupts = <0x0 0x52 0x4>;
  2905. nvidia,dma-request-selector = <0x6 0x10>;
  2906. nvidia,memory-clients = <0xe>;
  2907. #address-cells = <0x1>;
  2908. #size-cells = <0x0>;
  2909. status = "disabled";
  2910. };
  2911.  
  2912. spi@7000d800 {
  2913. compatible = "nvidia,tegra114-spi";
  2914. reg = <0x7000d800 0x200>;
  2915. interrupts = <0x0 0x53 0x4>;
  2916. nvidia,dma-request-selector = <0x6 0x11>;
  2917. nvidia,memory-clients = <0xe>;
  2918. #address-cells = <0x1>;
  2919. #size-cells = <0x0>;
  2920. status = "disabled";
  2921. };
  2922.  
  2923. spi@7000da00 {
  2924. compatible = "nvidia,tegra114-spi";
  2925. reg = <0x7000da00 0x200>;
  2926. interrupts = <0x0 0x5d 0x4>;
  2927. nvidia,dma-request-selector = <0x6 0x12>;
  2928. nvidia,memory-clients = <0xe>;
  2929. #address-cells = <0x1>;
  2930. #size-cells = <0x0>;
  2931. status = "okay";
  2932. spi-max-frequency = <0x17d7840>;
  2933. };
  2934.  
  2935. spi@7000dc00 {
  2936. compatible = "nvidia,tegra114-spi";
  2937. reg = <0x7000dc00 0x200>;
  2938. interrupts = <0x0 0x5e 0x4>;
  2939. nvidia,dma-request-selector = <0x6 0x1b>;
  2940. nvidia,memory-clients = <0xe>;
  2941. #address-cells = <0x1>;
  2942. #size-cells = <0x0>;
  2943. status = "disabled";
  2944. };
  2945.  
  2946. spi@7000de00 {
  2947. compatible = "nvidia,tegra114-spi";
  2948. reg = <0x7000de00 0x200>;
  2949. interrupts = <0x0 0x4f 0x4>;
  2950. nvidia,dma-request-selector = <0x6 0x1c>;
  2951. nvidia,memory-clients = <0xe>;
  2952. #address-cells = <0x1>;
  2953. #size-cells = <0x0>;
  2954. status = "disabled";
  2955. };
  2956.  
  2957. pmc {
  2958. compatible = "nvidia,tegra124-pmc";
  2959. reg = <0x7000e400 0x400>;
  2960. clocks = <0xe 0x105 0xf>;
  2961. clock-names = "pclk", "clk32k_in";
  2962. };
  2963.  
  2964. clocks {
  2965. compatible = "simple-bus";
  2966. #address-cells = <0x1>;
  2967. #size-cells = <0x0>;
  2968.  
  2969. clock {
  2970. compatible = "fixed-clock";
  2971. reg = <0x0>;
  2972. #clock-cells = <0x0>;
  2973. clock-frequency = <0x8000>;
  2974. linux,phandle = <0xf>;
  2975. phandle = <0xf>;
  2976. };
  2977. };
  2978.  
  2979. timer@60005000 {
  2980. compatible = "nvidia,tegra-nvtimer";
  2981. reg = <0x60005000 0x400>;
  2982. interrupts = <0x0 0x0 0x4 0x0 0x1 0x4 0x0 0x29 0x4 0x0 0x2a 0x4 0x0 0x79 0x4 0x0 0x97 0x4 0x0 0x98 0x4 0x0 0x99 0x4 0x0 0x9a 0x4 0x0 0x9b 0x4 0x0 0x7a 0x4>;
  2983. clocks = <0xe 0x5>;
  2984. };
  2985.  
  2986. rtc {
  2987. compatible = "nvidia,tegra-rtc";
  2988. reg = <0x7000e000 0x100>;
  2989. interrupts = <0x0 0x2 0x4>;
  2990. clocks = <0xe 0x4>;
  2991. };
  2992.  
  2993. ahub {
  2994. compatible = "nvidia,tegra124-ahub";
  2995. reg = <0x70300000 0x200 0x70300800 0x800 0x70300200 0x200>;
  2996. interrupts = <0x0 0x67 0x4>;
  2997. nvidia,dma-request-selector = <0x6 0x1 0x6 0x2 0x6 0x3 0x6 0x4 0x6 0x6 0x6 0x7 0x6 0xc 0x6 0xd 0x6 0xe 0x6 0x1d>;
  2998. status = "disabled";
  2999. ranges;
  3000. #address-cells = <0x1>;
  3001. #size-cells = <0x1>;
  3002.  
  3003. i2s@70301000 {
  3004. compatible = "nvidia,tegra124-i2s";
  3005. reg = <0x70301000 0x100>;
  3006. nvidia,ahub-cif-ids = <0x4 0x4>;
  3007. status = "disabled";
  3008. };
  3009.  
  3010. i2s@70301100 {
  3011. compatible = "nvidia,tegra124-i2s";
  3012. reg = <0x70301100 0x100>;
  3013. nvidia,ahub-cif-ids = <0x5 0x5>;
  3014. status = "disabled";
  3015. };
  3016.  
  3017. i2s@70301200 {
  3018. compatible = "nvidia,tegra124-i2s";
  3019. reg = <0x70301200 0x100>;
  3020. nvidia,ahub-cif-ids = <0x6 0x6>;
  3021. status = "disabled";
  3022. };
  3023.  
  3024. i2s@70301300 {
  3025. compatible = "nvidia,tegra124-i2s";
  3026. reg = <0x70301300 0x100>;
  3027. nvidia,ahub-cif-ids = <0x7 0x7>;
  3028. status = "disabled";
  3029. };
  3030.  
  3031. i2s@70301400 {
  3032. compatible = "nvidia,tegra124-i2s";
  3033. reg = <0x70301400 0x100>;
  3034. nvidia,ahub-cif-ids = <0x8 0x8>;
  3035. status = "disabled";
  3036. };
  3037.  
  3038. amx@70303000 {
  3039. compatible = "nvidia,tegra124-amx";
  3040. reg = <0x70303000 0x100>;
  3041. status = "disabled";
  3042. };
  3043.  
  3044. amx@70303100 {
  3045. compatible = "nvidia,tegra124-amx";
  3046. reg = <0x70303100 0x100>;
  3047. status = "disabled";
  3048. };
  3049.  
  3050. adx@70303800 {
  3051. compatible = "nvidia,tegra124-adx";
  3052. reg = <0x70303800 0x100>;
  3053. status = "disabled";
  3054. };
  3055.  
  3056. adx@70303900 {
  3057. compatible = "nvidia,tegra124-adx";
  3058. reg = <0x70303900 0x100>;
  3059. status = "disabled";
  3060. };
  3061.  
  3062. spdif@70306000 {
  3063. compatible = "nvidia,tegra124-spdif";
  3064. reg = <0x70306000 0x100>;
  3065. status = "disabled";
  3066. };
  3067. };
  3068.  
  3069. host1x {
  3070. compatible = "nvidia,tegra124-host1x", "simple-bus";
  3071. reg = <0x50000000 0x28000>;
  3072. interrupts = <0x0 0x41 0x4 0x0 0x43 0x4>;
  3073. nvidia,memory-clients = <0x4 0x6 0x7 0x11>;
  3074. #address-cells = <0x1>;
  3075. #size-cells = <0x1>;
  3076. ranges = <0x53000000 0x53000000 0x6000000>;
  3077.  
  3078. vi {
  3079. compatible = "nvidia,tegra124-vi";
  3080. reg = <0x54080000 0x40000>;
  3081. nvidia,memory-clients = <0x12>;
  3082. };
  3083.  
  3084. isp@54600000 {
  3085. compatible = "nvidia,tegra124-isp";
  3086. reg = <0x54600000 0x40000>;
  3087. interrupts = <0x0 0x47 0x4>;
  3088. nvidia,memory-clients = <0x8 0x1d>;
  3089. };
  3090.  
  3091. isp@54680000 {
  3092. compatible = "nvidia,tegra124-isp";
  3093. reg = <0x54680000 0x40000>;
  3094. interrupts = <0x0 0x48 0x4>;
  3095. nvidia,memory-clients = <0x8 0x1d>;
  3096. };
  3097.  
  3098. dc@54200000 {
  3099. compatible = "nvidia,tegra124-dc";
  3100. reg = <0x54200000 0x40000>;
  3101. interrupts = <0x0 0x49 0x4>;
  3102. nvidia,memory-clients = <0x2>;
  3103. status = "disabled";
  3104.  
  3105. rgb {
  3106. status = "disabled";
  3107. };
  3108. };
  3109.  
  3110. dc@54240000 {
  3111. compatible = "nvidia,tegra124-dc";
  3112. reg = <0x54240000 0x40000>;
  3113. interrupts = <0x0 0x4a 0x4>;
  3114. nvidia,memory-clients = <0x3>;
  3115. status = "disabled";
  3116.  
  3117. rgb {
  3118. status = "disabled";
  3119. };
  3120. };
  3121.  
  3122. hdmi {
  3123. compatible = "nvidia,tegra124-hdmi";
  3124. reg = <0x54280000 0x40000>;
  3125. interrupts = <0x0 0x4b 0x4>;
  3126. status = "okay";
  3127. };
  3128.  
  3129. dsi {
  3130. compatible = "nvidia,tegra124-dsi";
  3131. reg = <0x54300000 0x40000 0x54400000 0x40000>;
  3132. status = "disabled";
  3133. };
  3134.  
  3135. vic {
  3136. compatible = "nvidia,tegra124-vic";
  3137. reg = <0x54340000 0x40000>;
  3138. nvidia,memory-clients = <0x13>;
  3139. };
  3140.  
  3141. msenc {
  3142. compatible = "nvidia,tegra124-msenc";
  3143. reg = <0x544c0000 0x40000>;
  3144. nvidia,memory-clients = <0xb>;
  3145. };
  3146.  
  3147. tsec {
  3148. compatible = "nvidia,tegra124-tsec";
  3149. reg = <0x54500000 0x40000>;
  3150. nvidia,memory-clients = <0x17>;
  3151. };
  3152.  
  3153. gk20a {
  3154. compatible = "nvidia,tegra124-gk20a";
  3155. reg = <0x57000000 0x1000000 0x58000000 0x1000000 0x538f0000 0x1000>;
  3156. interrupts = <0x0 0x9d 0x4 0x0 0x9e 0x4>;
  3157. nvidia,memory-clients = <0x1e 0x1f>;
  3158. };
  3159.  
  3160. nvavp {
  3161. compatible = "nvidia,tegra124-nvavp";
  3162. interrupts = <0x0 0x4 0x4>;
  3163. reg = <0x60001000 0xe200>;
  3164. };
  3165. };
  3166.  
  3167. xusb@70090000 {
  3168. compatible = "nvidia,tegra124-xhci";
  3169. reg = <0x70090000 0x8000 0x70098000 0x1000 0x70099000 0x1000 0x7009f000 0x1000>;
  3170. interrupts = <0x0 0x27 0x4 0x0 0x28 0x4 0x0 0x31 0x4 0x0 0x61 0x4 0x0 0x15 0x4>;
  3171. status = "okay";
  3172. nvidia,gpio_ss1_sata = <0x0>;
  3173. nvidia,portmap = <0x101>;
  3174. nvidia,ss_portmap = <0x0>;
  3175. nvidia,lane_owner = <0x4>;
  3176. nvidia,ulpicap = <0x0>;
  3177. nvidia,supply_utmi_vbuses = "usb_vbus0", "usb_vbus1", "usb_vbus2";
  3178. nvidia,supply_s3p3v = "hvdd_usb";
  3179. nvidia,supply_s1p8v = "avdd_pll_utmip";
  3180. nvidia,supply_vddio_hsic = "vddio_hsic";
  3181. nvidia,supply_s1p05v = "avddio_usb";
  3182. };
  3183.  
  3184. mipical {
  3185. compatible = "nvidia,tegra124-mipical";
  3186. reg = <0x700e3000 0x100>;
  3187. };
  3188.  
  3189. chosen {
  3190. bootargs = "tegraid=40.0.0.00.00 vmalloc=256M video=tegrafb console=ttyS0,115200n8 earlyprintk";
  3191. linux,initrd-start = <0x85000000>;
  3192. linux,initrd-end = <0x851bc400>;
  3193. };
  3194.  
  3195. memory {
  3196. device_type = "memory";
  3197. reg = <0x0 0x0>;
  3198. };
  3199.  
  3200. interrupt-controller@50041000 {
  3201. compatible = "arm,cortex-a15-gic";
  3202. interrupt-controller;
  3203. #interrupt-cells = <0x3>;
  3204. reg = <0x50041000 0x1000 0x50042000 0x100>;
  3205. linux,phandle = <0x1>;
  3206. phandle = <0x1>;
  3207. };
  3208.  
  3209. interrupt-controller@60004000 {
  3210. compatible = "nvidia,tegra-gic";
  3211. interrupt-controller;
  3212. reg = <0x60004000 0x40 0x60004100 0x40 0x60004200 0x40 0x60004300 0x40 0x60004400 0x40>;
  3213. };
  3214.  
  3215. timer {
  3216. compatible = "arm,armv7-timer";
  3217. interrupts = <0x1 0xd 0xf04 0x1 0xe 0xf04>;
  3218. };
  3219.  
  3220. pwm {
  3221. compatible = "nvidia,tegra124-pwm";
  3222. reg = <0x7000a000 0x100>;
  3223. #pwm-cells = <0x2>;
  3224. clocks = <0xe 0x11>;
  3225. status = "okay";
  3226. linux,phandle = <0x12>;
  3227. phandle = <0x12>;
  3228. };
  3229.  
  3230. memory@0x80000000 {
  3231. device_type = "memory";
  3232. reg = <0x80000000 0x80000000>;
  3233. };
  3234.  
  3235. memory-controller@7001b000 {
  3236. compatible = "nvidia,tegra12-emc";
  3237. reg = <0x7001b000 0x800>;
  3238. #address-cells = <0x1>;
  3239. #size-cells = <0x0>;
  3240.  
  3241. emc-table@12750 {
  3242. compatible = "nvidia,tegra12-emc-table";
  3243. nvidia,revision = <0x19>;
  3244. nvidia,dvfs-version = "3_12750_02_V5.0.14_V1.1";
  3245. clock-frequency = <0x31ce>;
  3246. nvidia,emc-min-mv = <0x320>;
  3247. nvidia,gk20a-min-mv = <0x320>;
  3248. nvidia,source = "pllp_out0";
  3249. nvidia,src-sel-reg = <0x4000003e>;
  3250. nvidia,burst-regs-num = <0xa5>;
  3251. nvidia,burst-up-down-regs-num = <0x1f>;
  3252. nvidia,emc-registers = <0x0 0x3 0x0 0x2 0x2 0x6 0x8 0x3 0xa 0x2 0x2 0x1 0x2 0x0 0x3 0x3 0x6 0x2 0x0 0x5 0x5 0x10000 0x3 0x0 0x0 0x0 0x0 0x4 0xc 0xd 0xf 0x30 0x0 0xc 0x2 0x2 0x2 0x0 0x1 0xc 0x3 0x3 0x3 0x3 0x3 0x6 0x4 0x3 0x3 0x56 0x0 0x0 0x0 0x1363a296 0x5800a0 0x8000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0xfc000 0xfc000 0x0 0xfc000 0xfc000 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0xfc000 0xfc000 0xfc000 0xfc000 0xfc00 0xfc00 0xfc00 0xfc00 0x200 0x0 0x100100 0x130b018 0x0 0x0 0x77ffc000 0x303 0x81f1f008 0x7070000 0x3f 0x15ddddd 0x51451400 0x514514 0x514514 0x51451400 0x3f 0x0 0x0 0x64000 0x11 0xd0011 0xd0011 0x0 0x3 0xf3f3 0x80000164 0xa 0x40040001 0x8000000a 0x1 0x1 0x2 0x0 0x3 0x1 0x2 0x7 0x2 0x1 0x4 0x5 0x5040102 0x90402 0x77c30303 0x70000f03 0x1f0000>;
  3253. nvidia,emc-burst-up-down-regs = <0x1 0x7 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff0049 0xff0080 0xff0004 0xff0004 0x800ff 0xff 0xff0004 0xff00ff 0xff00ff 0xff0024 0xff00ff 0xff 0xff 0xff00ff 0xff 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff00ff>;
  3254. nvidia,emc-zcal-cnt-long = <0x15>;
  3255. nvidia,emc-acal-interval = <0x1fffff>;
  3256. nvidia,emc-ctt-term_ctrl = <0x802>;
  3257. nvidia,emc-cfg = <0xf3200000>;
  3258. nvidia,emc-cfg-2 = <0x8c7>;
  3259. nvidia,emc-sel-dpd-ctrl = <0x4013c>;
  3260. nvidia,emc-cfg-dig-dll = <0x580068>;
  3261. nvidia,emc-bgbias-ctl0 = <0x8>;
  3262. nvidia,emc-auto-cal-config2 = <0x0>;
  3263. nvidia,emc-auto-cal-config3 = <0x0>;
  3264. nvidia,emc-auto-cal-config = <0xa1430000>;
  3265. nvidia,emc-mode-0 = <0x0>;
  3266. nvidia,emc-mode-1 = <0x10083>;
  3267. nvidia,emc-mode-2 = <0x20004>;
  3268. nvidia,emc-mode-4 = <0x800b0000>;
  3269. nvidia,emc-clock-latency-change = <0xe1dc>;
  3270. };
  3271.  
  3272. emc-table@20400 {
  3273. compatible = "nvidia,tegra12-emc-table";
  3274. nvidia,revision = <0x19>;
  3275. nvidia,dvfs-version = "3_20400_02_V5.0.14_V1.1";
  3276. clock-frequency = <0x4fb0>;
  3277. nvidia,emc-min-mv = <0x320>;
  3278. nvidia,gk20a-min-mv = <0x320>;
  3279. nvidia,source = "pllp_out0";
  3280. nvidia,src-sel-reg = <0x40000026>;
  3281. nvidia,burst-regs-num = <0xa5>;
  3282. nvidia,burst-up-down-regs-num = <0x1f>;
  3283. nvidia,emc-registers = <0x1 0x4 0x0 0x2 0x2 0x6 0x8 0x3 0xa 0x2 0x2 0x1 0x2 0x0 0x3 0x3 0x6 0x2 0x0 0x5 0x5 0x10000 0x3 0x0 0x0 0x0 0x0 0x4 0xc 0xd 0xf 0x4d 0x0 0x13 0x2 0x2 0x2 0x0 0x1 0xc 0x5 0x5 0x3 0x3 0x3 0x6 0x4 0x3 0x3 0x8a 0x0 0x0 0x0 0x1363a296 0x5800a0 0x8000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0xfc000 0xfc000 0x0 0xfc000 0xfc000 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0xfc000 0xfc000 0xfc000 0xfc000 0xfc00 0xfc00 0xfc00 0xfc00 0x200 0x0 0x100100 0x130b018 0x0 0x0 0x77ffc000 0x303 0x81f1f008 0x7070000 0x3f 0x15ddddd 0x51451400 0x514514 0x514514 0x51451400 0x3f 0x0 0x0 0x64000 0x11 0x150011 0x150011 0x0 0x3 0xf3f3 0x8000019f 0xa 0x40020001 0x80000012 0x1 0x1 0x2 0x0 0x3 0x1 0x2 0x7 0x2 0x1 0x4 0x5 0x5040102 0x90402 0x75a30303 0x70000f03 0x1f0000>;
  3284. nvidia,emc-burst-up-down-regs = <0x1 0xa 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff0049 0xff0080 0xff0004 0xff0004 0x800ff 0xff 0xff0004 0xff00ff 0xff00ff 0xff0024 0xff00ff 0xff 0xff 0xff00ff 0xff 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff00ff>;
  3285. nvidia,emc-zcal-cnt-long = <0x15>;
  3286. nvidia,emc-acal-interval = <0x1fffff>;
  3287. nvidia,emc-ctt-term_ctrl = <0x802>;
  3288. nvidia,emc-cfg = <0xf3200000>;
  3289. nvidia,emc-cfg-2 = <0x8c7>;
  3290. nvidia,emc-sel-dpd-ctrl = <0x4013c>;
  3291. nvidia,emc-cfg-dig-dll = <0x580068>;
  3292. nvidia,emc-bgbias-ctl0 = <0x8>;
  3293. nvidia,emc-auto-cal-config2 = <0x0>;
  3294. nvidia,emc-auto-cal-config3 = <0x0>;
  3295. nvidia,emc-auto-cal-config = <0xa1430000>;
  3296. nvidia,emc-mode-0 = <0x0>;
  3297. nvidia,emc-mode-1 = <0x10083>;
  3298. nvidia,emc-mode-2 = <0x20004>;
  3299. nvidia,emc-mode-4 = <0x800b0000>;
  3300. nvidia,emc-clock-latency-change = <0x8b1a>;
  3301. };
  3302.  
  3303. emc-table@40800 {
  3304. compatible = "nvidia,tegra12-emc-table";
  3305. nvidia,revision = <0x19>;
  3306. nvidia,dvfs-version = "3_40800_02_V5.0.14_V1.1";
  3307. clock-frequency = <0x9f60>;
  3308. nvidia,emc-min-mv = <0x320>;
  3309. nvidia,gk20a-min-mv = <0x320>;
  3310. nvidia,source = "pllp_out0";
  3311. nvidia,src-sel-reg = <0x40000012>;
  3312. nvidia,burst-regs-num = <0xa5>;
  3313. nvidia,burst-up-down-regs-num = <0x1f>;
  3314. nvidia,emc-registers = <0x2 0x8 0x0 0x2 0x2 0x6 0x8 0x3 0xa 0x2 0x2 0x1 0x2 0x0 0x3 0x3 0x6 0x2 0x0 0x5 0x5 0x10000 0x3 0x0 0x0 0x0 0x0 0x4 0xc 0xd 0xf 0x9a 0x0 0x26 0x2 0x2 0x2 0x0 0x1 0xc 0x9 0x9 0x3 0x3 0x3 0x6 0x4 0x3 0x3 0x113 0x0 0x0 0x0 0x1363a296 0x5800a0 0x8000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0xfc000 0xfc000 0x0 0xfc000 0xfc000 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0xfc000 0xfc000 0xfc000 0xfc000 0xfc00 0xfc00 0xfc00 0xfc00 0x200 0x0 0x100100 0x130b018 0x0 0x0 0x77ffc000 0x303 0x81f1f008 0x7070000 0x3f 0x15ddddd 0x51451400 0x514514 0x514514 0x51451400 0x3f 0x0 0x0 0x64000 0x11 0x290011 0x290011 0x0 0x3 0xf3f3 0x8000023a 0xa 0xa0000001 0x80000017 0x1 0x1 0x2 0x0 0x3 0x1 0x2 0x7 0x2 0x1 0x4 0x5 0x5040102 0x90402 0x74030303 0x70000f03 0x1f0000>;
  3315. nvidia,emc-burst-up-down-regs = <0x1 0x14 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff0049 0xff0080 0xff0004 0xff0004 0x800ff 0xff 0xff0004 0xff00ff 0xff00ff 0xff0024 0xff00ff 0xff 0xff 0xff00ff 0xff 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff00ff>;
  3316. nvidia,emc-zcal-cnt-long = <0x15>;
  3317. nvidia,emc-acal-interval = <0x1fffff>;
  3318. nvidia,emc-ctt-term_ctrl = <0x802>;
  3319. nvidia,emc-cfg = <0xf3200000>;
  3320. nvidia,emc-cfg-2 = <0x8c7>;
  3321. nvidia,emc-sel-dpd-ctrl = <0x4013c>;
  3322. nvidia,emc-cfg-dig-dll = <0x580068>;
  3323. nvidia,emc-bgbias-ctl0 = <0x8>;
  3324. nvidia,emc-auto-cal-config2 = <0x0>;
  3325. nvidia,emc-auto-cal-config3 = <0x0>;
  3326. nvidia,emc-auto-cal-config = <0xa1430000>;
  3327. nvidia,emc-mode-0 = <0x0>;
  3328. nvidia,emc-mode-1 = <0x10083>;
  3329. nvidia,emc-mode-2 = <0x20004>;
  3330. nvidia,emc-mode-4 = <0x800b0000>;
  3331. nvidia,emc-clock-latency-change = <0x5172>;
  3332. };
  3333.  
  3334. emc-table@68000 {
  3335. compatible = "nvidia,tegra12-emc-table";
  3336. nvidia,revision = <0x19>;
  3337. nvidia,dvfs-version = "3_68000_02_V5.0.14_V1.1";
  3338. clock-frequency = <0x109a0>;
  3339. nvidia,emc-min-mv = <0x320>;
  3340. nvidia,gk20a-min-mv = <0x320>;
  3341. nvidia,source = "pllp_out0";
  3342. nvidia,src-sel-reg = <0x4000000a>;
  3343. nvidia,burst-regs-num = <0xa5>;
  3344. nvidia,burst-up-down-regs-num = <0x1f>;
  3345. nvidia,emc-registers = <0x4 0xe 0x0 0x2 0x2 0x6 0x8 0x3 0xa 0x2 0x2 0x1 0x2 0x0 0x3 0x3 0x6 0x2 0x0 0x5 0x5 0x10000 0x3 0x0 0x0 0x0 0x0 0x4 0xc 0xd 0xf 0x101 0x0 0x40 0x2 0x2 0x2 0x0 0x1 0xc 0xf 0xf 0x3 0x3 0x3 0x6 0x4 0x3 0x3 0x1c9 0x0 0x0 0x0 0x1363a296 0x5800a0 0x8000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0xfc000 0xfc000 0x0 0xfc000 0xfc000 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0xfc000 0xfc000 0xfc000 0xfc000 0xfc00 0xfc00 0xfc00 0xfc00 0x200 0x0 0x100100 0x130b018 0x0 0x0 0x77ffc000 0x303 0x81f1f008 0x7070000 0x3f 0x15ddddd 0x51451400 0x514514 0x514514 0x51451400 0x3f 0x0 0x0 0x64000 0x19 0x440011 0x440011 0x0 0x3 0xf3f3 0x80000309 0xa 0x1 0x8000001e 0x1 0x1 0x2 0x0 0x3 0x1 0x2 0x7 0x2 0x1 0x4 0x5 0x5040102 0x90402 0x73830403 0x70000f03 0x1f0000>;
  3346. nvidia,emc-burst-up-down-regs = <0x1 0x21 0xff00ff 0xff00ff 0xff00b0 0xff00ff 0xff00ec 0xff00ff 0xff00ec 0xe90049 0xff0080 0xff0004 0xff0004 0x800ff 0xff 0xff0004 0xff00ff 0xff00a3 0xff0024 0xff00ff 0xff 0xef 0xff00ff 0xef 0xff00ff 0xff00ff 0xee00ef 0xff00ff 0xff00ff 0xff00ff 0xff00ff>;
  3347. nvidia,emc-zcal-cnt-long = <0x15>;
  3348. nvidia,emc-acal-interval = <0x1fffff>;
  3349. nvidia,emc-ctt-term_ctrl = <0x802>;
  3350. nvidia,emc-cfg = <0xf3200000>;
  3351. nvidia,emc-cfg-2 = <0x8c7>;
  3352. nvidia,emc-sel-dpd-ctrl = <0x4013c>;
  3353. nvidia,emc-cfg-dig-dll = <0x580068>;
  3354. nvidia,emc-bgbias-ctl0 = <0x8>;
  3355. nvidia,emc-auto-cal-config2 = <0x0>;
  3356. nvidia,emc-auto-cal-config3 = <0x0>;
  3357. nvidia,emc-auto-cal-config = <0xa1430000>;
  3358. nvidia,emc-mode-0 = <0x0>;
  3359. nvidia,emc-mode-1 = <0x10083>;
  3360. nvidia,emc-mode-2 = <0x20004>;
  3361. nvidia,emc-mode-4 = <0x800b0000>;
  3362. nvidia,emc-clock-latency-change = <0x29e0>;
  3363. };
  3364.  
  3365. emc-table@102000 {
  3366. compatible = "nvidia,tegra12-emc-table";
  3367. nvidia,revision = <0x19>;
  3368. nvidia,dvfs-version = "3_102000_02_V5.0.14_V1.1";
  3369. clock-frequency = <0x18e70>;
  3370. nvidia,emc-min-mv = <0x320>;
  3371. nvidia,gk20a-min-mv = <0x320>;
  3372. nvidia,source = "pllp_out0";
  3373. nvidia,src-sel-reg = <0x40000006>;
  3374. nvidia,burst-regs-num = <0xa5>;
  3375. nvidia,burst-up-down-regs-num = <0x1f>;
  3376. nvidia,emc-registers = <0x6 0x15 0x0 0x4 0x2 0x6 0x8 0x3 0xa 0x2 0x2 0x1 0x2 0x0 0x3 0x3 0x6 0x2 0x0 0x5 0x5 0x10000 0x3 0x0 0x0 0x0 0x0 0x4 0xc 0xd 0xf 0x182 0x0 0x60 0x2 0x2 0x2 0x0 0x1 0xc 0x17 0x17 0x3 0x3 0x3 0x6 0x4 0x3 0x3 0x2ae 0x0 0x0 0x0 0x1363a296 0x5800a0 0x8000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0xfc000 0xfc000 0x0 0xfc000 0xfc000 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0xfc000 0xfc000 0xfc000 0xfc000 0xfc00 0xfc00 0xfc00 0xfc00 0x200 0x0 0x100100 0x130b018 0x0 0x0 0x77ffc000 0x303 0x81f1f008 0x7070000 0x3f 0x15ddddd 0x51451400 0x514514 0x514514 0x51451400 0x3f 0x0 0x0 0x64000 0x25 0x660011 0x660011 0x0 0x3 0xf3f3 0x8000040b 0xa 0x8000001 0x80000026 0x1 0x1 0x3 0x1 0x3 0x1 0x2 0x7 0x2 0x1 0x4 0x5 0x5040102 0x90403 0x73430504 0x70000f03 0x1f0000>;
  3377. nvidia,emc-burst-up-down-regs = <0x1 0x31 0xff00da 0xff00da 0xff0075 0xff00ff 0xff009d 0xff00ff 0xff009d 0x9b0049 0xff0080 0xff0004 0xff0004 0x800ad 0xff 0xff0004 0xff00c6 0xff006d 0xff0024 0xff00d6 0xff 0x9f 0xff00ff 0x9f 0xff00ff 0xff00ff 0x9f00a0 0xff00ff 0xff00ff 0xff00ff 0xff00da>;
  3378. nvidia,emc-zcal-cnt-long = <0x15>;
  3379. nvidia,emc-acal-interval = <0x1fffff>;
  3380. nvidia,emc-ctt-term_ctrl = <0x802>;
  3381. nvidia,emc-cfg = <0xf3200000>;
  3382. nvidia,emc-cfg-2 = <0x8c7>;
  3383. nvidia,emc-sel-dpd-ctrl = <0x4013c>;
  3384. nvidia,emc-cfg-dig-dll = <0x580068>;
  3385. nvidia,emc-bgbias-ctl0 = <0x8>;
  3386. nvidia,emc-auto-cal-config2 = <0x0>;
  3387. nvidia,emc-auto-cal-config3 = <0x0>;
  3388. nvidia,emc-auto-cal-config = <0xa1430000>;
  3389. nvidia,emc-mode-0 = <0x0>;
  3390. nvidia,emc-mode-1 = <0x10083>;
  3391. nvidia,emc-mode-2 = <0x20004>;
  3392. nvidia,emc-mode-4 = <0x800b0000>;
  3393. nvidia,emc-clock-latency-change = <0x1aea>;
  3394. };
  3395.  
  3396. emc-table@204000 {
  3397. compatible = "nvidia,tegra12-emc-table";
  3398. nvidia,revision = <0x19>;
  3399. nvidia,dvfs-version = "3_204000_02_V5.0.14_V1.1";
  3400. clock-frequency = <0x31ce0>;
  3401. nvidia,emc-min-mv = <0x320>;
  3402. nvidia,gk20a-min-mv = <0x320>;
  3403. nvidia,source = "pllp_out0";
  3404. nvidia,src-sel-reg = <0x40000002>;
  3405. nvidia,burst-regs-num = <0xa5>;
  3406. nvidia,burst-up-down-regs-num = <0x1f>;
  3407. nvidia,emc-registers = <0xc 0x2a 0x0 0x8 0x3 0x7 0x8 0x3 0xa 0x3 0x3 0x2 0x3 0x0 0x2 0x2 0x5 0x3 0x0 0x3 0x7 0x10000 0x4 0x0 0x0 0x0 0x0 0x2 0xe 0xf 0x11 0x304 0x0 0xc1 0x2 0x2 0x3 0x0 0x1 0xc 0x2d 0x2d 0x3 0x4 0x3 0x9 0x5 0x3 0x3 0x55b 0x0 0x0 0x0 0x1363a296 0x5800a0 0x8000 0x80000 0x80000 0x80000 0x80000 0x80000 0x80000 0x80000 0x80000 0x80000 0x80000 0x80000 0x80000 0x80000 0x80000 0x80000 0x80000 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0xa8000 0xa8000 0x0 0xa8000 0xa8000 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x88000 0x88000 0x88000 0x88000 0x8c00 0x8800 0x8c00 0x8800 0x200 0x0 0x100100 0x130b018 0x0 0x0 0x77ffc000 0x303 0x81f1f008 0x7070000 0x3f 0x15ddddd 0x51451400 0x514514 0x514514 0x51451400 0x3f 0x0 0x0 0x64000 0x4a 0xcc0011 0xcc0011 0x0 0x4 0xd3b3 0x80000713 0xa 0x1000003 0x80000040 0x1 0x1 0x6 0x3 0x5 0x1 0x2 0x7 0x3 0x1 0x5 0x5 0x5050103 0xa0506 0x72e40a07 0x70000f03 0x1f0000>;
  3408. nvidia,emc-burst-up-down-regs = <0x1 0x62 0xff006d 0xff006d 0xff003c 0xff00af 0xff004f 0xff00af 0xff004f 0x4e0049 0xff0080 0xff0004 0xff0004 0x80057 0xff 0xff0004 0xff0063 0xff0036 0xff0024 0xff006b 0xff 0x50 0xff00ff 0x50 0xff00ff 0xd400ff 0x510050 0xff00ff 0xff00ff 0xff00c6 0xff006d>;
  3409. nvidia,emc-zcal-cnt-long = <0x17>;
  3410. nvidia,emc-acal-interval = <0x1fffff>;
  3411. nvidia,emc-ctt-term_ctrl = <0x802>;
  3412. nvidia,emc-cfg = <0xf3200000>;
  3413. nvidia,emc-cfg-2 = <0x8cf>;
  3414. nvidia,emc-sel-dpd-ctrl = <0x4013c>;
  3415. nvidia,emc-cfg-dig-dll = <0x580068>;
  3416. nvidia,emc-bgbias-ctl0 = <0x8>;
  3417. nvidia,emc-auto-cal-config2 = <0x0>;
  3418. nvidia,emc-auto-cal-config3 = <0x0>;
  3419. nvidia,emc-auto-cal-config = <0xa1430000>;
  3420. nvidia,emc-mode-0 = <0x0>;
  3421. nvidia,emc-mode-1 = <0x10083>;
  3422. nvidia,emc-mode-2 = <0x20004>;
  3423. nvidia,emc-mode-4 = <0x800b0000>;
  3424. nvidia,emc-clock-latency-change = <0xd5c>;
  3425. };
  3426.  
  3427. emc-table@300000 {
  3428. compatible = "nvidia,tegra12-emc-table";
  3429. nvidia,revision = <0x19>;
  3430. nvidia,dvfs-version = "3_300000_03_V5.0.14_V1.1";
  3431. clock-frequency = <0x493e0>;
  3432. nvidia,emc-min-mv = <0x334>;
  3433. nvidia,gk20a-min-mv = <0x334>;
  3434. nvidia,source = "pllc_out0";
  3435. nvidia,src-sel-reg = <0x20000002>;
  3436. nvidia,burst-regs-num = <0xa5>;
  3437. nvidia,burst-up-down-regs-num = <0x1f>;
  3438. nvidia,emc-registers = <0x11 0x3e 0x0 0xc 0x5 0x7 0x8 0x3 0xa 0x5 0x5 0x2 0x3 0x0 0x2 0x2 0x6 0x3 0x0 0x3 0x8 0x30000 0x4 0x0 0x0 0x0 0x0 0x2 0xf 0x12 0x14 0x46e 0x0 0x11b 0x2 0x2 0x5 0x0 0x1 0xc 0x42 0x42 0x3 0x5 0x3 0xd 0x7 0x3 0x3 0x7e0 0x0 0x0 0x0 0x1363a096 0x5800a0 0x8000 0x20000 0x20000 0x20000 0x20000 0x20000 0x20000 0x20000 0x20000 0x20000 0x20000 0x20000 0x20000 0x20000 0x20000 0x20000 0x20000 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x58000 0x58000 0x0 0x58000 0x58000 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x58000 0x58000 0x58000 0x58000 0x5c00 0x5800 0x5c00 0x5800 0x200 0x0 0x100100 0x1231239 0x0 0x0 0x77ffc000 0x303 0x81f1f008 0x7070000 0x3f 0x15ddddd 0x51451420 0x514514 0x514514 0x51451400 0x3f 0x0 0x0 0x64000 0x6c 0x12c0011 0x12c0011 0x0 0x4 0x52a3 0x800009ed 0xb 0x8000004 0x80000040 0x1 0x2 0x9 0x5 0x7 0x1 0x2 0x7 0x3 0x1 0x5 0x5 0x5050103 0xc0709 0x72c50e0a 0x70000f03 0x1f0000>;
  3439. nvidia,emc-burst-up-down-regs = <0x4 0x90 0xff004a 0xff004a 0xff003c 0xff0090 0xff0041 0xff0090 0xff0041 0x350049 0xff0080 0xff0004 0xff0004 0x8003b 0xff 0xff0004 0xff0043 0xff002d 0xff0024 0xff0049 0xff 0x36 0xff00ff 0x36 0xff00ff 0xd400ff 0x510036 0xff00ff 0xff00ff 0xff0087 0xff004a>;
  3440. nvidia,emc-zcal-cnt-long = <0x1f>;
  3441. nvidia,emc-acal-interval = <0x1fffff>;
  3442. nvidia,emc-ctt-term_ctrl = <0x802>;
  3443. nvidia,emc-cfg = <0xf3300000>;
  3444. nvidia,emc-cfg-2 = <0x8d7>;
  3445. nvidia,emc-sel-dpd-ctrl = <0x4013c>;
  3446. nvidia,emc-cfg-dig-dll = <0x580068>;
  3447. nvidia,emc-bgbias-ctl0 = <0x0>;
  3448. nvidia,emc-auto-cal-config2 = <0x0>;
  3449. nvidia,emc-auto-cal-config3 = <0x0>;
  3450. nvidia,emc-auto-cal-config = <0xa1430000>;
  3451. nvidia,emc-mode-0 = <0x0>;
  3452. nvidia,emc-mode-1 = <0x10083>;
  3453. nvidia,emc-mode-2 = <0x20004>;
  3454. nvidia,emc-mode-4 = <0x800b0000>;
  3455. nvidia,emc-clock-latency-change = <0xa78>;
  3456. };
  3457.  
  3458. emc-table@396000 {
  3459. compatible = "nvidia,tegra12-emc-table";
  3460. nvidia,revision = <0x19>;
  3461. nvidia,dvfs-version = "3_396000_03_V5.0.14_V1.1";
  3462. clock-frequency = <0x60ae0>;
  3463. nvidia,emc-min-mv = <0x352>;
  3464. nvidia,gk20a-min-mv = <0x352>;
  3465. nvidia,source = "pllm_out0";
  3466. nvidia,src-sel-reg = <0x2>;
  3467. nvidia,burst-regs-num = <0xa5>;
  3468. nvidia,burst-up-down-regs-num = <0x1f>;
  3469. nvidia,emc-registers = <0x17 0x53 0x0 0x10 0x7 0x8 0x8 0x3 0xa 0x7 0x7 0x3 0x3 0x0 0x2 0x2 0x6 0x3 0x0 0x2 0x9 0x30000 0x4 0x0 0x0 0x0 0x0 0x1 0x10 0x12 0x14 0x5d9 0x0 0x176 0x2 0x2 0x7 0x0 0x1 0xe 0x58 0x58 0x3 0x6 0x3 0x12 0x9 0x3 0x3 0xa66 0x0 0x0 0x0 0x1363a096 0x5800a0 0x8000 0x20000 0x20000 0x20000 0x20000 0x20000 0x20000 0x20000 0x20000 0x20000 0x20000 0x20000 0x20000 0x20000 0x20000 0x20000 0x20000 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x48000 0x48000 0x0 0x48000 0x48000 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x40000 0x40000 0x40000 0x40000 0x4000 0x4000 0x4000 0x4000 0x200 0x0 0x100100 0x1231239 0x0 0x0 0x77ffc000 0x303 0x81f1f008 0x7070000 0x3f 0x15ddddd 0x51451420 0x514514 0x514514 0x51451400 0x3f 0x0 0x0 0x64000 0x8f 0x18c0011 0x18c0011 0x0 0x4 0x52a3 0x80000cc7 0xb 0xf000005 0x80000040 0x2 0x3 0xc 0x7 0x9 0x1 0x2 0x7 0x3 0x1 0x5 0x5 0x5050103 0xe090c 0x72c6120d 0x70000f03 0x1f0000>;
  3470. nvidia,emc-burst-up-down-regs = <0xa 0xbe 0xff0038 0xff0038 0xff003c 0xff0090 0xff0041 0xff0090 0xff0041 0x280049 0xff0080 0xff0004 0xff0004 0x8002d 0xff 0xff0004 0xff0033 0xff0022 0xff0024 0xff0037 0xff 0x36 0xff00ff 0x36 0xff00ff 0xd400ff 0x510029 0xff00ff 0xff00ff 0xff0066 0xff0038>;
  3471. nvidia,emc-zcal-cnt-long = <0x28>;
  3472. nvidia,emc-acal-interval = <0x1fffff>;
  3473. nvidia,emc-ctt-term_ctrl = <0x802>;
  3474. nvidia,emc-cfg = <0xf3300000>;
  3475. nvidia,emc-cfg-2 = <0x897>;
  3476. nvidia,emc-sel-dpd-ctrl = <0x4001c>;
  3477. nvidia,emc-cfg-dig-dll = <0x580068>;
  3478. nvidia,emc-bgbias-ctl0 = <0x0>;
  3479. nvidia,emc-auto-cal-config2 = <0x0>;
  3480. nvidia,emc-auto-cal-config3 = <0x0>;
  3481. nvidia,emc-auto-cal-config = <0xa1430000>;
  3482. nvidia,emc-mode-0 = <0x0>;
  3483. nvidia,emc-mode-1 = <0x10083>;
  3484. nvidia,emc-mode-2 = <0x20004>;
  3485. nvidia,emc-mode-4 = <0x800b0000>;
  3486. nvidia,emc-clock-latency-change = <0x884>;
  3487. };
  3488.  
  3489. emc-table@528000 {
  3490. compatible = "nvidia,tegra12-emc-table";
  3491. nvidia,revision = <0x19>;
  3492. nvidia,dvfs-version = "3_528000_03_V5.0.14_V1.1";
  3493. clock-frequency = <0x80e80>;
  3494. nvidia,emc-min-mv = <0x370>;
  3495. nvidia,gk20a-min-mv = <0x366>;
  3496. nvidia,source = "pllm_ud";
  3497. nvidia,src-sel-reg = <0x80000000>;
  3498. nvidia,burst-regs-num = <0xa5>;
  3499. nvidia,burst-up-down-regs-num = <0x1f>;
  3500. nvidia,emc-registers = <0x1f 0x6e 0x0 0x16 0x9 0x9 0x9 0x3 0xd 0x9 0x9 0x5 0x4 0x0 0x2 0x2 0x7 0x4 0x0 0x2 0xb 0x40000 0x5 0x0 0x0 0x0 0x0 0x1 0x12 0x15 0x17 0x7cd 0x0 0x1f3 0x3 0x3 0x9 0x0 0x1 0x11 0x75 0x75 0x4 0x8 0x4 0x19 0xc 0x3 0x3 0xddd 0x0 0x0 0x0 0x1363a096 0xe01200b9 0x8000 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x400e 0x400e 0x0 0x4010 0x4010 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x1 0x1 0x0 0x0 0x0 0x0 0x1 0x0 0x1 0x1 0x0 0x0 0x0 0x0 0x1 0x0 0xc 0xc 0xc 0xc 0xd 0xc 0xd 0xc 0x220 0x0 0x100100 0x123123d 0x0 0x0 0x77ffc004 0x303 0x81f1f008 0x7070000 0x3f 0x15ddddd 0x51451420 0x514514 0x514514 0x51451400 0x3f 0x0 0x0 0x64000 0xbf 0x2100013 0x2100013 0x0 0x5 0x42a0 0x800010b3 0xd 0xf000007 0x80000040 0x3 0x4 0x10 0xa 0xd 0x2 0x2 0x9 0x3 0x1 0x6 0x6 0x6060103 0x120b10 0x72c81811 0x70000f03 0x1f0000>;
  3501. nvidia,emc-burst-up-down-regs = <0xd 0xfd 0xc10038 0xc10038 0xc1003c 0xc10090 0xc10041 0xc10090 0xc10041 0x270049 0xc10080 0xc10004 0xc10004 0x80021 0xc1 0xc10004 0xc10026 0xc1001a 0xc10024 0xc10029 0xc1 0x36 0xc100c1 0x36 0xc100c1 0xd400ff 0x510029 0xc100c1 0xc100c1 0xc10065 0xc1002a>;
  3502. nvidia,emc-zcal-cnt-long = <0x34>;
  3503. nvidia,emc-acal-interval = <0x1fffff>;
  3504. nvidia,emc-ctt-term_ctrl = <0x802>;
  3505. nvidia,emc-cfg = <0xf3300000>;
  3506. nvidia,emc-cfg-2 = <0x89f>;
  3507. nvidia,emc-sel-dpd-ctrl = <0x4001c>;
  3508. nvidia,emc-cfg-dig-dll = <0xe0120069>;
  3509. nvidia,emc-bgbias-ctl0 = <0x0>;
  3510. nvidia,emc-auto-cal-config2 = <0x0>;
  3511. nvidia,emc-auto-cal-config3 = <0x0>;
  3512. nvidia,emc-auto-cal-config = <0xa1430000>;
  3513. nvidia,emc-mode-0 = <0x0>;
  3514. nvidia,emc-mode-1 = <0x100c3>;
  3515. nvidia,emc-mode-2 = <0x20006>;
  3516. nvidia,emc-mode-4 = <0x800b0000>;
  3517. nvidia,emc-clock-latency-change = <0x5a0>;
  3518. };
  3519.  
  3520. emc-table@600000 {
  3521. compatible = "nvidia,tegra12-emc-table";
  3522. nvidia,revision = <0x19>;
  3523. nvidia,dvfs-version = "3_600000_02_V5.0.14_V1.1";
  3524. clock-frequency = <0x927c0>;
  3525. nvidia,emc-min-mv = <0x38e>;
  3526. nvidia,gk20a-min-mv = <0x38e>;
  3527. nvidia,source = "pllc_ud";
  3528. nvidia,src-sel-reg = <0xe0000000>;
  3529. nvidia,burst-regs-num = <0xa5>;
  3530. nvidia,burst-up-down-regs-num = <0x1f>;
  3531. nvidia,emc-registers = <0x23 0x7d 0x0 0x19 0xa 0xa 0xb 0x4 0xf 0xa 0xa 0x5 0x4 0x0 0x4 0x4 0xa 0x4 0x0 0x3 0xd 0x70000 0x5 0x0 0x0 0x0 0x0 0x2 0x14 0x18 0x1a 0x8e4 0x0 0x239 0x4 0x4 0xa 0x0 0x1 0x13 0x84 0x84 0x5 0x9 0x5 0x1c 0xd 0x3 0x3 0xfc0 0x0 0x0 0x0 0x1363a096 0xe00e00b9 0x8000 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0xe 0xe 0x0 0x10 0x10 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x3 0x3 0x2 0x2 0x2 0x1 0x3 0x1 0x3 0x3 0x2 0x2 0x2 0x1 0x3 0x1 0xb 0xb 0xb 0xb 0xc 0xb 0xc 0xb 0x220 0x0 0x100100 0x121103d 0x0 0x0 0x77ffc004 0x303 0x81f1f008 0x7070000 0x3f 0x15ddddd 0x51451420 0x514514 0x514514 0x51451400 0x3f 0x0 0x0 0x64000 0xd8 0x2580014 0x2580014 0x0 0x5 0x40a0 0x800012d6 0x10 0x9 0x80000040 0x4 0x5 0x12 0xb 0xe 0x2 0x3 0xa 0x3 0x1 0x6 0x7 0x7060103 0x140d12 0x72c91b13 0x70000f03 0x1f0000>;
  3532. nvidia,emc-burst-up-down-regs = <0xf 0x120 0xaa0038 0xaa0038 0xaa003c 0xaa0090 0xaa0041 0xaa0090 0xaa0041 0x270049 0xaa0080 0xaa0004 0xaa0004 0x8001d 0xaa 0xaa0004 0xaa0022 0xaa0018 0xaa0024 0xaa0024 0xaa 0x36 0xaa00aa 0x36 0xaa00aa 0xd400ff 0x510029 0xaa00aa 0xaa00aa 0xaa0065 0xaa0025>;
  3533. nvidia,emc-zcal-cnt-long = <0x3a>;
  3534. nvidia,emc-acal-interval = <0x1fffff>;
  3535. nvidia,emc-ctt-term_ctrl = <0x802>;
  3536. nvidia,emc-cfg = <0xf3300000>;
  3537. nvidia,emc-cfg-2 = <0x89f>;
  3538. nvidia,emc-sel-dpd-ctrl = <0x4001c>;
  3539. nvidia,emc-cfg-dig-dll = <0xe00e0069>;
  3540. nvidia,emc-bgbias-ctl0 = <0x0>;
  3541. nvidia,emc-auto-cal-config2 = <0x0>;
  3542. nvidia,emc-auto-cal-config3 = <0x0>;
  3543. nvidia,emc-auto-cal-config = <0xa1430000>;
  3544. nvidia,emc-mode-0 = <0x0>;
  3545. nvidia,emc-mode-1 = <0x100e3>;
  3546. nvidia,emc-mode-2 = <0x20007>;
  3547. nvidia,emc-mode-4 = <0x800b0000>;
  3548. nvidia,emc-clock-latency-change = <0x5a0>;
  3549. };
  3550.  
  3551. emc-table@792000 {
  3552. compatible = "nvidia,tegra12-emc-table";
  3553. nvidia,revision = <0x19>;
  3554. nvidia,dvfs-version = "3_792000_01_V5.0.14_V1.1";
  3555. clock-frequency = <0xc15c0>;
  3556. nvidia,emc-min-mv = <0x3d4>;
  3557. nvidia,gk20a-min-mv = <0x3d4>;
  3558. nvidia,source = "pllm_ud";
  3559. nvidia,src-sel-reg = <0x80000000>;
  3560. nvidia,burst-regs-num = <0xa5>;
  3561. nvidia,burst-up-down-regs-num = <0x1f>;
  3562. nvidia,emc-registers = <0x2f 0xa6 0x0 0x21 0xe 0xd 0xd 0x5 0x13 0xe 0xe 0x7 0x5 0x0 0x5 0x5 0xd 0x5 0x0 0x4 0x10 0xa0000 0x7 0x0 0x0 0x0 0x0 0x3 0x17 0x1d 0x1f 0xbd1 0x0 0x2f4 0x5 0x5 0xe 0x0 0x1 0x17 0xaf 0xaf 0x6 0xc 0x6 0x26 0x11 0x3 0x3 0x14cb 0x0 0x0 0x0 0x1363a096 0xe00700b9 0x8000 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x400d 0x400d 0x0 0x4010 0x4010 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x7 0x7 0x6 0x6 0x6 0x5 0x6 0x5 0x7 0x7 0x6 0x6 0x6 0x5 0x6 0x5 0xa 0xa 0xa 0xa 0xb 0xa 0xb 0xa 0x220 0x0 0x100100 0x120103d 0x0 0x0 0x77ffc004 0x303 0x81f1f008 0x7070000 0x0 0x15ddddd 0x61861820 0x514514 0x514514 0x61861800 0x3f 0x0 0x0 0x64000 0x11e 0x3180017 0x3180017 0x0 0x7 0x4080 0x8000188b 0x14 0xe00000b 0x80000040 0x6 0x7 0x18 0xf 0x13 0x3 0x3 0xc 0x4 0x1 0x8 0x8 0x8080104 0x1a1118 0x72ac2419 0x70000f02 0x1f0000>;
  3563. nvidia,emc-burst-up-down-regs = <0x13 0x17c 0x810038 0x810038 0x81003c 0x810090 0x810041 0x810090 0x810041 0x270049 0x810080 0x810004 0x810004 0x80016 0x81 0x810004 0x810019 0x810018 0x810024 0x81001c 0x81 0x36 0x810081 0x36 0x810081 0xd400ff 0x510029 0x810081 0x810081 0x810065 0x81001c>;
  3564. nvidia,emc-zcal-cnt-long = <0x4c>;
  3565. nvidia,emc-acal-interval = <0x1fffff>;
  3566. nvidia,emc-ctt-term_ctrl = <0x802>;
  3567. nvidia,emc-cfg = <0xf3300000>;
  3568. nvidia,emc-cfg-2 = <0x89f>;
  3569. nvidia,emc-sel-dpd-ctrl = <0x4001c>;
  3570. nvidia,emc-cfg-dig-dll = <0xe0070069>;
  3571. nvidia,emc-bgbias-ctl0 = <0x0>;
  3572. nvidia,emc-auto-cal-config2 = <0x0>;
  3573. nvidia,emc-auto-cal-config3 = <0x0>;
  3574. nvidia,emc-auto-cal-config = <0xa1430000>;
  3575. nvidia,emc-mode-0 = <0x0>;
  3576. nvidia,emc-mode-1 = <0x10043>;
  3577. nvidia,emc-mode-2 = <0x2001a>;
  3578. nvidia,emc-mode-4 = <0x800b0000>;
  3579. nvidia,emc-clock-latency-change = <0x4b0>;
  3580. };
  3581.  
  3582. emc-table@924000 {
  3583. compatible = "nvidia,tegra12-emc-table";
  3584. nvidia,revision = <0x19>;
  3585. nvidia,dvfs-version = "3_924000_01_V5.0.14_V1.1";
  3586. clock-frequency = <0xe1960>;
  3587. nvidia,emc-min-mv = <0x3f2>;
  3588. nvidia,gk20a-min-mv = <0x3f2>;
  3589. nvidia,source = "pllm_ud";
  3590. nvidia,src-sel-reg = <0x80000000>;
  3591. nvidia,burst-regs-num = <0xa5>;
  3592. nvidia,burst-up-down-regs-num = <0x1f>;
  3593. nvidia,emc-registers = <0x37 0xc2 0x0 0x26 0x10 0xf 0x10 0x6 0x17 0x10 0x10 0x9 0x5 0x0 0x7 0x7 0x10 0x5 0x0 0x5 0x12 0xd0000 0x7 0x0 0x0 0x0 0x0 0x4 0x19 0x20 0x22 0xdd4 0x0 0x375 0x6 0x6 0x10 0x0 0x1 0x1b 0xcc 0xcc 0x7 0xe 0x7 0x2d 0x14 0x3 0x3 0x1842 0x0 0x0 0x0 0x1363a896 0xe00400b9 0x8000 0x4 0x4 0x4 0x4 0x4 0x4 0x4 0x4 0x4 0x4 0x4 0x4 0x4 0x4 0x4 0x4 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x400d 0x400d 0x0 0x11 0x11 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x4 0x4 0x4 0x4 0x4 0x4 0x4 0x4 0x4 0x4 0x4 0x4 0x4 0x4 0x4 0x4 0x9 0x9 0x9 0x9 0xa 0x9 0xa 0x9 0x220 0x0 0x100100 0x120103d 0x0 0x0 0x77ffc004 0x303 0x81f1f008 0x7070000 0x0 0x15ddddd 0x5d75d720 0x514514 0x514514 0x5d75d700 0x3f 0x0 0x0 0x64000 0x14d 0x39c0019 0x39c0019 0x0 0x7 0x4080 0x80001c77 0x17 0xe00000d 0x80000040 0x7 0x8 0x1b 0x12 0x17 0x4 0x4 0xe 0x4 0x1 0x9 0x9 0x9090104 0x1e141b 0x72ae2a1c 0x70000f02 0x1f0000>;
  3594. nvidia,emc-burst-up-down-regs = <0x17 0x1bb 0x6e0038 0x6e0038 0x6e003c 0x6e0090 0x6e0041 0x6e0090 0x6e0041 0x270049 0x6e0080 0x6e0004 0x6e0004 0x80016 0x6e 0x6e0004 0x6e0019 0x6e0018 0x6e0024 0x6e001b 0x6e 0x36 0x6e006e 0x36 0x6e006e 0xd400ff 0x510029 0x6e006e 0x6e006e 0x6e0065 0x6e001c>;
  3595. nvidia,emc-zcal-cnt-long = <0x58>;
  3596. nvidia,emc-acal-interval = <0x1fffff>;
  3597. nvidia,emc-ctt-term_ctrl = <0x802>;
  3598. nvidia,emc-cfg = <0xf3300000>;
  3599. nvidia,emc-cfg-2 = <0x89f>;
  3600. nvidia,emc-sel-dpd-ctrl = <0x4001c>;
  3601. nvidia,emc-cfg-dig-dll = <0xe0040069>;
  3602. nvidia,emc-bgbias-ctl0 = <0x0>;
  3603. nvidia,emc-auto-cal-config2 = <0x0>;
  3604. nvidia,emc-auto-cal-config3 = <0x0>;
  3605. nvidia,emc-auto-cal-config = <0xa1430000>;
  3606. nvidia,emc-mode-0 = <0x0>;
  3607. nvidia,emc-mode-1 = <0x10083>;
  3608. nvidia,emc-mode-2 = <0x2001c>;
  3609. nvidia,emc-mode-4 = <0x800b0000>;
  3610. nvidia,emc-clock-latency-change = <0x49c>;
  3611. };
  3612.  
  3613. emc-table-derated@12750 {
  3614. compatible = "nvidia,tegra12-emc-table-derated";
  3615. nvidia,revision = <0x19>;
  3616. nvidia,dvfs-version = "01_12750_01_V5.0.14_V1.1";
  3617. clock-frequency = <0x31ce>;
  3618. nvidia,emc-min-mv = <0x320>;
  3619. nvidia,gk20a-min-mv = <0x320>;
  3620. nvidia,source = "pllp_out0";
  3621. nvidia,src-sel-reg = <0x4000003e>;
  3622. nvidia,burst-regs-num = <0xa5>;
  3623. nvidia,burst-up-down-regs-num = <0x1f>;
  3624. nvidia,emc-registers = <0x0 0x3 0x0 0x2 0x2 0x6 0x8 0x3 0xa 0x2 0x2 0x1 0x2 0x0 0x3 0x3 0x6 0x2 0x0 0x5 0x5 0x10000 0x3 0x0 0x0 0x0 0x0 0x4 0xc 0xd 0xf 0xb 0x0 0x2 0x2 0x2 0x2 0x0 0x1 0xc 0x3 0x3 0x3 0x3 0x3 0x6 0x4 0x3 0x3 0x56 0x0 0x0 0x0 0x1363a296 0x5800a0 0x8000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0xfc000 0xfc000 0x0 0xfc000 0xfc000 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0xfc000 0xfc000 0xfc000 0xfc000 0xfc00 0xfc00 0xfc00 0xfc00 0x200 0x0 0x100100 0x130b018 0x0 0x0 0x77ffc000 0x303 0x81f1f008 0x7070000 0x3f 0x15ddddd 0x51451400 0x514514 0x514514 0x51451400 0x3f 0x0 0x0 0x64000 0x11 0xd0011 0xd0011 0x0 0x3 0xf3f3 0x8000011c 0xa 0x40040001 0x8000000a 0x1 0x1 0x2 0x0 0x3 0x1 0x2 0x7 0x2 0x1 0x4 0x5 0x5040102 0x90402 0x77c30303 0x70000f03 0x1f0000>;
  3625. nvidia,emc-burst-up-down-regs = <0x1 0x7 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff0049 0xff0080 0xff0004 0xff0004 0x800ff 0xff 0xff0004 0xff00ff 0xff00ff 0xff0024 0xff00ff 0xff 0xff 0xff00ff 0xff 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff00ff>;
  3626. nvidia,emc-zcal-cnt-long = <0x15>;
  3627. nvidia,emc-acal-interval = <0x1fffff>;
  3628. nvidia,emc-ctt-term_ctrl = <0x802>;
  3629. nvidia,emc-cfg = <0xf3200000>;
  3630. nvidia,emc-cfg-2 = <0x8c7>;
  3631. nvidia,emc-sel-dpd-ctrl = <0x4013c>;
  3632. nvidia,emc-cfg-dig-dll = <0x580068>;
  3633. nvidia,emc-bgbias-ctl0 = <0x8>;
  3634. nvidia,emc-auto-cal-config2 = <0x0>;
  3635. nvidia,emc-auto-cal-config3 = <0x0>;
  3636. nvidia,emc-auto-cal-config = <0xa1430000>;
  3637. nvidia,emc-mode-0 = <0x0>;
  3638. nvidia,emc-mode-1 = <0x10083>;
  3639. nvidia,emc-mode-2 = <0x20004>;
  3640. nvidia,emc-mode-4 = <0x800b0000>;
  3641. nvidia,emc-clock-latency-change = <0xe1dc>;
  3642. };
  3643.  
  3644. emc-table-derated@20400 {
  3645. compatible = "nvidia,tegra12-emc-table-derated";
  3646. nvidia,revision = <0x19>;
  3647. nvidia,dvfs-version = "01_20400_01_V5.0.14_V1.1";
  3648. clock-frequency = <0x4fb0>;
  3649. nvidia,emc-min-mv = <0x320>;
  3650. nvidia,gk20a-min-mv = <0x320>;
  3651. nvidia,source = "pllp_out0";
  3652. nvidia,src-sel-reg = <0x40000026>;
  3653. nvidia,burst-regs-num = <0xa5>;
  3654. nvidia,burst-up-down-regs-num = <0x1f>;
  3655. nvidia,emc-registers = <0x1 0x4 0x0 0x2 0x2 0x6 0x8 0x3 0xa 0x2 0x2 0x1 0x2 0x0 0x3 0x3 0x6 0x2 0x0 0x5 0x5 0x10000 0x3 0x0 0x0 0x0 0x0 0x4 0xc 0xd 0xf 0x13 0x0 0x4 0x2 0x2 0x2 0x0 0x1 0xc 0x5 0x5 0x3 0x3 0x3 0x6 0x4 0x3 0x3 0x8a 0x0 0x0 0x0 0x1363a296 0x5800a0 0x8000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0xfc000 0xfc000 0x0 0xfc000 0xfc000 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0xfc000 0xfc000 0xfc000 0xfc000 0xfc00 0xfc00 0xfc00 0xfc00 0x200 0x0 0x100100 0x130b018 0x0 0x0 0x77ffc000 0x303 0x81f1f008 0x7070000 0x3f 0x15ddddd 0x51451400 0x514514 0x514514 0x51451400 0x3f 0x0 0x0 0x64000 0x11 0x150011 0x150011 0x0 0x3 0xf3f3 0x8000012a 0xa 0x40020001 0x80000012 0x1 0x1 0x2 0x0 0x3 0x1 0x2 0x7 0x2 0x1 0x4 0x5 0x5040102 0x90402 0x75a30303 0x70000f03 0x1f0000>;
  3656. nvidia,emc-burst-up-down-regs = <0x1 0xa 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff0049 0xff0080 0xff0004 0xff0004 0x800ff 0xff 0xff0004 0xff00ff 0xff00ff 0xff0024 0xff00ff 0xff 0xff 0xff00ff 0xff 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff00ff>;
  3657. nvidia,emc-zcal-cnt-long = <0x15>;
  3658. nvidia,emc-acal-interval = <0x1fffff>;
  3659. nvidia,emc-ctt-term_ctrl = <0x802>;
  3660. nvidia,emc-cfg = <0xf3200000>;
  3661. nvidia,emc-cfg-2 = <0x8c7>;
  3662. nvidia,emc-sel-dpd-ctrl = <0x4013c>;
  3663. nvidia,emc-cfg-dig-dll = <0x580068>;
  3664. nvidia,emc-bgbias-ctl0 = <0x8>;
  3665. nvidia,emc-auto-cal-config2 = <0x0>;
  3666. nvidia,emc-auto-cal-config3 = <0x0>;
  3667. nvidia,emc-auto-cal-config = <0xa1430000>;
  3668. nvidia,emc-mode-0 = <0x0>;
  3669. nvidia,emc-mode-1 = <0x10083>;
  3670. nvidia,emc-mode-2 = <0x20004>;
  3671. nvidia,emc-mode-4 = <0x800b0000>;
  3672. nvidia,emc-clock-latency-change = <0x8b1a>;
  3673. };
  3674.  
  3675. emc-table-derated@40800 {
  3676. compatible = "nvidia,tegra12-emc-table-derated";
  3677. nvidia,revision = <0x19>;
  3678. nvidia,dvfs-version = "01_40800_01_V5.0.14_V1.1";
  3679. clock-frequency = <0x9f60>;
  3680. nvidia,emc-min-mv = <0x320>;
  3681. nvidia,gk20a-min-mv = <0x320>;
  3682. nvidia,source = "pllp_out0";
  3683. nvidia,src-sel-reg = <0x40000012>;
  3684. nvidia,burst-regs-num = <0xa5>;
  3685. nvidia,burst-up-down-regs-num = <0x1f>;
  3686. nvidia,emc-registers = <0x2 0x8 0x0 0x2 0x2 0x6 0x8 0x3 0xa 0x2 0x2 0x1 0x2 0x0 0x3 0x3 0x6 0x2 0x0 0x5 0x5 0x10000 0x3 0x0 0x0 0x0 0x0 0x4 0xc 0xd 0xf 0x26 0x0 0x9 0x2 0x2 0x2 0x0 0x1 0xc 0x9 0x9 0x3 0x3 0x3 0x6 0x4 0x3 0x3 0x113 0x0 0x0 0x0 0x1363a296 0x5800a0 0x8000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0xfc000 0xfc000 0x0 0xfc000 0xfc000 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0xfc000 0xfc000 0xfc000 0xfc000 0xfc00 0xfc00 0xfc00 0xfc00 0x200 0x0 0x100100 0x130b018 0x0 0x0 0x77ffc000 0x303 0x81f1f008 0x7070000 0x3f 0x15ddddd 0x51451400 0x514514 0x514514 0x51451400 0x3f 0x0 0x0 0x64000 0x11 0x290011 0x290011 0x0 0x3 0xf3f3 0x80000151 0xa 0xa0000001 0x80000017 0x1 0x1 0x2 0x0 0x3 0x1 0x2 0x7 0x2 0x1 0x4 0x5 0x5040102 0x90402 0x74030303 0x70000f03 0x1f0000>;
  3687. nvidia,emc-burst-up-down-regs = <0x1 0x14 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff0049 0xff0080 0xff0004 0xff0004 0x800ff 0xff 0xff0004 0xff00ff 0xff00ff 0xff0024 0xff00ff 0xff 0xff 0xff00ff 0xff 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff00ff 0xff00ff>;
  3688. nvidia,emc-zcal-cnt-long = <0x15>;
  3689. nvidia,emc-acal-interval = <0x1fffff>;
  3690. nvidia,emc-ctt-term_ctrl = <0x802>;
  3691. nvidia,emc-cfg = <0xf3200000>;
  3692. nvidia,emc-cfg-2 = <0x8c7>;
  3693. nvidia,emc-sel-dpd-ctrl = <0x4013c>;
  3694. nvidia,emc-cfg-dig-dll = <0x580068>;
  3695. nvidia,emc-bgbias-ctl0 = <0x8>;
  3696. nvidia,emc-auto-cal-config2 = <0x0>;
  3697. nvidia,emc-auto-cal-config3 = <0x0>;
  3698. nvidia,emc-auto-cal-config = <0xa1430000>;
  3699. nvidia,emc-mode-0 = <0x0>;
  3700. nvidia,emc-mode-1 = <0x10083>;
  3701. nvidia,emc-mode-2 = <0x20004>;
  3702. nvidia,emc-mode-4 = <0x800b0000>;
  3703. nvidia,emc-clock-latency-change = <0x5172>;
  3704. };
  3705.  
  3706. emc-table-derated@68000 {
  3707. compatible = "nvidia,tegra12-emc-table-derated";
  3708. nvidia,revision = <0x19>;
  3709. nvidia,dvfs-version = "01_68000_01_V5.0.14_V1.1";
  3710. clock-frequency = <0x109a0>;
  3711. nvidia,emc-min-mv = <0x320>;
  3712. nvidia,gk20a-min-mv = <0x320>;
  3713. nvidia,source = "pllp_out0";
  3714. nvidia,src-sel-reg = <0x4000000a>;
  3715. nvidia,burst-regs-num = <0xa5>;
  3716. nvidia,burst-up-down-regs-num = <0x1f>;
  3717. nvidia,emc-registers = <0x4 0xe 0x0 0x2 0x2 0x6 0x8 0x3 0xa 0x2 0x2 0x1 0x2 0x0 0x3 0x3 0x6 0x2 0x0 0x5 0x5 0x10000 0x3 0x0 0x0 0x0 0x0 0x4 0xc 0xd 0xf 0x40 0x0 0x10 0x2 0x2 0x2 0x0 0x1 0xc 0xf 0xf 0x3 0x3 0x3 0x6 0x4 0x3 0x3 0x1c9 0x0 0x0 0x0 0x1363a296 0x5800a0 0x8000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0xfc000 0xfc000 0x0 0xfc000 0xfc000 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0xfc000 0xfc000 0xfc000 0xfc000 0xfc00 0xfc00 0xfc00 0xfc00 0x200 0x0 0x100100 0x130b018 0x0 0x0 0x77ffc000 0x303 0x81f1f008 0x7070000 0x3f 0x15ddddd 0x51451400 0x514514 0x514514 0x51451400 0x3f 0x0 0x0 0x64000 0x19 0x440011 0x440011 0x0 0x3 0xf3f3 0x80000185 0xa 0x1 0x8000001e 0x1 0x1 0x2 0x0 0x3 0x1 0x2 0x7 0x2 0x1 0x4 0x5 0x5040102 0x90402 0x73830403 0x70000f03 0x1f0000>;
  3718. nvidia,emc-burst-up-down-regs = <0x1 0x21 0xff00ff 0xff00ff 0xff00b0 0xff00ff 0xff00ec 0xff00ff 0xff00ec 0xe90049 0xff0080 0xff0004 0xff0004 0x800ff 0xff 0xff0004 0xff00ff 0xff00a3 0xff0024 0xff00ff 0xff 0xef 0xff00ff 0xef 0xff00ff 0xff00ff 0xee00ef 0xff00ff 0xff00ff 0xff00ff 0xff00ff>;
  3719. nvidia,emc-zcal-cnt-long = <0x15>;
  3720. nvidia,emc-acal-interval = <0x1fffff>;
  3721. nvidia,emc-ctt-term_ctrl = <0x802>;
  3722. nvidia,emc-cfg = <0xf3200000>;
  3723. nvidia,emc-cfg-2 = <0x8c7>;
  3724. nvidia,emc-sel-dpd-ctrl = <0x4013c>;
  3725. nvidia,emc-cfg-dig-dll = <0x580068>;
  3726. nvidia,emc-bgbias-ctl0 = <0x8>;
  3727. nvidia,emc-auto-cal-config2 = <0x0>;
  3728. nvidia,emc-auto-cal-config3 = <0x0>;
  3729. nvidia,emc-auto-cal-config = <0xa1430000>;
  3730. nvidia,emc-mode-0 = <0x0>;
  3731. nvidia,emc-mode-1 = <0x10083>;
  3732. nvidia,emc-mode-2 = <0x20004>;
  3733. nvidia,emc-mode-4 = <0x800b0000>;
  3734. nvidia,emc-clock-latency-change = <0x29e0>;
  3735. };
  3736.  
  3737. emc-table-derated@102000 {
  3738. compatible = "nvidia,tegra12-emc-table-derated";
  3739. nvidia,revision = <0x19>;
  3740. nvidia,dvfs-version = "01_102000_01_V5.0.14_V1.1";
  3741. clock-frequency = <0x18e70>;
  3742. nvidia,emc-min-mv = <0x320>;
  3743. nvidia,gk20a-min-mv = <0x320>;
  3744. nvidia,source = "pllp_out0";
  3745. nvidia,src-sel-reg = <0x40000006>;
  3746. nvidia,burst-regs-num = <0xa5>;
  3747. nvidia,burst-up-down-regs-num = <0x1f>;
  3748. nvidia,emc-registers = <0x6 0x15 0x0 0x4 0x2 0x6 0x8 0x3 0xa 0x2 0x2 0x1 0x2 0x0 0x3 0x3 0x6 0x2 0x0 0x5 0x5 0x10000 0x3 0x0 0x0 0x0 0x0 0x4 0xc 0xd 0xf 0x60 0x0 0x18 0x2 0x2 0x2 0x0 0x1 0xc 0x17 0x17 0x3 0x3 0x3 0x6 0x4 0x3 0x3 0x2ae 0x0 0x0 0x0 0x1363a296 0x5800a0 0x8000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x48000 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0xfc000 0xfc000 0x0 0xfc000 0xfc000 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0xfc000 0xfc000 0xfc000 0xfc000 0xfc00 0xfc00 0xfc00 0xfc00 0x200 0x0 0x100100 0x130b018 0x0 0x0 0x77ffc000 0x303 0x81f1f008 0x7070000 0x3f 0x15ddddd 0x51451400 0x514514 0x514514 0x51451400 0x3f 0x0 0x0 0x64000 0x25 0x660011 0x660011 0x0 0x3 0xf3f3 0x800001c5 0xa 0x8000001 0x80000026 0x1 0x1 0x3 0x1 0x3 0x1 0x2 0x7 0x2 0x1 0x4 0x5 0x5040102 0x90403 0x73430504 0x70000f03 0x1f0000>;
  3749. nvidia,emc-burst-up-down-regs = <0x1 0x31 0xff00da 0xff00da 0xff0075 0xff00ff 0xff009d 0xff00ff 0xff009d 0x9b0049 0xff0080 0xff0004 0xff0004 0x800ad 0xff 0xff0004 0xff00c6 0xff006d 0xff0024 0xff00d6 0xff 0x9f 0xff00ff 0x9f 0xff00ff 0xff00ff 0x9f00a0 0xff00ff 0xff00ff 0xff00ff 0xff00da>;
  3750. nvidia,emc-zcal-cnt-long = <0x15>;
  3751. nvidia,emc-acal-interval = <0x1fffff>;
  3752. nvidia,emc-ctt-term_ctrl = <0x802>;
  3753. nvidia,emc-cfg = <0xf3200000>;
  3754. nvidia,emc-cfg-2 = <0x8c7>;
  3755. nvidia,emc-sel-dpd-ctrl = <0x4013c>;
  3756. nvidia,emc-cfg-dig-dll = <0x580068>;
  3757. nvidia,emc-bgbias-ctl0 = <0x8>;
  3758. nvidia,emc-auto-cal-config2 = <0x0>;
  3759. nvidia,emc-auto-cal-config3 = <0x0>;
  3760. nvidia,emc-auto-cal-config = <0xa1430000>;
  3761. nvidia,emc-mode-0 = <0x0>;
  3762. nvidia,emc-mode-1 = <0x10083>;
  3763. nvidia,emc-mode-2 = <0x20004>;
  3764. nvidia,emc-mode-4 = <0x800b0000>;
  3765. nvidia,emc-clock-latency-change = <0x1aea>;
  3766. };
  3767.  
  3768. emc-table-derated@204000 {
  3769. compatible = "nvidia,tegra12-emc-table-derated";
  3770. nvidia,revision = <0x19>;
  3771. nvidia,dvfs-version = "01_204000_01_V5.0.14_V1.1";
  3772. clock-frequency = <0x31ce0>;
  3773. nvidia,emc-min-mv = <0x320>;
  3774. nvidia,gk20a-min-mv = <0x320>;
  3775. nvidia,source = "pllp_out0";
  3776. nvidia,src-sel-reg = <0x40000002>;
  3777. nvidia,burst-regs-num = <0xa5>;
  3778. nvidia,burst-up-down-regs-num = <0x1f>;
  3779. nvidia,emc-registers = <0xc 0x2a 0x0 0x8 0x4 0x7 0x8 0x3 0xa 0x4 0x4 0x2 0x3 0x0 0x2 0x2 0x5 0x3 0x0 0x3 0x7 0x10000 0x4 0x0 0x0 0x0 0x0 0x2 0xe 0xf 0x11 0xc1 0x0 0x30 0x2 0x2 0x4 0x0 0x1 0xc 0x2d 0x2d 0x3 0x4 0x3 0x9 0x5 0x3 0x3 0x55b 0x0 0x0 0x0 0x1363a296 0x5800a0 0x8000 0x80000 0x80000 0x80000 0x80000 0x80000 0x80000 0x80000 0x80000 0x80000 0x80000 0x80000 0x80000 0x80000 0x80000 0x80000 0x80000 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0xa8000 0xa8000 0x0 0xa8000 0xa8000 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x88000 0x88000 0x88000 0x88000 0x8c00 0x8800 0x8c00 0x8800 0x200 0x0 0x100100 0x130b018 0x0 0x0 0x77ffc000 0x303 0x81f1f008 0x7070000 0x3f 0x15ddddd 0x51451400 0x514514 0x514514 0x51451400 0x3f 0x0 0x0 0x64000 0x4a 0xcc0011 0xcc0011 0x0 0x4 0xd3b3 0x80000287 0xa 0x1000003 0x80000040 0x1 0x2 0x6 0x3 0x5 0x1 0x2 0x7 0x3 0x1 0x5 0x5 0x5050103 0xb0606 0x72e40a07 0x70000f03 0x1f0000>;
  3780. nvidia,emc-burst-up-down-regs = <0x1 0x62 0xff006d 0xff006d 0xff003c 0xff00af 0xff004f 0xff00af 0xff004f 0x4e0049 0xff0080 0xff0004 0xff0004 0x80057 0xff 0xff0004 0xff0063 0xff0036 0xff0024 0xff006b 0xff 0x50 0xff00ff 0x50 0xff00ff 0xd400ff 0x510050 0xff00ff 0xff00ff 0xff00c6 0xff006d>;
  3781. nvidia,emc-zcal-cnt-long = <0x17>;
  3782. nvidia,emc-acal-interval = <0x1fffff>;
  3783. nvidia,emc-ctt-term_ctrl = <0x802>;
  3784. nvidia,emc-cfg = <0xf3200000>;
  3785. nvidia,emc-cfg-2 = <0x8cf>;
  3786. nvidia,emc-sel-dpd-ctrl = <0x4013c>;
  3787. nvidia,emc-cfg-dig-dll = <0x580068>;
  3788. nvidia,emc-bgbias-ctl0 = <0x8>;
  3789. nvidia,emc-auto-cal-config2 = <0x0>;
  3790. nvidia,emc-auto-cal-config3 = <0x0>;
  3791. nvidia,emc-auto-cal-config = <0xa1430000>;
  3792. nvidia,emc-mode-0 = <0x0>;
  3793. nvidia,emc-mode-1 = <0x10083>;
  3794. nvidia,emc-mode-2 = <0x20004>;
  3795. nvidia,emc-mode-4 = <0x800b0000>;
  3796. nvidia,emc-clock-latency-change = <0xd5c>;
  3797. };
  3798.  
  3799. emc-table-derated@300000 {
  3800. compatible = "nvidia,tegra12-emc-table-derated";
  3801. nvidia,revision = <0x19>;
  3802. nvidia,dvfs-version = "01_300000_01_V5.0.14_V1.1";
  3803. clock-frequency = <0x493e0>;
  3804. nvidia,emc-min-mv = <0x334>;
  3805. nvidia,gk20a-min-mv = <0x334>;
  3806. nvidia,source = "pllc_out0";
  3807. nvidia,src-sel-reg = <0x20000002>;
  3808. nvidia,burst-regs-num = <0xa5>;
  3809. nvidia,burst-up-down-regs-num = <0x1f>;
  3810. nvidia,emc-registers = <0x12 0x3e 0x0 0xd 0x5 0x7 0x8 0x3 0xa 0x5 0x5 0x3 0x3 0x0 0x2 0x2 0x6 0x3 0x0 0x3 0x8 0x30000 0x4 0x0 0x0 0x0 0x0 0x2 0xf 0x12 0x14 0x11b 0x0 0x46 0x2 0x2 0x5 0x0 0x1 0xc 0x42 0x42 0x3 0x5 0x3 0xd 0x7 0x3 0x3 0x7e0 0x0 0x0 0x0 0x1363a096 0x5800a0 0x8000 0x20000 0x20000 0x20000 0x20000 0x20000 0x20000 0x20000 0x20000 0x20000 0x20000 0x20000 0x20000 0x20000 0x20000 0x20000 0x20000 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x58000 0x58000 0x0 0x58000 0x58000 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x58000 0x58000 0x58000 0x58000 0x5c00 0x5800 0x5c00 0x5800 0x200 0x0 0x100100 0x1231239 0x0 0x0 0x77ffc000 0x303 0x81f1f008 0x7070000 0x3f 0x15ddddd 0x51451420 0x514514 0x514514 0x51451400 0x3f 0x0 0x0 0x64000 0x6c 0x12c0011 0x12c0011 0x0 0x4 0x52a3 0x8000033e 0xb 0x8000004 0x80000040 0x1 0x2 0x9 0x5 0x7 0x1 0x2 0x7 0x3 0x1 0x5 0x5 0x5050103 0xc0709 0x72c50e0a 0x70000f03 0x1f0000>;
  3811. nvidia,emc-burst-up-down-regs = <0x4 0x90 0xff004a 0xff004a 0xff003c 0xff0090 0xff0041 0xff0090 0xff0041 0x350049 0xff0080 0xff0004 0xff0004 0x8003b 0xff 0xff0004 0xff0043 0xff002d 0xff0024 0xff0049 0xff 0x36 0xff00ff 0x36 0xff00ff 0xd400ff 0x510036 0xff00ff 0xff00ff 0xff0087 0xff004a>;
  3812. nvidia,emc-zcal-cnt-long = <0x1f>;
  3813. nvidia,emc-acal-interval = <0x1fffff>;
  3814. nvidia,emc-ctt-term_ctrl = <0x802>;
  3815. nvidia,emc-cfg = <0xf3300000>;
  3816. nvidia,emc-cfg-2 = <0x8d7>;
  3817. nvidia,emc-sel-dpd-ctrl = <0x4013c>;
  3818. nvidia,emc-cfg-dig-dll = <0x580068>;
  3819. nvidia,emc-bgbias-ctl0 = <0x0>;
  3820. nvidia,emc-auto-cal-config2 = <0x0>;
  3821. nvidia,emc-auto-cal-config3 = <0x0>;
  3822. nvidia,emc-auto-cal-config = <0xa1430000>;
  3823. nvidia,emc-mode-0 = <0x0>;
  3824. nvidia,emc-mode-1 = <0x10083>;
  3825. nvidia,emc-mode-2 = <0x20004>;
  3826. nvidia,emc-mode-4 = <0x800b0000>;
  3827. nvidia,emc-clock-latency-change = <0xa78>;
  3828. };
  3829.  
  3830. emc-table-derated@396000 {
  3831. compatible = "nvidia,tegra12-emc-table-derated";
  3832. nvidia,revision = <0x19>;
  3833. nvidia,dvfs-version = "01_396000_01_V5.0.14_V1.1";
  3834. clock-frequency = <0x60ae0>;
  3835. nvidia,emc-min-mv = <0x352>;
  3836. nvidia,gk20a-min-mv = <0x352>;
  3837. nvidia,source = "pllm_out0";
  3838. nvidia,src-sel-reg = <0x2>;
  3839. nvidia,burst-regs-num = <0xa5>;
  3840. nvidia,burst-up-down-regs-num = <0x1f>;
  3841. nvidia,emc-registers = <0x18 0x53 0x0 0x11 0x7 0x8 0x8 0x3 0xa 0x7 0x7 0x4 0x3 0x0 0x2 0x2 0x6 0x3 0x0 0x2 0x9 0x30000 0x4 0x0 0x0 0x0 0x0 0x1 0x10 0x12 0x14 0x176 0x0 0x5d 0x2 0x2 0x7 0x0 0x1 0xe 0x58 0x58 0x3 0x6 0x3 0x12 0xa 0x3 0x3 0xa66 0x0 0x0 0x0 0x1363a096 0x5800a0 0x8000 0x20000 0x20000 0x20000 0x20000 0x20000 0x20000 0x20000 0x20000 0x20000 0x20000 0x20000 0x20000 0x20000 0x20000 0x20000 0x20000 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x48000 0x48000 0x0 0x48000 0x48000 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x40000 0x40000 0x40000 0x40000 0x4000 0x4000 0x4000 0x4000 0x200 0x0 0x100100 0x1231239 0x0 0x0 0x77ffc000 0x303 0x81f1f008 0x7070000 0x3f 0x15ddddd 0x51451420 0x514514 0x514514 0x51451400 0x3f 0x0 0x0 0x64000 0x8f 0x18c0011 0x18c0011 0x0 0x4 0x52a3 0x800003f4 0xb 0xf000005 0x80000040 0x2 0x3 0xc 0x7 0x9 0x2 0x2 0x7 0x3 0x1 0x5 0x5 0x5050103 0xe090c 0x72c6120d 0x70000f03 0x1f0000>;
  3842. nvidia,emc-burst-up-down-regs = <0xa 0xbe 0xff0038 0xff0038 0xff003c 0xff0090 0xff0041 0xff0090 0xff0041 0x280049 0xff0080 0xff0004 0xff0004 0x8002d 0xff 0xff0004 0xff0033 0xff0022 0xff0024 0xff0037 0xff 0x36 0xff00ff 0x36 0xff00ff 0xd400ff 0x510029 0xff00ff 0xff00ff 0xff0066 0xff0038>;
  3843. nvidia,emc-zcal-cnt-long = <0x28>;
  3844. nvidia,emc-acal-interval = <0x1fffff>;
  3845. nvidia,emc-ctt-term_ctrl = <0x802>;
  3846. nvidia,emc-cfg = <0xf3300000>;
  3847. nvidia,emc-cfg-2 = <0x897>;
  3848. nvidia,emc-sel-dpd-ctrl = <0x4001c>;
  3849. nvidia,emc-cfg-dig-dll = <0x580068>;
  3850. nvidia,emc-bgbias-ctl0 = <0x0>;
  3851. nvidia,emc-auto-cal-config2 = <0x0>;
  3852. nvidia,emc-auto-cal-config3 = <0x0>;
  3853. nvidia,emc-auto-cal-config = <0xa1430000>;
  3854. nvidia,emc-mode-0 = <0x0>;
  3855. nvidia,emc-mode-1 = <0x10083>;
  3856. nvidia,emc-mode-2 = <0x20004>;
  3857. nvidia,emc-mode-4 = <0x800b0000>;
  3858. nvidia,emc-clock-latency-change = <0x884>;
  3859. };
  3860.  
  3861. emc-table-derated@528000 {
  3862. compatible = "nvidia,tegra12-emc-table-derated";
  3863. nvidia,revision = <0x19>;
  3864. nvidia,dvfs-version = "01_528000_01_V5.0.14_V1.1";
  3865. clock-frequency = <0x80e80>;
  3866. nvidia,emc-min-mv = <0x370>;
  3867. nvidia,gk20a-min-mv = <0x366>;
  3868. nvidia,source = "pllm_ud";
  3869. nvidia,src-sel-reg = <0x80000000>;
  3870. nvidia,burst-regs-num = <0xa5>;
  3871. nvidia,burst-up-down-regs-num = <0x1f>;
  3872. nvidia,emc-registers = <0x20 0x6e 0x0 0x17 0xa 0xa 0x9 0x3 0xd 0xa 0xa 0x6 0x4 0x0 0x2 0x2 0x7 0x4 0x0 0x2 0xb 0x40000 0x5 0x0 0x0 0x0 0x0 0x1 0x12 0x15 0x17 0x1f3 0x0 0x7c 0x3 0x3 0xa 0x0 0x1 0x11 0x75 0x75 0x4 0x8 0x4 0x19 0xd 0x3 0x3 0xddd 0x0 0x0 0x0 0x1363a096 0xe01200b9 0x8000 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x400e 0x400e 0x0 0x4010 0x4010 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x1 0x1 0x0 0x0 0x0 0x0 0x1 0x0 0x1 0x1 0x0 0x0 0x0 0x0 0x1 0x0 0xc 0xc 0xc 0xc 0xd 0xc 0xd 0xc 0x220 0x0 0x100100 0x123123d 0x0 0x0 0x77ffc004 0x303 0x81f1f008 0x7070000 0x3f 0x15ddddd 0x51451420 0x514514 0x514514 0x51451400 0x3f 0x0 0x0 0x64000 0xbf 0x2100013 0x2100013 0x0 0x5 0x42a0 0x800004ef 0xd 0xf000007 0x80000040 0x4 0x5 0x11 0xa 0xd 0x3 0x2 0x9 0x3 0x1 0x6 0x6 0x6060103 0x130c11 0x72c81812 0x70000f03 0x1f0000>;
  3873. nvidia,emc-burst-up-down-regs = <0xd 0xfd 0xc10038 0xc10038 0xc1003c 0xc10090 0xc10041 0xc10090 0xc10041 0x270049 0xc10080 0xc10004 0xc10004 0x80021 0xc1 0xc10004 0xc10026 0xc1001a 0xc10024 0xc10029 0xc1 0x36 0xc100c1 0x36 0xc100c1 0xd400ff 0x510029 0xc100c1 0xc100c1 0xc10065 0xc1002a>;
  3874. nvidia,emc-zcal-cnt-long = <0x34>;
  3875. nvidia,emc-acal-interval = <0x1fffff>;
  3876. nvidia,emc-ctt-term_ctrl = <0x802>;
  3877. nvidia,emc-cfg = <0xf3300000>;
  3878. nvidia,emc-cfg-2 = <0x89f>;
  3879. nvidia,emc-sel-dpd-ctrl = <0x4001c>;
  3880. nvidia,emc-cfg-dig-dll = <0xe0120069>;
  3881. nvidia,emc-bgbias-ctl0 = <0x0>;
  3882. nvidia,emc-auto-cal-config2 = <0x0>;
  3883. nvidia,emc-auto-cal-config3 = <0x0>;
  3884. nvidia,emc-auto-cal-config = <0xa1430000>;
  3885. nvidia,emc-mode-0 = <0x0>;
  3886. nvidia,emc-mode-1 = <0x100c3>;
  3887. nvidia,emc-mode-2 = <0x20006>;
  3888. nvidia,emc-mode-4 = <0x800b0000>;
  3889. nvidia,emc-clock-latency-change = <0x5a0>;
  3890. };
  3891.  
  3892. emc-table-derated@600000 {
  3893. compatible = "nvidia,tegra12-emc-table-derated";
  3894. nvidia,revision = <0x19>;
  3895. nvidia,dvfs-version = "01_600000_01_V5.0.14_V1.1";
  3896. clock-frequency = <0x927c0>;
  3897. nvidia,emc-min-mv = <0x38e>;
  3898. nvidia,gk20a-min-mv = <0x38e>;
  3899. nvidia,source = "pllc_ud";
  3900. nvidia,src-sel-reg = <0xe0000000>;
  3901. nvidia,burst-regs-num = <0xa5>;
  3902. nvidia,burst-up-down-regs-num = <0x1f>;
  3903. nvidia,emc-registers = <0x25 0x7d 0x0 0x1a 0xb 0xa 0xb 0x4 0xf 0xb 0xb 0x7 0x4 0x0 0x4 0x4 0xa 0x4 0x0 0x3 0xd 0x70000 0x5 0x0 0x0 0x0 0x0 0x2 0x14 0x18 0x1a 0x237 0x0 0x8d 0x4 0x4 0xb 0x0 0x1 0x13 0x84 0x84 0x5 0x9 0x5 0x1c 0xe 0x3 0x3 0xfc0 0x0 0x0 0x0 0x1363a096 0xe00e00b9 0x8000 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0xe 0xe 0x0 0x10 0x10 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x3 0x3 0x2 0x2 0x2 0x1 0x3 0x1 0x3 0x3 0x2 0x2 0x2 0x1 0x3 0x1 0xb 0xb 0xb 0xb 0xc 0xb 0xc 0xb 0x220 0x0 0x100100 0x121103d 0x0 0x0 0x77ffc004 0x303 0x81f1f008 0x7070000 0x3f 0x15ddddd 0x51451420 0x514514 0x514514 0x51451400 0x3f 0x0 0x0 0x64000 0xd8 0x2580014 0x2580014 0x0 0x5 0x40a0 0x80000578 0x10 0x9 0x80000040 0x4 0x5 0x13 0xc 0xe 0x3 0x3 0xa 0x3 0x1 0x6 0x7 0x7060103 0x150e13 0x72a91b14 0x70000f03 0x1f0000>;
  3904. nvidia,emc-burst-up-down-regs = <0xf 0x120 0xaa0038 0xaa0038 0xaa003c 0xaa0090 0xaa0041 0xaa0090 0xaa0041 0x270049 0xaa0080 0xaa0004 0xaa0004 0x8001d 0xaa 0xaa0004 0xaa0022 0xaa0018 0xaa0024 0xaa0024 0xaa 0x36 0xaa00aa 0x36 0xaa00aa 0xd400ff 0x510029 0xaa00aa 0xaa00aa 0xaa0065 0xaa0025>;
  3905. nvidia,emc-zcal-cnt-long = <0x3a>;
  3906. nvidia,emc-acal-interval = <0x1fffff>;
  3907. nvidia,emc-ctt-term_ctrl = <0x802>;
  3908. nvidia,emc-cfg = <0xf3300000>;
  3909. nvidia,emc-cfg-2 = <0x89f>;
  3910. nvidia,emc-sel-dpd-ctrl = <0x4001c>;
  3911. nvidia,emc-cfg-dig-dll = <0xe00e0069>;
  3912. nvidia,emc-bgbias-ctl0 = <0x0>;
  3913. nvidia,emc-auto-cal-config2 = <0x0>;
  3914. nvidia,emc-auto-cal-config3 = <0x0>;
  3915. nvidia,emc-auto-cal-config = <0xa1430000>;
  3916. nvidia,emc-mode-0 = <0x0>;
  3917. nvidia,emc-mode-1 = <0x100e3>;
  3918. nvidia,emc-mode-2 = <0x20007>;
  3919. nvidia,emc-mode-4 = <0x800b0000>;
  3920. nvidia,emc-clock-latency-change = <0x5a0>;
  3921. };
  3922.  
  3923. emc-table-derated@792000 {
  3924. compatible = "nvidia,tegra12-emc-table-derated";
  3925. nvidia,revision = <0x19>;
  3926. nvidia,dvfs-version = "01_792000_01_V5.0.14_V1.1";
  3927. clock-frequency = <0xc15c0>;
  3928. nvidia,emc-min-mv = <0x3d4>;
  3929. nvidia,gk20a-min-mv = <0x3d4>;
  3930. nvidia,source = "pllm_ud";
  3931. nvidia,src-sel-reg = <0x80000000>;
  3932. nvidia,burst-regs-num = <0xa5>;
  3933. nvidia,burst-up-down-regs-num = <0x1f>;
  3934. nvidia,emc-registers = <0x30 0xa6 0x0 0x22 0xf 0xd 0xd 0x5 0x13 0xf 0xf 0x9 0x5 0x0 0x5 0x5 0xd 0x5 0x0 0x4 0x10 0xa0000 0x7 0x0 0x0 0x0 0x0 0x3 0x17 0x1d 0x1f 0x2ec 0x0 0xbb 0x5 0x5 0xf 0x0 0x1 0x17 0xaf 0xaf 0x6 0xc 0x6 0x26 0x13 0x3 0x3 0x14cb 0x0 0x0 0x0 0x1363a096 0xe00700b9 0x8000 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x400d 0x400d 0x0 0x4010 0x4010 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x7 0x7 0x6 0x6 0x6 0x5 0x6 0x5 0x7 0x7 0x6 0x6 0x6 0x5 0x6 0x5 0xa 0xa 0xa 0xa 0xb 0xa 0xb 0xa 0x220 0x0 0x100100 0x120103d 0x0 0x0 0x77ffc004 0x303 0x81f1f008 0x7070000 0x0 0x15ddddd 0x61861820 0x514514 0x514514 0x61861800 0x3f 0x0 0x0 0x64000 0x11e 0x3180017 0x3180017 0x0 0x7 0x4080 0x800006e5 0x14 0xe00000b 0x80000040 0x6 0x7 0x19 0x10 0x13 0x4 0x3 0xc 0x4 0x1 0x8 0x8 0x8080104 0x1b1219 0x72ac241a 0x70000f02 0x1f0000>;
  3935. nvidia,emc-burst-up-down-regs = <0x13 0x17c 0x810038 0x810038 0x81003c 0x810090 0x810041 0x810090 0x810041 0x270049 0x810080 0x810004 0x810004 0x80016 0x81 0x810004 0x810019 0x810018 0x810024 0x81001c 0x81 0x36 0x810081 0x36 0x810081 0xd400ff 0x510029 0x810081 0x810081 0x810065 0x81001c>;
  3936. nvidia,emc-zcal-cnt-long = <0x4c>;
  3937. nvidia,emc-acal-interval = <0x1fffff>;
  3938. nvidia,emc-ctt-term_ctrl = <0x802>;
  3939. nvidia,emc-cfg = <0xf3300000>;
  3940. nvidia,emc-cfg-2 = <0x89f>;
  3941. nvidia,emc-sel-dpd-ctrl = <0x4001c>;
  3942. nvidia,emc-cfg-dig-dll = <0xe0070069>;
  3943. nvidia,emc-bgbias-ctl0 = <0x0>;
  3944. nvidia,emc-auto-cal-config2 = <0x0>;
  3945. nvidia,emc-auto-cal-config3 = <0x0>;
  3946. nvidia,emc-auto-cal-config = <0xa1430000>;
  3947. nvidia,emc-mode-0 = <0x0>;
  3948. nvidia,emc-mode-1 = <0x10043>;
  3949. nvidia,emc-mode-2 = <0x2001a>;
  3950. nvidia,emc-mode-4 = <0x800b0000>;
  3951. nvidia,emc-clock-latency-change = <0x4b0>;
  3952. };
  3953.  
  3954. emc-table-derated@924000 {
  3955. compatible = "nvidia,tegra12-emc-table-derated";
  3956. nvidia,revision = <0x19>;
  3957. nvidia,dvfs-version = "01_924000_01_V5.0.14_V1.1";
  3958. clock-frequency = <0xe1960>;
  3959. nvidia,emc-min-mv = <0x3f2>;
  3960. nvidia,gk20a-min-mv = <0x3f2>;
  3961. nvidia,source = "pllm_ud";
  3962. nvidia,src-sel-reg = <0x80000000>;
  3963. nvidia,burst-regs-num = <0xa5>;
  3964. nvidia,burst-up-down-regs-num = <0x1f>;
  3965. nvidia,emc-registers = <0x39 0xc2 0x0 0x28 0x12 0xf 0x10 0x6 0x17 0x12 0x12 0xa 0x5 0x0 0x7 0x7 0x10 0x5 0x0 0x5 0x12 0xd0000 0x7 0x0 0x0 0x0 0x0 0x4 0x19 0x20 0x22 0x369 0x0 0xda 0x6 0x6 0x12 0x0 0x1 0x1b 0xcc 0xcc 0x7 0xe 0x7 0x2d 0x16 0x3 0x3 0x1842 0x0 0x0 0x0 0x1363a896 0xe00400b9 0x8000 0x4 0x4 0x4 0x4 0x4 0x4 0x4 0x4 0x4 0x4 0x4 0x4 0x4 0x4 0x4 0x4 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x400d 0x400d 0x0 0x11 0x11 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x4 0x4 0x4 0x4 0x4 0x4 0x4 0x4 0x4 0x4 0x4 0x4 0x4 0x4 0x4 0x4 0x9 0x9 0x9 0x9 0xa 0x9 0xa 0x9 0x220 0x0 0x100100 0x120103d 0x0 0x0 0x77ffc004 0x303 0x81f1f008 0x7070000 0x0 0x15ddddd 0x5d75d720 0x514514 0x514514 0x5d75d700 0x3f 0x0 0x0 0x64000 0x14d 0x39c0019 0x39c0019 0x0 0x7 0x4080 0x800007e0 0x17 0xe00000d 0x80000040 0x8 0x9 0x1d 0x13 0x17 0x5 0x4 0xe 0x4 0x1 0x9 0x9 0x9090104 0x20161d 0x72ae2a1e 0x70000f02 0x1f0000>;
  3966. nvidia,emc-burst-up-down-regs = <0x17 0x1bb 0x6e0038 0x6e0038 0x6e003c 0x6e0090 0x6e0041 0x6e0090 0x6e0041 0x270049 0x6e0080 0x6e0004 0x6e0004 0x80016 0x6e 0x6e0004 0x6e0019 0x6e0018 0x6e0024 0x6e001b 0x6e 0x36 0x6e006e 0x36 0x6e006e 0xd400ff 0x510029 0x6e006e 0x6e006e 0x6e0065 0x6e001c>;
  3967. nvidia,emc-zcal-cnt-long = <0x58>;
  3968. nvidia,emc-acal-interval = <0x1fffff>;
  3969. nvidia,emc-ctt-term_ctrl = <0x802>;
  3970. nvidia,emc-cfg = <0xf3300000>;
  3971. nvidia,emc-cfg-2 = <0x89f>;
  3972. nvidia,emc-sel-dpd-ctrl = <0x4001c>;
  3973. nvidia,emc-cfg-dig-dll = <0xe0040069>;
  3974. nvidia,emc-bgbias-ctl0 = <0x0>;
  3975. nvidia,emc-auto-cal-config2 = <0x0>;
  3976. nvidia,emc-auto-cal-config3 = <0x0>;
  3977. nvidia,emc-auto-cal-config = <0xa1430000>;
  3978. nvidia,emc-mode-0 = <0x0>;
  3979. nvidia,emc-mode-1 = <0x10083>;
  3980. nvidia,emc-mode-2 = <0x2001c>;
  3981. nvidia,emc-mode-4 = <0x800b0000>;
  3982. nvidia,emc-clock-latency-change = <0x49c>;
  3983. };
  3984. };
  3985.  
  3986. regulators {
  3987. compatible = "simple-bus";
  3988. #address-cells = <0x1>;
  3989. #size-cells = <0x0>;
  3990.  
  3991. regulator@0 {
  3992. compatible = "regulator-fixed";
  3993. reg = <0x0>;
  3994. regulator-name = "vdd_ac_bat";
  3995. regulator-min-microvolt = <0x4c4b40>;
  3996. regulator-max-microvolt = <0x4c4b40>;
  3997. regulator-always-on;
  3998.  
  3999. consumers {
  4000.  
  4001. c1 {
  4002. regulator-consumer-supply = "vdd_sys_bl";
  4003. };
  4004. };
  4005. };
  4006.  
  4007. regulator@1 {
  4008. compatible = "regulator-fixed-sync";
  4009. reg = <0x1>;
  4010. regulator-name = "usb0-vbus";
  4011. regulator-min-microvolt = <0x4c4b40>;
  4012. regulator-max-microvolt = <0x4c4b40>;
  4013. gpio = <0x7 0x6c 0x0>;
  4014. enable-active-high;
  4015. gpio-open-drain;
  4016.  
  4017. consumers {
  4018.  
  4019. c1 {
  4020. regulator-consumer-supply = "usb_vbus0";
  4021. regulator-consumer-device = "tegra-xhci";
  4022. };
  4023. };
  4024. };
  4025.  
  4026. regulator@2 {
  4027. compatible = "regulator-fixed-sync";
  4028. reg = <0x2>;
  4029. regulator-name = "usb1-vbus";
  4030. regulator-min-microvolt = <0x4c4b40>;
  4031. regulator-max-microvolt = <0x4c4b40>;
  4032. enable-active-high;
  4033. gpio = <0x7 0x6d 0x0>;
  4034. gpio-open-drain;
  4035. vin-supply = <0xb>;
  4036.  
  4037. consumers {
  4038.  
  4039. c1 {
  4040. regulator-consumer-supply = "usb_vbus";
  4041. regulator-consumer-device = "tegra-ehci.1";
  4042. };
  4043.  
  4044. c2 {
  4045. regulator-consumer-supply = "usb_vbus1";
  4046. regulator-consumer-device = "tegra-xhci";
  4047. };
  4048. };
  4049. };
  4050.  
  4051. regulator@3 {
  4052. compatible = "regulator-fixed-sync";
  4053. reg = <0x3>;
  4054. regulator-name = "usb2-vbus";
  4055. regulator-min-microvolt = <0x4c4b40>;
  4056. regulator-max-microvolt = <0x4c4b40>;
  4057. enable-active-high;
  4058. gpio = <0x7 0xf9 0x0>;
  4059. gpio-open-drain;
  4060. vin-supply = <0xb>;
  4061.  
  4062. consumers {
  4063.  
  4064. c1 {
  4065. regulator-consumer-supply = "usb_vbus";
  4066. regulator-consumer-device = "tegra-ehci.2";
  4067. };
  4068.  
  4069. c2 {
  4070. regulator-consumer-supply = "usb_vbus2";
  4071. regulator-consumer-device = "tegra-xhci";
  4072. };
  4073. };
  4074. };
  4075.  
  4076. regulator@41 {
  4077. compatible = "regulator-fixed-sync";
  4078. reg = <0x29>;
  4079. regulator-name = "avdd-lcd-vsp";
  4080. regulator-min-microvolt = <0x53ec60>;
  4081. regulator-max-microvolt = <0x53ec60>;
  4082. regulator-boot-on;
  4083. gpio = <0x7 0x44 0x0>;
  4084. enable-active-high;
  4085.  
  4086. consumers {
  4087.  
  4088. c1 {
  4089. regulator-consumer-supply = "avdd_lcd";
  4090. };
  4091. };
  4092. };
  4093.  
  4094. regulator@42 {
  4095. compatible = "regulator-fixed-sync";
  4096. reg = <0x2a>;
  4097. regulator-name = "avdd-lcd-vsn";
  4098. regulator-min-microvolt = <0x53ec60>;
  4099. regulator-max-microvolt = <0x53ec60>;
  4100. regulator-boot-on;
  4101. gpio = <0x7 0x92 0x0>;
  4102. enable-active-high;
  4103.  
  4104. consumers {
  4105.  
  4106. c1 {
  4107. regulator-consumer-supply = "bvdd_lcd";
  4108. };
  4109. };
  4110. };
  4111.  
  4112. regulator@5 {
  4113. compatible = "regulator-fixed-sync";
  4114. reg = <0x5>;
  4115. regulator-name = "vdd-lcd";
  4116. regulator-min-microvolt = <0x124f80>;
  4117. regulator-max-microvolt = <0x124f80>;
  4118. enable-active-high;
  4119. gpio = <0x10 0x4 0x0>;
  4120. vin-supply = <0xc>;
  4121.  
  4122. consumers {
  4123.  
  4124. c1 {
  4125. regulator-consumer-supply = "vdd_lcd_1v2_s";
  4126. };
  4127. };
  4128. };
  4129.  
  4130. regulator@6 {
  4131. compatible = "regulator-fixed-sync";
  4132. reg = <0x6>;
  4133. regulator-name = "ldoen";
  4134. regulator-min-microvolt = <0x124f80>;
  4135. regulator-max-microvolt = <0x124f80>;
  4136. enable-active-high;
  4137. gpio = <0x10 0x6 0x0>;
  4138. vin-supply = <0xc>;
  4139.  
  4140. consumers {
  4141.  
  4142. c1 {
  4143. regulator-consumer-supply = "ldoen";
  4144. regulator-consumer-device = "tegra-snd-rt5639";
  4145. };
  4146. };
  4147. };
  4148.  
  4149. regulator@8 {
  4150. compatible = "regulator-fixed-sync";
  4151. reg = <0x8>;
  4152. regulator-name = "en-lcd-bl";
  4153. regulator-min-microvolt = <0x4c4b40>;
  4154. regulator-max-microvolt = <0x4c4b40>;
  4155. enable-active-high;
  4156. gpio = <0x7 0x3a 0x0>;
  4157.  
  4158. consumers {
  4159.  
  4160. c1 {
  4161. regulator-consumer-supply = "vdd_lcd_bl_en";
  4162. };
  4163. };
  4164. };
  4165.  
  4166. regulator@9 {
  4167. compatible = "regulator-fixed-sync";
  4168. reg = <0x9>;
  4169. regulator-name = "vdd-hdmi";
  4170. regulator-min-microvolt = <0x4c4b40>;
  4171. regulator-max-microvolt = <0x4c4b40>;
  4172. enable-active-high;
  4173. gpio = <0x7 0x56 0x0>;
  4174. vin-supply = <0x11>;
  4175.  
  4176. consumers {
  4177.  
  4178. c1 {
  4179. regulator-consumer-supply = "vdd_hdmi_5v0";
  4180. regulator-consumer-device = "tegradc.1";
  4181. };
  4182. };
  4183. };
  4184.  
  4185. regulator@10 {
  4186. compatible = "regulator-fixed-sync";
  4187. reg = <0xa>;
  4188. regulator-name = "vdd-cam-1v8";
  4189. regulator-min-microvolt = <0x1b7740>;
  4190. regulator-max-microvolt = <0x1b7740>;
  4191. enable-active-high;
  4192. gpio = <0x10 0x1 0x0>;
  4193. vin-supply = <0xc>;
  4194.  
  4195. consumers {
  4196.  
  4197. c1 {
  4198. regulator-consumer-supply = "vdd_cam_1v8";
  4199. };
  4200. };
  4201. };
  4202.  
  4203. regulator@11 {
  4204. compatible = "regulator-fixed-sync";
  4205. reg = <0xb>;
  4206. regulator-name = "vdd-cam-1v2";
  4207. regulator-min-microvolt = <0x124f80>;
  4208. regulator-max-microvolt = <0x124f80>;
  4209. enable-active-high;
  4210. gpio = <0x10 0x2 0x0>;
  4211. vin-supply = <0xc>;
  4212.  
  4213. consumers {
  4214.  
  4215. c1 {
  4216. regulator-consumer-supply = "vdd_cam_1v2";
  4217. };
  4218. };
  4219. };
  4220. };
  4221.  
  4222. gpio-keys {
  4223. compatible = "gpio-keys";
  4224.  
  4225. power {
  4226. label = "Power";
  4227. gpios = <0x7 0x80 0x1>;
  4228. linux,code = <0x74>;
  4229. gpio-key,wakeup;
  4230. };
  4231.  
  4232. volume_down {
  4233. label = "Volume Down";
  4234. gpios = <0x7 0x87 0x1>;
  4235. linux,code = <0x72>;
  4236. };
  4237.  
  4238. volume_up {
  4239. label = "Volume Up";
  4240. gpios = <0x7 0x86 0x1>;
  4241. linux,code = <0x73>;
  4242. };
  4243.  
  4244. hall_intr1 {
  4245. label = "lid_back";
  4246. gpios = <0x7 0xb3 0x1>;
  4247. linux,code = <0x12>;
  4248. linux,input-type = <0x5>;
  4249. gpio-key,wakeup;
  4250. };
  4251.  
  4252. hall_intr2 {
  4253. label = "lid_front";
  4254. gpios = <0x7 0x45 0x1>;
  4255. linux,code = <0x0>;
  4256. linux,input-type = <0x5>;
  4257. gpio-key,wakeup;
  4258. };
  4259. };
  4260.  
  4261. sysedp_batmon_calc {
  4262. compatible = "nvidia,tegra124-sysedp_batmon_calc";
  4263. ocv_lut = <0x64 0x426030 0x50 0x3f9d28 0x32 0x3c68d8 0x14 0x3a6d08 0xa 0x390d78 0x5 0x36b3e8 0x0 0x33e140>;
  4264. ibat_lut = <0x258 0x2328 0xfffffda8 0x2328 0xfffffd44 0x0>;
  4265. rbat_data = <0x186a0 0x186a0 0x186a0 0x186a0 0x186a0 0x186a0>;
  4266. temp_axis = <0xe6>;
  4267. capacity_axis = <0x64 0x50 0x3c 0x28 0x14 0x0>;
  4268. power_supply = "battery";
  4269. r_const = <0x4e20>;
  4270. vsys_min = <0x2c4020>;
  4271. };
  4272.  
  4273. pwmleds {
  4274. compatible = "pwm-leds";
  4275.  
  4276. button_led {
  4277. label = "button-backlight";
  4278. pwms = <0x12 0x1 0x2710>;
  4279. max-brightness = <0x64>;
  4280. max-duty = <0x32>;
  4281. };
  4282. };
  4283. };
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