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  1. diff --git a/Source/Core/Core/Src/PowerPC/Interpreter/Interpreter.cpp b/Source/Core/Core/Src/PowerPC/Interpreter/Interpreter.cpp
  2. index a8277d8..0df0318 100644
  3. --- a/Source/Core/Core/Src/PowerPC/Interpreter/Interpreter.cpp
  4. +++ b/Source/Core/Core/Src/PowerPC/Interpreter/Interpreter.cpp
  5. @@ -99,6 +99,7 @@ void Trace( UGeckoInstruction &instCode )
  6.  int Interpreter::SingleStepInner(void)
  7.  {
  8.     static UGeckoInstruction instCode;
  9. +   GekkoOPInfo *opinfo = GetOpInfo(instCode);
  10.  
  11.     NPC = PC + sizeof(UGeckoInstruction);
  12.     instCode.hex = Memory::Read_Opcode(PC);
  13. @@ -144,6 +145,13 @@ int Interpreter::SingleStepInner(void)
  14.                 PowerPC::CheckExceptions();
  15.                 m_EndBlock = true;
  16.             }
  17. +           if (opinfo->flags & FL_LOADSTORE)
  18. +               ++PowerPC::ppcState.numLoadStoreInst;
  19. +           if (opinfo->flags & FL_USE_FPU)
  20. +               ++PowerPC::ppcState.numFloatingPointInst;
  21. +           if (MMCR0.Hex || MMCR1.Hex)
  22. +               PowerPC::UpdatePerformanceMonitor(opinfo->numCyclesMinusOne + 1, PowerPC::ppcState.numLoadStoreInst,
  23. +               PowerPC::ppcState.numFloatingPointInst);
  24.         }
  25.     }
  26.     else
  27. @@ -164,7 +172,6 @@ int Interpreter::SingleStepInner(void)
  28.  #endif
  29.      patches();
  30.  
  31. -   GekkoOPInfo *opinfo = GetOpInfo(instCode);
  32.     return opinfo->numCyclesMinusOne + 1;
  33.  }
  34.  
  35. diff --git a/Source/Core/Core/Src/PowerPC/Jit64/Jit.cpp b/Source/Core/Core/Src/PowerPC/Jit64/Jit.cpp
  36. index 8d27619..72f859e 100644
  37. --- a/Source/Core/Core/Src/PowerPC/Jit64/Jit.cpp
  38. +++ b/Source/Core/Core/Src/PowerPC/Jit64/Jit.cpp
  39. @@ -297,7 +297,7 @@ void Jit64::Cleanup()
  40.  
  41.     // SPEED HACK: MMCR0/MMCR1 should be checked at run-time, not at compile time.
  42.     if (MMCR0.Hex || MMCR1.Hex)
  43. -       ABI_CallFunctionCCC((void *)&PowerPC::UpdatePerformanceMonitor, js.downcountAmount, jit->js.numLoadStoreInst, jit->js.numFloatingPointInst);
  44. +       ABI_CallFunctionCCC((void *)&PowerPC::UpdatePerformanceMonitor, js.downcountAmount, PowerPC::ppcState.numLoadStoreInst, PowerPC::ppcState.numFloatingPointInst);
  45.  }
  46.  
  47.  void Jit64::WriteExit(u32 destination, int exit_num)
  48. @@ -460,8 +460,6 @@ const u8* Jit64::DoJit(u32 em_address, PPCAnalyst::CodeBuffer *code_buf, JitBloc
  49.     js.curBlock = b;
  50.     js.block_flags = 0;
  51.     js.cancel = false;
  52. -   jit->js.numLoadStoreInst = 0;
  53. -   jit->js.numFloatingPointInst = 0;
  54.  
  55.     // Analyze the block, collect all instructions it is made of (including inlining,
  56.     // if that is enabled), reorder instructions for optimal performance, and join joinable instructions.
  57. @@ -645,10 +643,9 @@ const u8* Jit64::DoJit(u32 em_address, PPCAnalyst::CodeBuffer *code_buf, JitBloc
  58.             }
  59.  
  60.             if (opinfo->flags & FL_LOADSTORE)
  61. -               ++jit->js.numLoadStoreInst;
  62. -
  63. +               ++PowerPC::ppcState.numLoadStoreInst;
  64.             if (opinfo->flags & FL_USE_FPU)
  65. -               ++jit->js.numFloatingPointInst;
  66. +               ++PowerPC::ppcState.numFloatingPointInst;
  67.         }
  68.  
  69.  #if defined(_DEBUG) || defined(DEBUGFAST)
  70. diff --git a/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL.cpp b/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL.cpp
  71. index 1187956..215b470 100644
  72. --- a/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL.cpp
  73. +++ b/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL.cpp
  74. @@ -393,7 +393,7 @@ void JitIL::Cleanup()
  75.  
  76.     // SPEED HACK: MMCR0/MMCR1 should be checked at run-time, not at compile time.
  77.     if (MMCR0.Hex || MMCR1.Hex)
  78. -       ABI_CallFunctionCCC((void *)&PowerPC::UpdatePerformanceMonitor, js.downcountAmount, jit->js.numLoadStoreInst, jit->js.numFloatingPointInst);
  79. +       ABI_CallFunctionCCC((void *)&PowerPC::UpdatePerformanceMonitor, js.downcountAmount, PowerPC::ppcState.numLoadStoreInst, PowerPC::ppcState.numFloatingPointInst);
  80.  }
  81.  
  82.  void JitIL::WriteExit(u32 destination, int exit_num)
  83. @@ -551,8 +551,6 @@ const u8* JitIL::DoJit(u32 em_address, PPCAnalyst::CodeBuffer *code_buf, JitBloc
  84.     js.fifoBytesThisBlock = 0;
  85.     js.curBlock = b;
  86.     js.cancel = false;
  87. -   jit->js.numLoadStoreInst = 0;
  88. -   jit->js.numFloatingPointInst = 0;
  89.  
  90.     // Analyze the block, collect all instructions it is made of (including inlining,
  91.     // if that is enabled), reorder instructions for optimal performance, and join joinable instructions.
  92. @@ -674,10 +672,10 @@ const u8* JitIL::DoJit(u32 em_address, PPCAnalyst::CodeBuffer *code_buf, JitBloc
  93.             }
  94.  
  95.             if (opinfo->flags & FL_LOADSTORE)
  96. -               ++jit->js.numLoadStoreInst;
  97. +               ++PowerPC::ppcState.numLoadStoreInst;
  98.  
  99.             if (opinfo->flags & FL_USE_FPU)
  100. -               ++jit->js.numFloatingPointInst;
  101. +               ++PowerPC::ppcState.numFloatingPointInst;
  102.         }
  103.     }
  104.  
  105. diff --git a/Source/Core/Core/Src/PowerPC/JitCommon/JitBase.h b/Source/Core/Core/Src/PowerPC/JitCommon/JitBase.h
  106. index 5352c06..b643753 100644
  107. --- a/Source/Core/Core/Src/PowerPC/JitCommon/JitBase.h
  108. +++ b/Source/Core/Core/Src/PowerPC/JitCommon/JitBase.h
  109. @@ -57,9 +57,7 @@ protected:
  110.         int blockSize;
  111.         int instructionNumber;
  112.         int downcountAmount;
  113. -       u32 numLoadStoreInst;
  114. -       u32 numFloatingPointInst;
  115. -
  116. +      
  117.         bool firstFPInstructionFound;
  118.         bool isLastInstruction;
  119.         bool forceUnsafeLoad;
  120. diff --git a/Source/Core/Core/Src/PowerPC/PowerPC.cpp b/Source/Core/Core/Src/PowerPC/PowerPC.cpp
  121. index d444733..724d65d 100644
  122. --- a/Source/Core/Core/Src/PowerPC/PowerPC.cpp
  123. +++ b/Source/Core/Core/Src/PowerPC/PowerPC.cpp
  124. @@ -278,7 +278,7 @@ void UpdatePerformanceMonitor(u32 cycles, u32 num_load_stores, u32 num_fp_inst)
  125.         PowerPC::ppcState.spr[SPR_PMC2] += cycles;
  126.         break;
  127.     case 11: // Number of loads and stores completed
  128. -       PowerPC::ppcState.spr[SPR_PMC2] += num_load_stores;
  129. +       PowerPC::ppcState.spr[SPR_PMC2] = num_load_stores;
  130.         break;
  131.     default:
  132.         break;
  133. @@ -292,7 +292,7 @@ void UpdatePerformanceMonitor(u32 cycles, u32 num_load_stores, u32 num_fp_inst)
  134.         PowerPC::ppcState.spr[SPR_PMC3] += cycles;
  135.         break;
  136.     case 11: // Number of FPU instructions completed
  137. -       PowerPC::ppcState.spr[SPR_PMC3] += num_fp_inst;
  138. +       PowerPC::ppcState.spr[SPR_PMC3] = num_fp_inst;
  139.         break;
  140.     default:
  141.         break;
  142. diff --git a/Source/Core/Core/Src/PowerPC/PowerPC.h b/Source/Core/Core/Src/PowerPC/PowerPC.h
  143. index e0b4bfa..4e236ac 100644
  144. --- a/Source/Core/Core/Src/PowerPC/PowerPC.h
  145. +++ b/Source/Core/Core/Src/PowerPC/PowerPC.h
  146. @@ -77,6 +77,9 @@ struct GC_ALIGNED64(PowerPCState)
  147.     u32 itlb_va[128];
  148.     u32 itlb_pa[128];
  149.  
  150. +   u32 numLoadStoreInst;
  151. +   u32 numFloatingPointInst;
  152. +
  153.     InstructionCache iCache;
  154.  };
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