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mike2545

bootloader

Aug 25th, 2014
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  1.     radix DEC
  2.     LIST      P=18F1320 ; change also: Configure->SelectDevice from Mplab
  3. xtal EQU 8000000        ; you may want to change:
  4.     ;oscil: _HS_OSC_1H  HS extern
  5.     ;   _INTIO1_OSC_1H  Internal RC, OSC1 as RA7, OSC2 as Fosc/4
  6.     ;   _INTIO2_OSC_1H  Internal RC, OSC1 as RA7, OSC2 as RA6
  7. baud EQU 19200          ; standard TinyBld baud rates: 115200 or 19200
  8.     ; The above 3 lines can be changed and buid a bootloader for the desired frequency and PIC type
  9.    
  10.     ;********************************************************************
  11.     ;   Tiny Bootloader     for 18F series      Size=100words
  12.     ;   claudiu.chiculita@ugal.ro
  13.     ;   http://www.ac.ugal.ro/staff/ckiku/software/picbootloader.htm
  14.     ;********************************************************************
  15.    
  16.  
  17.     #include "../icdpictypes.inc"   ;takes care of: #include "p18fxxx.inc",  max_flash, IdTypePIC
  18.     #include "../spbrgselect.inc"   ; RoundResult and baud_rate
  19.  
  20.         #define first_address max_flash-200     ;100 words
  21.  
  22.     __CONFIG _CONFIG1H, _IESO_OFF_1H & _FSCM_OFF_1H & _INTIO2_OSC_1H    
  23.  
  24.     __CONFIG _CONFIG2L, _PWRT_ON_2L & _BOR_ON_2L & _BORV_20_2L
  25.     __CONFIG _CONFIG2H, _WDT_OFF_2H & _WDTPS_32K_2H ;
  26.     __CONFIG _CONFIG3H, _MCLRE_ON_3H
  27.     __CONFIG _CONFIG4L, _DEBUG_OFF_4L & _LVP_OFF_4L & _STVR_ON_4L
  28.     __CONFIG _CONFIG5L, _CP0_OFF_5L & _CP1_OFF_5L
  29.     __CONFIG _CONFIG5H, _CPB_OFF_5H & _CPD_OFF_5H
  30.     __CONFIG _CONFIG6L, _WRT0_OFF_6L & _WRT1_OFF_6L
  31.     __CONFIG _CONFIG6H, _WRTC_OFF_6H & _WRTB_OFF_6H & _WRTD_OFF_6H
  32.     __CONFIG _CONFIG7L, _EBTR0_OFF_7L & _EBTR1_OFF_7L
  33.     __CONFIG _CONFIG7H, _EBTRB_OFF_7H
  34.                                                
  35.  
  36. ;----------------------------- PROGRAM ---------------------------------
  37.     cblock 0
  38.     crc
  39.     i
  40.     cnt1
  41.     cnt2
  42.     cnt3
  43.     counter_hi
  44.     counter_lo
  45.     flag
  46.     endc
  47.     cblock 10
  48.     buffer:64
  49.     dummy4crc
  50.     endc
  51.    
  52. SendL macro car
  53.     movlw car
  54.     movwf TXREG
  55.     endm
  56.    
  57. ;0000000000000000000000000 RESET 00000000000000000000000000
  58.  
  59.         ORG     0x0000
  60.         GOTO    IntrareBootloader
  61.  
  62. ;&&&&&&&&&&&&&&&&&&&&&&&   START     &&&&&&&&&&&&&&&&&&&&&&
  63. ;----------------------  Bootloader  ----------------------
  64. ;PC_flash:      C1h             U       H       L       x  ...  <64 bytes>   ...  crc  
  65. ;PC_eeprom:     C1h             40h   EEADR   EEDATA    0       crc                
  66. ;PC_cfg         C1h         U OR 80h    H       L       1       byte    crc
  67. ;PIC_response:     type `K`
  68.    
  69.     ORG first_address       ;space to deposit first 4 instr. of user prog.
  70.     nop
  71.     nop
  72.     nop
  73.     nop
  74.     org first_address+8
  75. IntrareBootloader
  76.     movlw b'01110000'       ;switch internal oscillator to 8MHz
  77.     movwf OSCCON
  78.     ; Don't I have to wait for the clock to stabilize ?
  79.     movlw b'01100000'      
  80.     movwf ADCON1            ;disable analog on tx/rx
  81.                             ;init serial port
  82.     movlw b'00100100'
  83.     movwf TXSTA
  84.     movlw spbrg_value
  85.     movwf SPBRG
  86.     movlw b'10010000'
  87.     movwf RCSTA
  88.                             ;wait for computer
  89.     rcall Receive          
  90.     sublw 0xC1              ;Expect C1h
  91.     bnz way_to_exit
  92.     SendL IdTypePIC         ;send PIC type
  93. MainLoop
  94.     SendL 'K'               ; "-Everything OK, ready and waiting."
  95. mainl
  96.     clrf crc
  97.     rcall Receive           ;Upper
  98.     movwf TBLPTRU
  99.         movwf flag          ;(for EEPROM and CFG cases)
  100.     rcall Receive           ;Hi
  101.     movwf TBLPTRH
  102.         movwf EEADR         ;(for EEPROM case)
  103.     rcall Receive           ;Lo
  104.     movwf TBLPTRL
  105.         movwf EEDATA        ;(for EEPROM case)
  106.  
  107.     rcall Receive           ;count
  108.     movwf i
  109.     incf i
  110.     lfsr FSR0, (buffer-1)
  111. rcvoct                      ;read 64+1 bytes
  112.         movwf TABLAT        ;prepare for cfg; => store byte before crc
  113.     rcall Receive
  114.     movwf PREINC0
  115.     decfsz i
  116.     bra rcvoct
  117.    
  118.     tstfsz crc              ;check crc
  119.     bra ziieroare
  120.         btfss flag,6        ;EEPROM data is not supported
  121.         bra noeeprom
  122.         ;;;movlw b'00000100'    ;Setup eeprom
  123.         ;;;rcall Write
  124.         ;;;bra waitwre
  125.         bra ziieroare
  126.  
  127. noeeprom
  128.         btfss flag,7        ;is CFG data?
  129.         bra noconfig
  130.         tblwt*              ;write TABLAT(byte before crc) to TBLPTR***
  131.         movlw b'11000100'   ;Setup cfg
  132.         rcall Write
  133.         bra waitwre
  134. noconfig
  135.                             ;write
  136. eraseloop
  137.     movlw   b'10010100'     ; Setup erase
  138.     rcall Write
  139.     TBLRD*-                 ; point to adr-1
  140.    
  141. writebigloop   
  142.     movlw 8                 ; 8groups
  143.     movwf counter_hi
  144.     lfsr FSR0,buffer
  145. writesloop
  146.     movlw 8                 ; 8bytes = 4instr
  147.     movwf counter_lo
  148. writebyte
  149.     movf POSTINC0,w         ; put 1 byte
  150.     movwf TABLAT
  151.     tblwt+*
  152.     decfsz counter_lo
  153.     bra writebyte
  154.    
  155.     movlw   b'10000100'     ; Setup writes
  156.     rcall Write
  157.     decfsz counter_hi
  158.     bra writesloop
  159. waitwre
  160.     ;btfsc EECON1,WR        ;for eeprom writes (wait to finish write)
  161.     ;bra waitwre            ;no need: round trip time with PC bigger than 4ms
  162.    
  163.     bcf EECON1,WREN         ;disable writes
  164.     bra MainLoop
  165.    
  166. ziieroare                   ;CRC failed
  167.     SendL 'N'
  168.     bra mainl
  169.      
  170. ;******** procedures ******************
  171.  
  172. Write
  173.     movwf EECON1
  174.     movlw 0x55
  175.     movwf EECON2
  176.     movlw 0xAA
  177.     movwf EECON2
  178.     bsf EECON1,WR           ;WRITE
  179.     nop
  180.     ;nop
  181.     return
  182.  
  183.  
  184. Receive
  185.     movlw xtal/2000000+1    ; for 20MHz => 11 => 1second delay
  186.     movwf cnt1
  187. rpt2                       
  188.     clrf cnt2
  189. rpt3
  190.     clrf cnt3
  191. rptc
  192.         btfss PIR1,RCIF         ;test RX
  193.         bra notrcv
  194.         movf RCREG,w            ;return read data in W
  195.         addwf crc,f             ;compute crc
  196.         return
  197. notrcv
  198.     decfsz cnt3
  199.     bra rptc
  200.     decfsz cnt2
  201.     bra rpt3
  202.     decfsz cnt1
  203.     bra rpt2
  204.     ;timeout:
  205. way_to_exit
  206.     bcf RCSTA,  SPEN            ; deactivate UART
  207.     bra first_address
  208. ;*************************************************************
  209. ; After reset
  210. ; Do not expect the memory to be zero,
  211. ; Do not expect registers to be initialised like in catalog.
  212.  
  213.             END
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