.def tmp = r16

.cseg
rjmp reset

reset:
	ldi tmp, high(RAMEND)
	out SPH, tmp
	ldi tmp, low(RAMEND)
	out SPL, tmp

	ldi tmp, (1 << PD4)
	out DDRD, tmp

	; 9 bit phase correct PWM
	ldi tmp, (1 << COM1B1) | (1 << COM1B0) | (1 << WGM11) ; COM1B0 je dodan na za inverting
	out TCCR1A, tmp

	ldi tmp, (1 << CS10)
	out TCCR1B, tmp

	; foc1x = fclk / (2 * N * (1 + TOP))    TOP = OCR1A
	; N = fclk / (foc1 * (1 + TOP))
	; N = 7372800 / (20 * 256)
	; N = 1440 -> N = 1024

	; foc1 = 7372800 / (1024 * (1 + 255))
	; foc1 = 28.125 HZ

	; odrediti duty cicle od 50% u ocr1b registru
	; DC = CMP / TOP
	; CMP = DC * TOP
	; CMP = 0.5 * 512
	; CMP = 255

	ldi tmp, high(5)
	out OCR1BH, tmp
	ldi tmp, low(5)
	out OCR1BL, tmp

	main:
	rjmp main