diff --git a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi
index 5cf1aed20490..9546752205b0 100644
--- a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi
+++ b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi
@@ -81,13 +81,16 @@

        bus_fsys_apb_opp_table: opp_table4 {
                compatible = "operating-points-v2";
+               opp-shared;

                /* derived from 666MHz CPLL */
                opp00 {
-                       opp-hz = /bits/ 64 <111000000>;
+                       // opp-hz = /bits/ 64 <111000000>;
+                       opp-hz = /bits/ 64 <100000000>;
                };
                opp01 {
-                       opp-hz = /bits/ 64 <222000000>;
+                       // opp-hz = /bits/ 64 <222000000>;
+                       opp-hz = /bits/ 64 <200000000>;
                };
        };

@@ -99,10 +102,12 @@
                        opp-hz = /bits/ 64 <75000000>;
                };
                opp01 {
-                       opp-hz = /bits/ 64 <120000000>;
+                       // opp-hz = /bits/ 64 <120000000>;
+                       opp-hz = /bits/ 64 <100000000>;
                };
                opp02 {
-                       opp-hz = /bits/ 64 <200000000>;
+                       // opp-hz = /bits/ 64 <200000000>;
+                       opp-hz = /bits/ 64 <150000000>;
                };
        };

@@ -412,7 +417,8 @@
 };

 &bus_fsys {
-       operating-points-v2 = <&bus_fsys2_opp_table>;
+       // operating-points-v2 = <&bus_fsys2_opp_table>;
+       operating-points-v2 = <&bus_fsys_apb_opp_table>;
        devfreq = <&bus_wcore>;
        status = "okay";
 };