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- 16.3.2 EUSART ASYNCHRONOUS
- RECEIVER
- The receiver block diagram is shown in Figure 16-5.
- The data is received on the RB4/AN6/RX/DT/KBI0 pin
- and drives the data recovery block. The data recovery
- block is actually a high-speed shifter, operating at x16
- times the baud rate, whereas the main receive serial
- shifter operates at the bit rate or at FOSC. This mode
- would typically be used in RS-232 systems.
- To set up an Asynchronous Reception:
- 1. Initialize the SPBRGH:SPBRG registers for the
- appropriate baud rate. Set or clear the BRGH
- and BRG16 bits, as required, to achieve the
- desired baud rate.
- 2. Enable the asynchronous serial port by clearing
- bit SYNC and setting bit SPEN.
- 3. If interrupts are desired, set enable bit RCIE.
- 4. If 9-bit reception is desired, set bit RX9.
- 5. Enable the reception by setting bit CREN.
- 6. Flag bit, RCIF, will be set when reception is
- complete and an interrupt will be generated if
- enable bit RCIE was set.
- 7. Read the RCSTA register to get the 9th bit (if
- enabled) and determine if any error occurred
- during reception.
- 8. Read the 8-bit received data by reading the
- RCREG register.
- 9. If any error occurred, clear the error by clearing
- enable bit CREN.
- 10. If using interrupts, ensure that the GIE and PEIE
- bits in the INTCON register (INTCON<7:6>) are
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