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Armbian's Jammy DTS on RPi5

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May 7th, 2024
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  1. /dts-v1/;
  2.  
  3. / {
  4. #address-cells = <0x02>;
  5. #size-cells = <0x01>;
  6. compatible = "raspberrypi,5-model-b\0brcm,bcm2712";
  7. interrupt-parent = <0x01>;
  8. memreserve = <0x3fc00000 0x400000>;
  9. model = "Raspberry Pi 5 Model B Rev 1.0";
  10. serial-number = "f0141a7b43378f25";
  11.  
  12. __overrides__ {
  13. act_led_activelow = "\0\0\0lgpios:8";
  14. act_led_gpio = [00 00 00 6c 67 70 69 6f 73 3a 34 00 00 00 00 6c 67 70 69 6f 73 3a 30 3d 00 00 00 00 35];
  15. act_led_trigger = "\0\0\0llinux,default-trigger";
  16. arm_freq;
  17. axiperf = "\0\0\0]status";
  18. bdaddr = "\0\0\0^local-bd-address[";
  19. button_debounce = "\0\0\0_debounce-interval:0";
  20. cooling_fan = [00 00 00 04 73 74 61 74 75 73 00 00 00 00 60 73 74 61 74 75 73 00];
  21. drm_fb0_rp1_dpi = "\0\0\0bdrm-fb0=\0/axi/pcie@120000/rp1/dpi@148000";
  22. drm_fb0_rp1_dsi0 = "\0\0\0bdrm-fb0=\0/axi/pcie@120000/rp1/dsi@110000";
  23. drm_fb0_rp1_dsi1 = "\0\0\0bdrm-fb0=\0/axi/pcie@120000/rp1/dsi@128000";
  24. drm_fb0_vc4 = "\0\0\0bdrm-fb0=\0/axi/gpu";
  25. drm_fb1_rp1_dpi = "\0\0\0bdrm-fb1=\0/axi/pcie@120000/rp1/dpi@148000";
  26. drm_fb1_rp1_dsi0 = "\0\0\0bdrm-fb1=\0/axi/pcie@120000/rp1/dsi@110000";
  27. drm_fb1_rp1_dsi1 = "\0\0\0bdrm-fb1=\0/axi/pcie@120000/rp1/dsi@128000";
  28. drm_fb1_vc4 = "\0\0\0bdrm-fb1=\0/axi/gpu";
  29. drm_fb2_rp1_dpi = "\0\0\0bdrm-fb2=\0/axi/pcie@120000/rp1/dpi@148000";
  30. drm_fb2_rp1_dsi0 = "\0\0\0bdrm-fb2=\0/axi/pcie@120000/rp1/dsi@110000";
  31. drm_fb2_rp1_dsi1 = "\0\0\0bdrm-fb2=\0/axi/pcie@120000/rp1/dsi@128000";
  32. drm_fb2_vc4 = "\0\0\0bdrm-fb2=\0/axi/gpu";
  33. eth_led0 = "\0\0\0Hled-modes:0";
  34. eth_led1 = "\0\0\0Hled-modes:4";
  35. fan_temp0 = [00 00 00 03 74 65 6d 70 65 72 61 74 75 72 65 3a 30 00];
  36. fan_temp0_hyst = [00 00 00 03 68 79 73 74 65 72 65 73 69 73 3a 30 00];
  37. fan_temp0_speed = [00 00 00 04 63 6f 6f 6c 69 6e 67 2d 6c 65 76 65 6c 73 3a 34 00];
  38. fan_temp1 = [00 00 00 05 74 65 6d 70 65 72 61 74 75 72 65 3a 30 00];
  39. fan_temp1_hyst = [00 00 00 05 68 79 73 74 65 72 65 73 69 73 3a 30 00];
  40. fan_temp1_speed = [00 00 00 04 63 6f 6f 6c 69 6e 67 2d 6c 65 76 65 6c 73 3a 38 00];
  41. fan_temp2 = [00 00 00 06 74 65 6d 70 65 72 61 74 75 72 65 3a 30 00];
  42. fan_temp2_hyst = [00 00 00 06 68 79 73 74 65 72 65 73 69 73 3a 30 00];
  43. fan_temp2_speed = [00 00 00 04 63 6f 6f 6c 69 6e 67 2d 6c 65 76 65 6c 73 3a 31 32 00];
  44. fan_temp3 = "\0\0\0\atemperature:0";
  45. fan_temp3_hyst = "\0\0\0\ahysteresis:0";
  46. fan_temp3_speed = [00 00 00 04 63 6f 6f 6c 69 6e 67 2d 6c 65 76 65 6c 73 3a 31 36 00];
  47. i2c = "\0\0\0dstatus";
  48. i2c0 = "\0\0\0cstatus";
  49. i2c0_baudrate = "\0\0\0cclock-frequency:0";
  50. i2c1 = "\0\0\0dstatus";
  51. i2c1_baudrate = "\0\0\0dclock-frequency:0";
  52. i2c_arm = "\0\0\0dstatus";
  53. i2c_arm_baudrate = "\0\0\0dclock-frequency:0";
  54. i2c_baudrate = "\0\0\0dclock-frequency:0";
  55. i2c_csi_dsi = "\0\0\0estatus";
  56. i2c_csi_dsi0 = "\0\0\0fstatus";
  57. i2c_csi_dsi1 = "\0\0\0estatus";
  58. i2c_vc = "\0\0\0cstatus";
  59. i2c_vc_baudrate = "\0\0\0cclock-frequency:0";
  60. krnbt = "\0\0\0^status";
  61. nvme = "\0\0\0gstatus";
  62. pcie_tperst_clk_ms = "\0\0\0gbrcm,tperst-clk-ms:0";
  63. pciex1 = "\0\0\0gstatus";
  64. pciex1_gen = "\0\0\0gmax-link-speed:0";
  65. pciex1_no_l0s = "\0\0\0gaspm-no-l0s?";
  66. pciex1_tperst_clk_ms = "\0\0\0gbrcm,tperst-clk-ms:0";
  67. pwr_led_activelow = "\0\0\0mgpios:8";
  68. pwr_led_gpio = "\0\0\0mgpios:4";
  69. pwr_led_trigger = "\0\0\0mlinux,default-trigger";
  70. random = "\0\0\0hstatus";
  71. rtc = "\0\0\0istatus";
  72. rtc_bbat_vchg = "\0\0\0itrickle-charge-microvolt:0";
  73. spi = "\0\0\0jstatus";
  74. suspend = "\0\0\0_linux,code:0=205";
  75. uart0 = "\0\0\0astatus";
  76. uart0_console = "\0\0\0astatus\0\0\0\0bconsole=\0/axi/pcie@120000/rp1/serial@30000";
  77. wifiaddr = "\0\0\0klocal-mac-address[";
  78. };
  79.  
  80. __symbols__ {
  81. _i2c0 = "/soc/i2c@7d005000";
  82. _i2c3 = "/soc/i2c@7d005600";
  83. _i2c4 = "/soc/i2c@7d005800";
  84. _i2c5 = "/soc/i2c@7d005a00";
  85. _i2c6 = "/soc/i2c@7d005c00";
  86. _i2c8 = "/soc/i2c@7d005e00";
  87. _i2s = "/soc/_i2s@7d003000";
  88. _pwm0 = "/soc/pwm@7d00c000";
  89. _pwm1 = "/soc/pwm@7d00c800";
  90. _spi0 = "/soc/spi@7d004000";
  91. _spi3 = "/soc/spi@7d004600";
  92. _spi4 = "/soc/spi@7d004800";
  93. _spi5 = "/soc/spi@7d004a00";
  94. _spi6 = "/soc/spi@7d004c00";
  95. _uart0 = "/soc/serial@7d001000";
  96. _uart2 = "/soc/serial@7d001400";
  97. _uart5 = "/soc/serial@7d001a00";
  98. aliases = "/aliases";
  99. aon_intr = "/soc/interrupt-controller@7d510600";
  100. aon_pwm_1pin = "/soc/pinctrl@7d510700/aon_pwm_1pin";
  101. aux = "/dummy";
  102. avs_monitor = "/soc/avs-monitor@7d542000";
  103. axi = "/axi";
  104. axiperf = "/soc/axiperf";
  105. bcm_reset = "/axi/reset-controller@1504318";
  106. blconfig = "/reserved-memory/nvram@0";
  107. bluetooth = "/soc/serial@7d50c000/bluetooth";
  108. bsc_aon_irq = "/soc/intc@7d517b00";
  109. bsc_irq = "/soc/intc@7d508380";
  110. bsc_m1_agpio13_pins = "/soc/pinctrl@7d510700/bsc_m1_agpio13_pins";
  111. bsc_m2_sgpio4_pins = "/soc/pinctrl@7d510700/bsc_m2_sgpio4_pins";
  112. bsc_pmu = "/soc/i2c@7d544000";
  113. bsc_pmu_sgpio4_pins = "/soc/pinctrl@7d510700/bsc_pmu_sgpio4_pins";
  114. bscc = "/soc/i2c@7d517a00";
  115. bscd = "/soc/i2c@7d508300";
  116. bt_shutdown_pins = "/soc/pinctrl@7d504100/bt_shutdown_pins";
  117. cam0_clk = "/cam0_clk";
  118. cam0_reg = "/cam0_reg";
  119. cam1_clk = "/cam1_clk";
  120. cam1_reg = "/cam1_reg";
  121. cam_dummy_reg = "/cam_dummy_reg";
  122. chosen = "/chosen";
  123. clk_108MHz = "/clk-108M";
  124. clk_27MHz = "/clk-27M";
  125. clk_emmc2 = "/clocks/clk_emmc2";
  126. clk_osc = "/clocks/clk-osc";
  127. clk_uart = "/clocks/clk_uart";
  128. clk_usb = "/clocks/clk-usb";
  129. clk_vpu = "/clocks/clk_vpu";
  130. clk_xosc = "/clocks/clk_xosc";
  131. clksrc_mipi0_dsi_byteclk = "/clocks/clksrc_mipi0_dsi_byteclk";
  132. clksrc_mipi1_dsi_byteclk = "/clocks/clksrc_mipi1_dsi_byteclk";
  133. clocks = "/clocks";
  134. cma = "/reserved-memory/linux,cma";
  135. cooling_maps = "/thermal-zones/cpu-thermal/cooling-maps";
  136. cprman = "/soc/cprman@7d202000";
  137. cpu0 = "/cpus/cpu@0";
  138. cpu1 = "/cpus/cpu@1";
  139. cpu2 = "/cpus/cpu@2";
  140. cpu3 = "/cpus/cpu@3";
  141. cpu_crit = "/thermal-zones/cpu-thermal/trips/cpu-crit";
  142. cpu_hot = "/thermal-zones/cpu-thermal/trips/cpu-hot";
  143. cpu_l2_irq = "/soc/intc@7d503000";
  144. cpu_tepid = "/thermal-zones/cpu-thermal/trips/cpu-tepid";
  145. cpu_thermal = "/thermal-zones/cpu-thermal";
  146. cpu_vhot = "/thermal-zones/cpu-thermal/trips/cpu-vhot";
  147. cpu_warm = "/thermal-zones/cpu-thermal/trips/cpu-warm";
  148. cpus = "/cpus";
  149. csi0 = "/axi/pcie@120000/rp1/csi@110000";
  150. csi1 = "/axi/pcie@120000/rp1/csi@128000";
  151. ddc0 = "/soc/i2c@7d508200";
  152. ddc1 = "/soc/i2c@7d508280";
  153. disp_intr = "/soc/interrupt-controller@7c502000";
  154. dma32 = "/axi/dma@10000";
  155. dma40 = "/axi/dma@10600";
  156. dpi = "/axi/pcie@120000/rp1/dpi@148000";
  157. dpi_16bit_cpadhi_gpio0 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_dpi_16bit_cpadhi_gpio0";
  158. dpi_16bit_cpadhi_gpio2 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_dpi_16bit_cpadhi_gpio2";
  159. dpi_16bit_gpio0 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_dpi_16bit_gpio0";
  160. dpi_16bit_gpio2 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_dpi_16bit_gpio2";
  161. dpi_18bit_cpadhi_gpio0 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_dpi_18bit_cpadhi_gpio0";
  162. dpi_18bit_cpadhi_gpio2 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_dpi_18bit_cpadhi_gpio2";
  163. dpi_18bit_gpio0 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_dpi_18bit_gpio0";
  164. dpi_18bit_gpio2 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_dpi_18bit_gpio2";
  165. dpi_gpio0 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_dpi_24bit_gpio0";
  166. dpi_gpio1 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_dpi_24bit_gpio2";
  167. dsi0 = "/axi/pcie@120000/rp1/dsi@110000";
  168. dsi1 = "/axi/pcie@120000/rp1/dsi@128000";
  169. dummy = "/dummy";
  170. dvp = "/soc/clock@7c700000";
  171. emmc_aon_cd_pins = "/soc/pinctrl@7d510700/emmc_aon_cd_pins";
  172. emmc_sd_pulls = "/soc/pinctrl@7d504100/emmc_sd_pulls";
  173. fan = "/cooling_fan";
  174. fb = "/soc/fb";
  175. firmware = "/soc/firmware";
  176. firmware_clocks = "/soc/firmware/clocks";
  177. firmwarekms = "/soc/firmwarekms@7d503000";
  178. gicv2 = "/axi/interrupt-controller@7fff9000";
  179. gio = "/soc/gpio@7d508500";
  180. gio_aon = "/soc/gpio@7d517c00";
  181. gpio = "/axi/pcie@120000/rp1/gpio@d0000";
  182. hdmi0 = "/soc/hdmi@7ef00700";
  183. hdmi1 = "/soc/hdmi@7ef05700";
  184. hvs = "/hvs@107c580000";
  185. i2c0 = "/axi/pcie@120000/rp1/i2c@70000";
  186. i2c0if = "/i2c0if";
  187. i2c0mux = "/i2c0mux";
  188. i2c1 = "/axi/pcie@120000/rp1/i2c@74000";
  189. i2c2 = "/axi/pcie@120000/rp1/i2c@78000";
  190. i2c3 = "/axi/pcie@120000/rp1/i2c@7c000";
  191. i2c3_m4_agpio0_pins = "/soc/pinctrl@7d510700/i2c3_m4_agpio0_pins";
  192. i2c4 = "/axi/pcie@120000/rp1/i2c@80000";
  193. i2c5 = "/axi/pcie@120000/rp1/i2c@84000";
  194. i2c6 = "/axi/pcie@120000/rp1/i2c@88000";
  195. i2c_arm = "/axi/pcie@120000/rp1/i2c@74000";
  196. i2c_csi_dsi = "/axi/pcie@120000/rp1/i2c@80000";
  197. i2c_csi_dsi0 = "/axi/pcie@120000/rp1/i2c@88000";
  198. i2c_csi_dsi1 = "/axi/pcie@120000/rp1/i2c@80000";
  199. i2c_rp1boot = "/soc/i2c@7d005600";
  200. i2c_vc = "/axi/pcie@120000/rp1/i2c@70000";
  201. i2s = "/axi/pcie@120000/rp1/i2s@a0000";
  202. i2s_clk_consumer = "/axi/pcie@120000/rp1/i2s@a4000";
  203. i2s_clk_producer = "/axi/pcie@120000/rp1/i2s@a0000";
  204. iommu2 = "/axi/iommu@5100";
  205. iommu4 = "/axi/iommu@5200";
  206. iommu5 = "/axi/iommu@5280";
  207. iommuc = "/axi/iommuc@5b00";
  208. l2_cache = "/cpus/l2-cache";
  209. l3_cache = "/cpus/l3-cache";
  210. led_act = "/leds/led-act";
  211. led_pwr = "/leds/led-pwr";
  212. leds = "/leds";
  213. local_intc = "/soc/local_intc@7cd00000";
  214. macb_hclk = "/clocks/macb_hclk";
  215. macb_pclk = "/clocks/macb_pclk";
  216. mailbox = "/soc/mailbox@7c013880";
  217. main_aon_irq = "/soc/intc@7d517ac0";
  218. main_irq = "/soc/intc@7d508400";
  219. mip0 = "/axi/msi-controller@130000";
  220. mip1 = "/axi/msi-controller@131000";
  221. mop = "/soc/mop@7c500000";
  222. moplet = "/soc/moplet@7c501000";
  223. pcie0 = "/axi/pcie@100000";
  224. pcie1 = "/axi/pcie@110000";
  225. pcie2 = "/axi/pcie@120000";
  226. pcie_rescal = "/axi/reset-controller@119500";
  227. pciex1 = "/axi/pcie@110000";
  228. pciex4 = "/axi/pcie@120000";
  229. phy1 = "/axi/pcie@120000/rp1/ethernet@100000/ethernet-phy@1";
  230. pinctrl = "/soc/pinctrl@7d504100";
  231. pinctrl_aon = "/soc/pinctrl@7d510700";
  232. pisp_be = "/axi/pisp_be@880000";
  233. pixelvalve0 = "/soc/pixelvalve@7c410000";
  234. pixelvalve1 = "/soc/pixelvalve@7c411000";
  235. pm = "/soc/watchdog@7d200000";
  236. power = "/soc/power";
  237. pwm = "/axi/pcie@120000/rp1/pwm@98000";
  238. pwm0 = "/axi/pcie@120000/rp1/pwm@98000";
  239. pwm1 = "/axi/pcie@120000/rp1/pwm@9c000";
  240. pwm_aon = "/soc/pwm@7d517a80";
  241. pwm_aon_agpio1_pins = "/soc/pinctrl@7d510700/pwm_aon_agpio1_pins";
  242. pwm_aon_agpio4_pins = "/soc/pinctrl@7d510700/pwm_aon_agpio4_pins";
  243. pwm_aon_agpio7_pins = "/soc/pinctrl@7d510700/pwm_aon_agpio7_pins";
  244. pwr_button_pins = "/soc/pinctrl@7d504100/pwr_button_pins";
  245. pwr_key = "/pwr_button/pwr";
  246. random = "/soc/rng@7d208000";
  247. reset = "/soc/firmware/reset";
  248. rmem = "/reserved-memory";
  249. rp1 = "/axi/pcie@120000/rp1";
  250. rp1_adc = "/axi/pcie@120000/rp1/adc@c8000";
  251. rp1_clocks = "/axi/pcie@120000/rp1/clocks@18000";
  252. rp1_csi0 = "/axi/pcie@120000/rp1/csi@110000";
  253. rp1_csi1 = "/axi/pcie@120000/rp1/csi@128000";
  254. rp1_dma = "/axi/pcie@120000/rp1/dma@188000";
  255. rp1_dpi = "/axi/pcie@120000/rp1/dpi@148000";
  256. rp1_dpi_16bit_cpadhi_gpio0 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_dpi_16bit_cpadhi_gpio0";
  257. rp1_dpi_16bit_cpadhi_gpio2 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_dpi_16bit_cpadhi_gpio2";
  258. rp1_dpi_16bit_gpio0 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_dpi_16bit_gpio0";
  259. rp1_dpi_16bit_gpio2 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_dpi_16bit_gpio2";
  260. rp1_dpi_16bit_pad666_gpio0 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_dpi_16bit_pad666_gpio0";
  261. rp1_dpi_16bit_pad666_gpio2 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_dpi_16bit_pad666_gpio2";
  262. rp1_dpi_18bit_cpadhi_gpio0 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_dpi_18bit_cpadhi_gpio0";
  263. rp1_dpi_18bit_cpadhi_gpio2 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_dpi_18bit_cpadhi_gpio2";
  264. rp1_dpi_18bit_gpio0 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_dpi_18bit_gpio0";
  265. rp1_dpi_18bit_gpio2 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_dpi_18bit_gpio2";
  266. rp1_dpi_24bit_gpio0 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_dpi_24bit_gpio0";
  267. rp1_dpi_24bit_gpio2 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_dpi_24bit_gpio2";
  268. rp1_dpi_hvsync = "/axi/pcie@120000/rp1/gpio@d0000/rp1_dpi_hvsync";
  269. rp1_dsi0 = "/axi/pcie@120000/rp1/dsi@110000";
  270. rp1_dsi1 = "/axi/pcie@120000/rp1/dsi@128000";
  271. rp1_eth = "/axi/pcie@120000/rp1/ethernet@100000";
  272. rp1_gpio = "/axi/pcie@120000/rp1/gpio@d0000";
  273. rp1_i2c0 = "/axi/pcie@120000/rp1/i2c@70000";
  274. rp1_i2c0_0_1 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_i2c0_0_1";
  275. rp1_i2c0_8_9 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_i2c0_8_9";
  276. rp1_i2c1 = "/axi/pcie@120000/rp1/i2c@74000";
  277. rp1_i2c1_10_11 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_i2c1_10_11";
  278. rp1_i2c1_2_3 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_i2c1_2_3";
  279. rp1_i2c2 = "/axi/pcie@120000/rp1/i2c@78000";
  280. rp1_i2c2_12_13 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_i2c2_12_13";
  281. rp1_i2c2_4_5 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_i2c2_4_5";
  282. rp1_i2c3 = "/axi/pcie@120000/rp1/i2c@7c000";
  283. rp1_i2c3_14_15 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_i2c3_14_15";
  284. rp1_i2c3_22_23 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_i2c3_22_23";
  285. rp1_i2c3_6_7 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_i2c3_6_7";
  286. rp1_i2c4 = "/axi/pcie@120000/rp1/i2c@80000";
  287. rp1_i2c4_34_35 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_i2c4_34_35";
  288. rp1_i2c4_40_41 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_i2c4_40_41";
  289. rp1_i2c5 = "/axi/pcie@120000/rp1/i2c@84000";
  290. rp1_i2c5_44_45 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_i2c5_44_45";
  291. rp1_i2c6 = "/axi/pcie@120000/rp1/i2c@88000";
  292. rp1_i2c6_38_39 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_i2c6_38_39";
  293. rp1_i2s0 = "/axi/pcie@120000/rp1/i2s@a0000";
  294. rp1_i2s0_18_21 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_i2s0_18_21";
  295. rp1_i2s1 = "/axi/pcie@120000/rp1/i2s@a4000";
  296. rp1_i2s1_18_21 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_i2s1_18_21";
  297. rp1_i2s2 = "/axi/pcie@120000/rp1/i2s@a8000";
  298. rp1_mmc0 = "/axi/pcie@120000/rp1/mmc@180000";
  299. rp1_mmc1 = "/axi/pcie@120000/rp1/mmc@184000";
  300. rp1_pwm0 = "/axi/pcie@120000/rp1/pwm@98000";
  301. rp1_pwm1 = "/axi/pcie@120000/rp1/pwm@9c000";
  302. rp1_pwm1_gpio45 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_pwm1_gpio45";
  303. rp1_sdio0_22_27 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_sdio0_22_27";
  304. rp1_sdio1_28_33 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_sdio1_28_33";
  305. rp1_sdio_clk0 = "/axi/pcie@120000/rp1/sdio_clk0@b0004";
  306. rp1_sdio_clk1 = "/axi/pcie@120000/rp1/sdio_clk1@b4004";
  307. rp1_spi0 = "/axi/pcie@120000/rp1/spi@50000";
  308. rp1_spi0_cs_gpio7 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_spi0_cs_gpio7";
  309. rp1_spi0_gpio9 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_spi0_gpio9";
  310. rp1_spi1 = "/axi/pcie@120000/rp1/spi@54000";
  311. rp1_spi1_gpio19 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_spi1_gpio19";
  312. rp1_spi2 = "/axi/pcie@120000/rp1/spi@58000";
  313. rp1_spi2_gpio1 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_spi2_gpio1";
  314. rp1_spi3 = "/axi/pcie@120000/rp1/spi@5c000";
  315. rp1_spi3_gpio5 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_spi3_gpio5";
  316. rp1_spi4 = "/axi/pcie@120000/rp1/spi@60000";
  317. rp1_spi4_gpio9 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_spi4_gpio9";
  318. rp1_spi5 = "/axi/pcie@120000/rp1/spi@64000";
  319. rp1_spi5_gpio13 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_spi5_gpio13";
  320. rp1_spi6 = "/axi/pcie@120000/rp1/spi@68000";
  321. rp1_spi7 = "/axi/pcie@120000/rp1/spi@6c000";
  322. rp1_spi8 = "/axi/pcie@120000/rp1/spi@4c000";
  323. rp1_spi8_cs_gpio52 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_spi8_cs_gpio52";
  324. rp1_spi8_gpio49 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_spi8_gpio49";
  325. rp1_target = "/axi/pcie@120000";
  326. rp1_uart0 = "/axi/pcie@120000/rp1/serial@30000";
  327. rp1_uart0_14_15 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_uart0_14_15";
  328. rp1_uart0_ctsrts_16_17 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_uart0_ctsrts_16_17";
  329. rp1_uart1 = "/axi/pcie@120000/rp1/serial@34000";
  330. rp1_uart1_0_1 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_uart1_0_1";
  331. rp1_uart1_ctsrts_2_3 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_uart1_ctsrts_2_3";
  332. rp1_uart2 = "/axi/pcie@120000/rp1/serial@38000";
  333. rp1_uart2_4_5 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_uart2_4_5";
  334. rp1_uart2_ctsrts_6_7 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_uart2_ctsrts_6_7";
  335. rp1_uart3 = "/axi/pcie@120000/rp1/serial@3c000";
  336. rp1_uart3_8_9 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_uart3_8_9";
  337. rp1_uart3_ctsrts_10_11 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_uart3_ctsrts_10_11";
  338. rp1_uart4 = "/axi/pcie@120000/rp1/serial@40000";
  339. rp1_uart4_12_13 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_uart4_12_13";
  340. rp1_uart4_ctsrts_14_15 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_uart4_ctsrts_14_15";
  341. rp1_uart5 = "/axi/pcie@120000/rp1/serial@44000";
  342. rp1_usb0 = "/axi/pcie@120000/rp1/usb@200000";
  343. rp1_usb1 = "/axi/pcie@120000/rp1/usb@300000";
  344. rp1_vdd_3v3 = "/rp1_vdd_3v3";
  345. rp1_vec = "/axi/pcie@120000/rp1/vec@144000";
  346. rpi_rtc = "/soc/rpi_rtc";
  347. rpivid = "/axi/codec@800000";
  348. sd_io_1v8_reg = "/sd_io_1v8_reg";
  349. sd_vcc_reg = "/sd_vcc_reg";
  350. sdhci_core = "/clocks/sdhci_core";
  351. sdhost = "/soc/mmc@7d002000";
  352. sdio1 = "/axi/mmc@fff000";
  353. sdio2 = "/axi/mmc@1100000";
  354. sdio2_30_pins = "/soc/pinctrl@7d504100/sdio2_30_pins";
  355. sdio_src = "/clocks/sdio_src";
  356. soc = "/soc";
  357. sound = "/soc/sound";
  358. spi0 = "/axi/pcie@120000/rp1/spi@50000";
  359. spi0_cs_pins = "/axi/pcie@120000/rp1/gpio@d0000/rp1_spi0_cs_gpio7";
  360. spi0_pins = "/axi/pcie@120000/rp1/gpio@d0000/rp1_spi0_gpio9";
  361. spi1 = "/axi/pcie@120000/rp1/spi@54000";
  362. spi10 = "/soc/spi@7d004000";
  363. spi10_cs_gpio1 = "/soc/pinctrl@7d504100/spi10_cs_gpio1";
  364. spi10_cs_pins = "/soc/pinctrl@7d504100/spi10_cs_gpio1";
  365. spi10_gpio2 = "/soc/pinctrl@7d504100/spi10_gpio2";
  366. spi10_pins = "/soc/pinctrl@7d504100/spi10_gpio2";
  367. spi2 = "/axi/pcie@120000/rp1/spi@58000";
  368. spi2_pins = "/axi/pcie@120000/rp1/gpio@d0000/rp1_spi2_gpio1";
  369. spi3 = "/axi/pcie@120000/rp1/spi@5c000";
  370. spi3_pins = "/axi/pcie@120000/rp1/gpio@d0000/rp1_spi3_gpio5";
  371. spi4 = "/axi/pcie@120000/rp1/spi@60000";
  372. spi4_pins = "/axi/pcie@120000/rp1/gpio@d0000/rp1_spi4_gpio9";
  373. spi5 = "/axi/pcie@120000/rp1/spi@64000";
  374. spi5_pins = "/axi/pcie@120000/rp1/gpio@d0000/rp1_spi5_gpio13";
  375. spidev0 = "/axi/pcie@120000/rp1/spi@50000/spidev@0";
  376. spidev1 = "/axi/pcie@120000/rp1/spi@50000/spidev@1";
  377. spidev10 = "/soc/spi@7d004000/spidev@0";
  378. syscon_piarbctl = "/axi/syscon@400018";
  379. system_timer = "/soc/timer@7c003000";
  380. thermal = "/soc/avs-monitor@7d542000/thermal";
  381. thermal_trips = "/thermal-zones/cpu-thermal/trips";
  382. uart0 = "/axi/pcie@120000/rp1/serial@30000";
  383. uart0_ctsrts_pins = "/axi/pcie@120000/rp1/gpio@d0000/rp1_uart0_ctsrts_16_17";
  384. uart0_pins = "/axi/pcie@120000/rp1/gpio@d0000/rp1_uart0_14_15";
  385. uart1 = "/axi/pcie@120000/rp1/serial@34000";
  386. uart10 = "/soc/serial@7d001000";
  387. uart1_ctsrts_pins = "/axi/pcie@120000/rp1/gpio@d0000/rp1_uart1_ctsrts_2_3";
  388. uart1_pins = "/axi/pcie@120000/rp1/gpio@d0000/rp1_uart1_0_1";
  389. uart2 = "/axi/pcie@120000/rp1/serial@38000";
  390. uart2_ctsrts_pins = "/axi/pcie@120000/rp1/gpio@d0000/rp1_uart2_ctsrts_6_7";
  391. uart2_pins = "/axi/pcie@120000/rp1/gpio@d0000/rp1_uart2_4_5";
  392. uart3 = "/axi/pcie@120000/rp1/serial@3c000";
  393. uart3_ctsrts_pins = "/axi/pcie@120000/rp1/gpio@d0000/rp1_uart3_ctsrts_10_11";
  394. uart3_pins = "/axi/pcie@120000/rp1/gpio@d0000/rp1_uart3_8_9";
  395. uart4 = "/axi/pcie@120000/rp1/serial@40000";
  396. uart4_ctsrts_pins = "/axi/pcie@120000/rp1/gpio@d0000/rp1_uart4_ctsrts_14_15";
  397. uart4_pins = "/axi/pcie@120000/rp1/gpio@d0000/rp1_uart4_12_13";
  398. uarta = "/soc/serial@7d50c000";
  399. uarta_24_pins = "/soc/pinctrl@7d504100/uarta_24_pins";
  400. uartb = "/soc/serial@7d50d000";
  401. usb = "/axi/usb@480000";
  402. usb_vbus_pins = "/axi/pcie@120000/rp1/gpio@d0000/usb_vbus_pins";
  403. usbphy = "/phy";
  404. v3d = "/axi/v3d@2000000";
  405. vc4 = "/axi/gpu";
  406. vcio = "/soc/firmware/vcio";
  407. vdd_3v3_reg = "/soc/fixedregulator_3v3";
  408. vdd_5v0_reg = "/soc/fixedregulator_5v0";
  409. vec = "/axi/pcie@120000/rp1/vec@144000";
  410. wifi = "/axi/mmc@1100000/wifi@1";
  411. wl_on_pins = "/soc/pinctrl@7d504100/wl_on_pins";
  412. wl_on_reg = "/wl_on_reg";
  413. };
  414.  
  415. aliases {
  416. blconfig = "/reserved-memory/nvram@0";
  417. bluetooth = "/soc/serial@7d50c000/bluetooth";
  418. console = "/soc/serial@7d001000";
  419. drm-dsi1 = "/axi/pcie@120000/rp1/dsi@110000";
  420. drm-dsi2 = "/axi/pcie@120000/rp1/dsi@128000";
  421. ethernet0 = "/axi/pcie@120000/rp1/ethernet@100000";
  422. fb = "/soc/fb";
  423. gpio0 = "/axi/pcie@120000/rp1/gpio@d0000";
  424. gpio1 = "/soc/gpio@7d508500";
  425. gpio2 = "/soc/gpio@7d517c00";
  426. gpio3 = "/soc/pinctrl@7d504100";
  427. gpio4 = "/soc/pinctrl@7d510700";
  428. i2c = "/axi/pcie@120000/rp1/i2c@74000";
  429. i2c0 = "/axi/pcie@120000/rp1/i2c@70000";
  430. i2c1 = "/axi/pcie@120000/rp1/i2c@74000";
  431. i2c10 = "/soc/i2c@7d005600";
  432. i2c2 = "/axi/pcie@120000/rp1/i2c@78000";
  433. i2c3 = "/axi/pcie@120000/rp1/i2c@7c000";
  434. i2c4 = "/axi/pcie@120000/rp1/i2c@80000";
  435. i2c5 = "/axi/pcie@120000/rp1/i2c@84000";
  436. i2c6 = "/axi/pcie@120000/rp1/i2c@88000";
  437. mailbox = "/soc/mailbox@7c013880";
  438. mmc0 = "/axi/mmc@fff000";
  439. phandle = <0x62>;
  440. serial0 = "/axi/pcie@120000/rp1/serial@30000";
  441. serial1 = "/axi/pcie@120000/rp1/serial@34000";
  442. serial10 = "/soc/serial@7d001000";
  443. serial2 = "/axi/pcie@120000/rp1/serial@38000";
  444. serial3 = "/axi/pcie@120000/rp1/serial@3c000";
  445. serial4 = "/axi/pcie@120000/rp1/serial@40000";
  446. spi0 = "/axi/pcie@120000/rp1/spi@50000";
  447. spi1 = "/axi/pcie@120000/rp1/spi@54000";
  448. spi10 = "/soc/spi@7d004000";
  449. spi2 = "/axi/pcie@120000/rp1/spi@58000";
  450. spi3 = "/axi/pcie@120000/rp1/spi@5c000";
  451. spi4 = "/axi/pcie@120000/rp1/spi@60000";
  452. spi5 = "/axi/pcie@120000/rp1/spi@64000";
  453. uart0 = "/axi/pcie@120000/rp1/serial@30000";
  454. uart1 = "/axi/pcie@120000/rp1/serial@34000";
  455. uart10 = "/soc/serial@7d001000";
  456. uart2 = "/axi/pcie@120000/rp1/serial@38000";
  457. uart3 = "/axi/pcie@120000/rp1/serial@3c000";
  458. uart4 = "/axi/pcie@120000/rp1/serial@40000";
  459. usb0 = "/axi/pcie@120000/rp1/usb@200000";
  460. usb1 = "/axi/pcie@120000/rp1/usb@300000";
  461. wifi0 = "/axi/mmc@1100000/wifi@1";
  462. };
  463.  
  464. arm-pmu {
  465. compatible = "arm,cortex-a76-pmu";
  466. interrupt-affinity = <0x22 0x23 0x24 0x25>;
  467. interrupts = <0x00 0x10 0x04 0x00 0x11 0x04 0x00 0x12 0x04 0x00 0x13 0x04>;
  468. };
  469.  
  470. axi {
  471. #address-cells = <0x02>;
  472. #size-cells = <0x02>;
  473. compatible = "simple-bus";
  474. dma-ranges = <0x00 0x00 0x00 0x00 0x10 0x00 0x10 0x00 0x10 0x00 0x01 0x00 0x14 0x00 0x14 0x00 0x04 0x00 0x18 0x00 0x18 0x00 0x04 0x00 0x1c 0x00 0x1c 0x00 0x04 0x00>;
  475. phandle = <0xab>;
  476. ranges = <0x00 0x00 0x00 0x00 0x10 0x00 0x10 0x00 0x10 0x00 0x01 0x00 0x14 0x00 0x14 0x00 0x04 0x00 0x18 0x00 0x18 0x00 0x04 0x00 0x1c 0x00 0x1c 0x00 0x04 0x00>;
  477.  
  478. codec@800000 {
  479. clock-names = "hevc";
  480. clocks = <0x0a 0x0b>;
  481. compatible = "raspberrypi,rpivid-vid-decoder";
  482. interrupts = <0x00 0x62 0x04>;
  483. iommus = <0x52>;
  484. phandle = <0xf6>;
  485. reg = <0x10 0x800000 0x00 0x10000 0x10 0x840000 0x00 0x1000>;
  486. reg-names = "hevc\0intc";
  487. status = "okay";
  488. };
  489.  
  490. dma@10000 {
  491. #dma-cells = <0x01>;
  492. brcm,dma-channel-mask = <0x3f>;
  493. compatible = "brcm,bcm2712-dma";
  494. interrupt-names = "dma0\0dma1\0dma2\0dma3\0dma4\0dma5";
  495. interrupts = <0x00 0x50 0x04 0x00 0x51 0x04 0x00 0x52 0x04 0x00 0x53 0x04 0x00 0x54 0x04 0x00 0x55 0x04>;
  496. phandle = <0xae>;
  497. reg = <0x10 0x10000 0x00 0x600>;
  498. };
  499.  
  500. dma@10600 {
  501. #dma-cells = <0x01>;
  502. brcm,dma-channel-mask = <0xf80>;
  503. compatible = "brcm,bcm2712-dma";
  504. interrupt-names = "dma6\0dma7\0dma8\0dma9\0dma10\0dma11";
  505. interrupts = <0x00 0x56 0x04 0x00 0x57 0x04 0x00 0x58 0x04 0x00 0x59 0x04 0x00 0x5a 0x04 0x00 0x5b 0x04>;
  506. phandle = <0x10>;
  507. reg = <0x10 0x10600 0x00 0x600>;
  508. };
  509.  
  510. gpu {
  511. compatible = "brcm,bcm2712-vc6";
  512. phandle = <0xac>;
  513. };
  514.  
  515. interrupt-controller@7fff9000 {
  516. #interrupt-cells = <0x03>;
  517. compatible = "arm,gic-400";
  518. interrupt-controller;
  519. interrupts = <0x01 0x09 0xf04>;
  520. phandle = <0x01>;
  521. reg = <0x10 0x7fff9000 0x00 0x1000 0x10 0x7fffa000 0x00 0x2000 0x10 0x7fffc000 0x00 0x2000 0x10 0x7fffe000 0x00 0x2000>;
  522. };
  523.  
  524. iommu@5100 {
  525. #iommu-cells = <0x00>;
  526. cache = <0x28>;
  527. compatible = "brcm,bcm2712-iommu";
  528. phandle = <0x52>;
  529. reg = <0x10 0x5100 0x00 0x80>;
  530. };
  531.  
  532. iommu@5200 {
  533. #interconnect-cells = <0x00>;
  534. #iommu-cells = <0x00>;
  535. cache = <0x28>;
  536. compatible = "brcm,bcm2712-iommu";
  537. phandle = <0xad>;
  538. reg = <0x10 0x5200 0x00 0x80>;
  539. };
  540.  
  541. iommu@5280 {
  542. #iommu-cells = <0x00>;
  543. cache = <0x28>;
  544. compatible = "brcm,bcm2712-iommu";
  545. dma-iova-offset = <0x10 0x00>;
  546. phandle = <0x49>;
  547. reg = <0x10 0x5280 0x00 0x80>;
  548. };
  549.  
  550. iommuc@5b00 {
  551. compatible = "brcm,bcm2712-iommuc";
  552. phandle = <0x28>;
  553. reg = <0x10 0x5b00 0x00 0x80>;
  554. };
  555.  
  556. mmc@1100000 {
  557. #address-cells = <0x01>;
  558. #size-cells = <0x00>;
  559. bus-width = <0x04>;
  560. clocks = <0x53>;
  561. compatible = "brcm,bcm2712-sdhci";
  562. interrupts = <0x00 0x112 0x04>;
  563. mmc-ddr-3_3v;
  564. non-removable;
  565. phandle = <0xf8>;
  566. pinctrl-0 = <0x59>;
  567. pinctrl-names = "default";
  568. reg = <0x10 0x1100000 0x00 0x260 0x10 0x1100400 0x00 0x200>;
  569. reg-names = "host\0cfg";
  570. sd-uhs-ddr50;
  571. sdhci-caps = <0x00 0x00>;
  572. sdhci-caps-mask = <0xc000 0x00>;
  573. status = "okay";
  574. supports-cqe;
  575. vmmc-supply = <0x5a>;
  576.  
  577. wifi@1 {
  578. compatible = "brcm,bcm4329-fmac";
  579. local-mac-address = [2c cf 67 0e c9 95];
  580. phandle = <0x6b>;
  581. reg = <0x01>;
  582. };
  583. };
  584.  
  585. mmc@fff000 {
  586. bus-width = <0x04>;
  587. cd-gpios = <0x58 0x05 0x01>;
  588. clocks = <0x53>;
  589. compatible = "brcm,bcm2712-sdhci";
  590. interrupts = <0x00 0x111 0x04>;
  591. mmc-ddr-3_3v;
  592. phandle = <0xf7>;
  593. pinctrl-0 = <0x54 0x55>;
  594. pinctrl-names = "default";
  595. reg = <0x10 0xfff000 0x00 0x260 0x10 0xfff400 0x00 0x200 0x10 0x15040b0 0x00 0x04 0x10 0x15200f0 0x00 0x24>;
  596. reg-names = "host\0cfg\0busisol\0lcpll";
  597. sd-uhs-ddr50;
  598. sd-uhs-sdr104;
  599. sd-uhs-sdr50;
  600. sdhci-caps = <0x00 0x00>;
  601. sdhci-caps-mask = <0xc000 0x00>;
  602. status = "okay";
  603. supports-cqe;
  604. vmmc-supply = <0x57>;
  605. vqmmc-supply = <0x56>;
  606. };
  607.  
  608. msi-controller@130000 {
  609. #interrupt-cells = <0x02>;
  610. brcm,msi-base-spi = <0x80>;
  611. brcm,msi-num-spis = <0x40>;
  612. brcm,msi-offset = <0x00>;
  613. brcm,msi-pci-addr = <0xff 0xfffff000>;
  614. compatible = "brcm,bcm2712-mip-intc";
  615. interrupt-controller;
  616. msi-controller;
  617. phandle = <0x2d>;
  618. reg = <0x10 0x130000 0x00 0xc0>;
  619. };
  620.  
  621. msi-controller@131000 {
  622. #interrupt-cells = <0x02>;
  623. brcm,msi-base-spi = <0xf7>;
  624. brcm,msi-num-spis = <0x08>;
  625. brcm,msi-offset = <0x08>;
  626. brcm,msi-pci-addr = <0xff 0xffffe000>;
  627. compatible = "brcm,bcm2712-mip-intc";
  628. interrupt-controller;
  629. msi-controller;
  630. phandle = <0x2c>;
  631. reg = <0x10 0x131000 0x00 0xc0>;
  632. };
  633.  
  634. pcie@100000 {
  635. #address-cells = <0x03>;
  636. #interrupt-cells = <0x01>;
  637. #size-cells = <0x02>;
  638. compatible = "brcm,bcm2712-pcie";
  639. device_type = "pci";
  640. dma-ranges = <0x43000000 0x10 0x00 0x00 0x00 0x10 0x00>;
  641. interrupt-map = <0x00 0x00 0x00 0x01 0x01 0x00 0xd1 0x04 0x00 0x00 0x00 0x02 0x01 0x00 0xd2 0x04 0x00 0x00 0x00 0x03 0x01 0x00 0xd3 0x04 0x00 0x00 0x00 0x04 0x01 0x00 0xd4 0x04>;
  642. interrupt-map-mask = <0x00 0x00 0x00 0x07>;
  643. interrupt-names = "pcie\0msi";
  644. interrupt-parent = <0x01>;
  645. interrupts = <0x00 0xd5 0x04 0x00 0xd6 0x04>;
  646. max-link-speed = <0x02>;
  647. msi-controller;
  648. msi-parent = <0x2b>;
  649. phandle = <0x2b>;
  650. ranges = <0x2000000 0x00 0x00 0x17 0x00 0x00 0xfffffffc 0x43000000 0x04 0x00 0x14 0x00 0x03 0x00>;
  651. reg = <0x10 0x100000 0x00 0x9310>;
  652. reset-names = "swinit\0bridge\0rescal";
  653. resets = <0x29 0x05 0x29 0x2a 0x2a>;
  654. status = "disabled";
  655. };
  656.  
  657. pcie@110000 {
  658. #address-cells = <0x03>;
  659. #interrupt-cells = <0x01>;
  660. #size-cells = <0x02>;
  661. brcm,enable-l1ss;
  662. compatible = "brcm,bcm2712-pcie";
  663. device_type = "pci";
  664. dma-ranges = <0x3000000 0x10 0x00 0x00 0x00 0x10 0x00>;
  665. interrupt-map = <0x00 0x00 0x00 0x01 0x01 0x00 0xdb 0x04 0x00 0x00 0x00 0x02 0x01 0x00 0xdc 0x04 0x00 0x00 0x00 0x03 0x01 0x00 0xdd 0x04 0x00 0x00 0x00 0x04 0x01 0x00 0xde 0x04>;
  666. interrupt-map-mask = <0x00 0x00 0x00 0x07>;
  667. interrupt-names = "pcie\0msi";
  668. interrupt-parent = <0x01>;
  669. interrupts = <0x00 0xdf 0x04 0x00 0xe0 0x04>;
  670. max-link-speed = <0x02>;
  671. msi-controller;
  672. msi-parent = <0x2c>;
  673. phandle = <0x67>;
  674. ranges = <0x2000000 0x00 0x00 0x1b 0x00 0x00 0xfffffffc 0x43000000 0x04 0x00 0x18 0x00 0x03 0x00>;
  675. reg = <0x10 0x110000 0x00 0x9310>;
  676. reset-names = "swinit\0bridge\0rescal";
  677. resets = <0x29 0x07 0x29 0x2b 0x2a>;
  678. status = "disabled";
  679. };
  680.  
  681. pcie@120000 {
  682. #address-cells = <0x03>;
  683. #interrupt-cells = <0x01>;
  684. #size-cells = <0x02>;
  685. aspm-no-l0s;
  686. brcm,enable-l1ss;
  687. brcm,enable-mps-rcb;
  688. brcm,vdm-qos-map = <0xbbaa9888>;
  689. compatible = "brcm,bcm2712-pcie";
  690. device_type = "pci";
  691. dma-ranges = <0x2000000 0x00 0x00 0x1f 0x00 0x00 0x400000 0x43000000 0x10 0x00 0x00 0x00 0x10 0x00>;
  692. interrupt-map = <0x00 0x00 0x00 0x01 0x01 0x00 0xe5 0x04 0x00 0x00 0x00 0x02 0x01 0x00 0xe6 0x04 0x00 0x00 0x00 0x03 0x01 0x00 0xe7 0x04 0x00 0x00 0x00 0x04 0x01 0x00 0xe8 0x04>;
  693. interrupt-map-mask = <0x00 0x00 0x00 0x07>;
  694. interrupt-names = "pcie\0msi";
  695. interrupt-parent = <0x01>;
  696. interrupts = <0x00 0xe9 0x04 0x00 0xea 0x04>;
  697. max-link-speed = <0x02>;
  698. msi-controller;
  699. msi-parent = <0x2d>;
  700. phandle = <0xaf>;
  701. ranges = <0x2000000 0x00 0x00 0x1f 0x00 0x00 0xfffffffc 0x43000000 0x04 0x00 0x1c 0x00 0x03 0x00>;
  702. reg = <0x10 0x120000 0x00 0x9310>;
  703. reset-names = "swinit\0bridge\0rescal";
  704. resets = <0x29 0x20 0x29 0x2c 0x2a>;
  705. status = "okay";
  706.  
  707. rp1 {
  708. #address-cells = <0x02>;
  709. #interrupt-cells = <0x02>;
  710. #size-cells = <0x02>;
  711. compatible = "simple-bus";
  712. dma-ranges = <0x10 0x00 0x43000000 0x10 0x00 0x10 0x00 0xc0 0x40000000 0x2000000 0x00 0x00 0x00 0x400000 0x00 0x00 0x2000000 0x10 0x00 0x10 0x00>;
  713. interrupt-controller;
  714. interrupt-parent = <0x2e>;
  715. phandle = <0x2e>;
  716. ranges = <0xc0 0x40000000 0x2000000 0x00 0x00 0x00 0x400000>;
  717.  
  718. adc@c8000 {
  719. #clock-cells = <0x00>;
  720. clock-names = "adcclk";
  721. clocks = <0x30 0x1e>;
  722. compatible = "raspberrypi,rp1-adc";
  723. phandle = <0xc6>;
  724. reg = <0xc0 0x400c8000 0x00 0x4000>;
  725. status = "okay";
  726. vref-supply = <0x45>;
  727. };
  728.  
  729. clocks@18000 {
  730. #clock-cells = <0x01>;
  731. assigned-clock-rates = <0x3b9aca00 0x5b8d8000 0xbebc200 0x7735940 0x3a98000 0xb71b000 0xbebc200 0x5f5e100 0x2faf080 0xf4240 0xbebc200 0x2faf080>;
  732. assigned-clocks = <0x30 0x00 0x30 0x01 0x30 0x03 0x30 0x09 0x30 0x04 0x30 0x0a 0x30 0x0c 0x30 0x06 0x30 0x0d 0x30 0x1f 0x30 0x20 0x30 0x1d>;
  733. clocks = <0x2f>;
  734. compatible = "raspberrypi,rp1-clocks";
  735. phandle = <0x30>;
  736. reg = <0xc0 0x40018000 0x00 0x10038>;
  737. };
  738.  
  739. csi@110000 {
  740. #address-cells = <0x01>;
  741. #size-cells = <0x00>;
  742. assigned-clock-rates = <0x17d7840>;
  743. assigned-clocks = <0x30 0x16>;
  744. clocks = <0x30 0x16>;
  745. compatible = "raspberrypi,rp1-cfe";
  746. interrupts = <0x2f 0x04>;
  747. iommus = <0x49>;
  748. phandle = <0xea>;
  749. reg = <0xc0 0x40110000 0x00 0x100 0xc0 0x40114000 0x00 0x100 0xc0 0x40120000 0x00 0x100 0xc0 0x40124000 0x00 0x1000>;
  750. status = "disabled";
  751. };
  752.  
  753. csi@128000 {
  754. #address-cells = <0x01>;
  755. #size-cells = <0x00>;
  756. assigned-clock-rates = <0x17d7840>;
  757. assigned-clocks = <0x30 0x17>;
  758. clocks = <0x30 0x17>;
  759. compatible = "raspberrypi,rp1-cfe";
  760. interrupts = <0x30 0x04>;
  761. iommus = <0x49>;
  762. phandle = <0xeb>;
  763. reg = <0xc0 0x40128000 0x00 0x100 0xc0 0x4012c000 0x00 0x100 0xc0 0x40138000 0x00 0x100 0xc0 0x4013c000 0x00 0x1000>;
  764. status = "disabled";
  765. };
  766.  
  767. dma@188000 {
  768. #dma-cells = <0x01>;
  769. clock-names = "core-clk\0cfgr-clk";
  770. clocks = <0x44 0x30 0x0c>;
  771. compatible = "snps,axi-dma-1.01a";
  772. dma-channels = <0x08>;
  773. interrupts = <0x28 0x04>;
  774. phandle = <0x31>;
  775. reg = <0xc0 0x40188000 0x00 0x1000>;
  776. snps,axi-max-burst-len = <0x08>;
  777. snps,block-size = <0x40000 0x40000 0x40000 0x40000 0x40000 0x40000 0x40000 0x40000>;
  778. snps,data-width = <0x04>;
  779. snps,dma-masters = <0x01>;
  780. snps,dma-targets = <0x40>;
  781. snps,priority = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07>;
  782. status = "okay";
  783. };
  784.  
  785. dpi@148000 {
  786. assigned-clock-parents = <0x30 0x05>;
  787. assigned-clocks = <0x30 0x28>;
  788. clock-names = "dpiclk\0plldiv\0pllcore";
  789. clocks = <0x30 0x28 0x30 0x05 0x30 0x02>;
  790. compatible = "raspberrypi,rp1dpi";
  791. interrupts = <0x31 0x04>;
  792. iommus = <0x49>;
  793. phandle = <0xf3>;
  794. reg = <0xc0 0x40148000 0x00 0x1000 0xc0 0x40140000 0x00 0x1000>;
  795. status = "disabled";
  796. };
  797.  
  798. dsi@110000 {
  799. assigned-clock-parents = <0x00 0x4d>;
  800. assigned-clock-rates = <0x17d7840>;
  801. assigned-clocks = <0x30 0x16 0x30 0x29>;
  802. clock-names = "cfgclk\0dpiclk\0byteclk\0refclk";
  803. clocks = <0x30 0x16 0x30 0x29 0x4d 0x2f>;
  804. compatible = "raspberrypi,rp1dsi";
  805. interrupts = <0x2f 0x04>;
  806. iommus = <0x49>;
  807. phandle = <0xf0>;
  808. reg = <0xc0 0x40118000 0x00 0x1000 0xc0 0x4011c000 0x00 0x1000 0xc0 0x40120000 0x00 0x1000>;
  809. status = "disabled";
  810. };
  811.  
  812. dsi@128000 {
  813. assigned-clock-parents = <0x00 0x4e>;
  814. assigned-clock-rates = <0x17d7840>;
  815. assigned-clocks = <0x30 0x17 0x30 0x2a>;
  816. clock-names = "cfgclk\0dpiclk\0byteclk\0refclk";
  817. clocks = <0x30 0x17 0x30 0x2a 0x4e 0x2f>;
  818. compatible = "raspberrypi,rp1dsi";
  819. interrupts = <0x30 0x04>;
  820. iommus = <0x49>;
  821. phandle = <0xf1>;
  822. reg = <0xc0 0x40130000 0x00 0x1000 0xc0 0x40134000 0x00 0x1000 0xc0 0x40138000 0x00 0x1000>;
  823. status = "disabled";
  824. };
  825.  
  826. ethernet@100000 {
  827. #address-cells = <0x01>;
  828. #size-cells = <0x00>;
  829. cdns,ar2r-max-pipe = [08];
  830. cdns,aw2w-max-pipe = [08];
  831. cdns,use-aw2b-fill;
  832. clock-names = "pclk\0hclk\0tsu_clk";
  833. clocks = <0x46 0x47 0x30 0x1d>;
  834. compatible = "cdns,macb";
  835. interrupts = <0x06 0x04>;
  836. local-mac-address = [2c cf 67 0e c9 92];
  837. phandle = <0xe9>;
  838. phy-handle = <0x48>;
  839. phy-mode = "rgmii-id";
  840. phy-reset-duration = <0x05>;
  841. phy-reset-gpios = <0x35 0x20 0x01>;
  842. reg = <0xc0 0x40100000 0x00 0x4000>;
  843. status = "okay";
  844.  
  845. ethernet-phy@1 {
  846. brcm,powerdown-enable;
  847. phandle = <0x48>;
  848. reg = <0x01>;
  849. };
  850. };
  851.  
  852. gpio@d0000 {
  853. #gpio-cells = <0x02>;
  854. #interrupt-cells = <0x02>;
  855. compatible = "raspberrypi,rp1-gpio";
  856. gpio-controller;
  857. gpio-line-names = "ID_SDA\0ID_SCL\0GPIO2\0GPIO3\0GPIO4\0GPIO5\0GPIO6\0GPIO7\0GPIO8\0GPIO9\0GPIO10\0GPIO11\0GPIO12\0GPIO13\0GPIO14\0GPIO15\0GPIO16\0GPIO17\0GPIO18\0GPIO19\0GPIO20\0GPIO21\0GPIO22\0GPIO23\0GPIO24\0GPIO25\0GPIO26\0GPIO27\0PCIE_RP1_WAKE\0FAN_TACH\0HOST_SDA\0HOST_SCL\0ETH_RST_N\0-\0CD0_IO0_MICCLK\0CD0_IO0_MICDAT0\0RP1_PCIE_CLKREQ_N\0-\0CD0_SDA\0CD0_SCL\0CD1_SDA\0CD1_SCL\0USB_VBUS_EN\0USB_OC_N\0RP1_STAT_LED\0FAN_PWM\0CD1_IO0_MICCLK\02712_WAKE\0CD1_IO1_MICDAT1\0EN_MAX_USB_CUR\0-\0-\0-\0-";
  858. interrupt-controller;
  859. interrupts = <0x00 0x04 0x01 0x04 0x02 0x04>;
  860. phandle = <0x35>;
  861. reg = <0xc0 0x400d0000 0x00 0xc000 0xc0 0x400e0000 0x00 0xc000 0xc0 0x400f0000 0x00 0xc000>;
  862. status = "okay";
  863.  
  864. rp1_dpi_16bit_cpadhi_gpio0 {
  865. bias-disable;
  866. function = "dpi";
  867. phandle = <0xe1>;
  868. pins = "gpio0\0gpio1\0gpio2\0gpio3\0gpio4\0gpio5\0gpio6\0gpio7\0gpio8\0gpio12\0gpio13\0gpio14\0gpio15\0gpio16\0gpio17\0gpio20\0gpio21\0gpio22\0gpio23\0gpio24";
  869. };
  870.  
  871. rp1_dpi_16bit_cpadhi_gpio2 {
  872. bias-disable;
  873. function = "dpi";
  874. phandle = <0xda>;
  875. pins = "gpio2\0gpio3\0gpio4\0gpio5\0gpio6\0gpio7\0gpio8\0gpio12\0gpio13\0gpio14\0gpio15\0gpio16\0gpio17\0gpio20\0gpio21\0gpio22\0gpio23\0gpio24";
  876. };
  877.  
  878. rp1_dpi_16bit_gpio0 {
  879. bias-disable;
  880. function = "dpi";
  881. phandle = <0xe0>;
  882. pins = "gpio0\0gpio1\0gpio2\0gpio3\0gpio4\0gpio5\0gpio6\0gpio7\0gpio8\0gpio9\0gpio10\0gpio11\0gpio12\0gpio13\0gpio14\0gpio15\0gpio16\0gpio17\0gpio18\0gpio19";
  883. };
  884.  
  885. rp1_dpi_16bit_gpio2 {
  886. bias-disable;
  887. function = "dpi";
  888. phandle = <0xd9>;
  889. pins = "gpio2\0gpio3\0gpio4\0gpio5\0gpio6\0gpio7\0gpio8\0gpio9\0gpio10\0gpio11\0gpio12\0gpio13\0gpio14\0gpio15\0gpio16\0gpio17\0gpio18\0gpio19";
  890. };
  891.  
  892. rp1_dpi_16bit_pad666_gpio0 {
  893. bias-disable;
  894. function = "dpi";
  895. phandle = <0xe2>;
  896. pins = "gpio0\0gpio1\0gpio2\0gpio3\0gpio5\0gpio6\0gpio7\0gpio8\0gpio9\0gpio12\0gpio13\0gpio14\0gpio15\0gpio16\0gpio17\0gpio21\0gpio22\0gpio23\0gpio24\0gpio25";
  897. };
  898.  
  899. rp1_dpi_16bit_pad666_gpio2 {
  900. bias-disable;
  901. function = "dpi";
  902. phandle = <0xdb>;
  903. pins = "gpio2\0gpio3\0gpio5\0gpio6\0gpio7\0gpio8\0gpio9\0gpio12\0gpio13\0gpio14\0gpio15\0gpio16\0gpio17\0gpio21\0gpio22\0gpio23\0gpio24\0gpio25";
  904. };
  905.  
  906. rp1_dpi_18bit_cpadhi_gpio0 {
  907. bias-disable;
  908. function = "dpi";
  909. phandle = <0xe4>;
  910. pins = "gpio0\0gpio1\0gpio2\0gpio3\0gpio4\0gpio5\0gpio6\0gpio7\0gpio8\0gpio9\0gpio12\0gpio13\0gpio14\0gpio15\0gpio16\0gpio17\0gpio20\0gpio21\0gpio22\0gpio23\0gpio24\0gpio25";
  911. };
  912.  
  913. rp1_dpi_18bit_cpadhi_gpio2 {
  914. bias-disable;
  915. function = "dpi";
  916. phandle = <0xdd>;
  917. pins = "gpio2\0gpio3\0gpio4\0gpio5\0gpio6\0gpio7\0gpio8\0gpio9\0gpio12\0gpio13\0gpio14\0gpio15\0gpio16\0gpio17\0gpio20\0gpio21\0gpio22\0gpio23\0gpio24\0gpio25";
  918. };
  919.  
  920. rp1_dpi_18bit_gpio0 {
  921. bias-disable;
  922. function = "dpi";
  923. phandle = <0xe3>;
  924. pins = "gpio0\0gpio1\0gpio2\0gpio3\0gpio4\0gpio5\0gpio6\0gpio7\0gpio8\0gpio9\0gpio10\0gpio11\0gpio12\0gpio13\0gpio14\0gpio15\0gpio16\0gpio17\0gpio18\0gpio19\0gpio20\0gpio21";
  925. };
  926.  
  927. rp1_dpi_18bit_gpio2 {
  928. bias-disable;
  929. function = "dpi";
  930. phandle = <0xdc>;
  931. pins = "gpio2\0gpio3\0gpio4\0gpio5\0gpio6\0gpio7\0gpio8\0gpio9\0gpio10\0gpio11\0gpio12\0gpio13\0gpio14\0gpio15\0gpio16\0gpio17\0gpio18\0gpio19\0gpio20\0gpio21";
  932. };
  933.  
  934. rp1_dpi_24bit_gpio0 {
  935. bias-disable;
  936. function = "dpi";
  937. phandle = <0xe5>;
  938. pins = "gpio0\0gpio1\0gpio2\0gpio3\0gpio4\0gpio5\0gpio6\0gpio7\0gpio8\0gpio9\0gpio10\0gpio11\0gpio12\0gpio13\0gpio14\0gpio15\0gpio16\0gpio17\0gpio18\0gpio19\0gpio20\0gpio21\0gpio22\0gpio23\0gpio24\0gpio25\0gpio26\0gpio27";
  939. };
  940.  
  941. rp1_dpi_24bit_gpio2 {
  942. bias-disable;
  943. function = "dpi";
  944. phandle = <0xde>;
  945. pins = "gpio2\0gpio3\0gpio4\0gpio5\0gpio6\0gpio7\0gpio8\0gpio9\0gpio10\0gpio11\0gpio12\0gpio13\0gpio14\0gpio15\0gpio16\0gpio17\0gpio18\0gpio19\0gpio20\0gpio21\0gpio22\0gpio23\0gpio24\0gpio25\0gpio26\0gpio27";
  946. };
  947.  
  948. rp1_dpi_hvsync {
  949. bias-disable;
  950. function = "dpi";
  951. phandle = <0xdf>;
  952. pins = "gpio2\0gpio3";
  953. };
  954.  
  955. rp1_i2c0_0_1 {
  956. bias-pull-up;
  957. drive-strength = <0x0c>;
  958. function = "i2c0";
  959. phandle = <0x3a>;
  960. pins = "gpio0\0gpio1";
  961. };
  962.  
  963. rp1_i2c0_8_9 {
  964. bias-pull-up;
  965. drive-strength = <0x0c>;
  966. function = "i2c0";
  967. phandle = <0xd4>;
  968. pins = "gpio8\0gpio9";
  969. };
  970.  
  971. rp1_i2c1_10_11 {
  972. bias-pull-up;
  973. drive-strength = <0x0c>;
  974. function = "i2c1";
  975. phandle = <0xd5>;
  976. pins = "gpio10\0gpio11";
  977. };
  978.  
  979. rp1_i2c1_2_3 {
  980. bias-pull-up;
  981. drive-strength = <0x0c>;
  982. function = "i2c1";
  983. phandle = <0x3b>;
  984. pins = "gpio2\0gpio3";
  985. };
  986.  
  987. rp1_i2c2_12_13 {
  988. bias-pull-up;
  989. drive-strength = <0x0c>;
  990. function = "i2c2";
  991. phandle = <0xd6>;
  992. pins = "gpio12\0gpio13";
  993. };
  994.  
  995. rp1_i2c2_4_5 {
  996. bias-pull-up;
  997. drive-strength = <0x0c>;
  998. function = "i2c2";
  999. phandle = <0x3c>;
  1000. pins = "gpio4\0gpio5";
  1001. };
  1002.  
  1003. rp1_i2c3_14_15 {
  1004. bias-pull-up;
  1005. drive-strength = <0x0c>;
  1006. function = "i2c3";
  1007. phandle = <0xd7>;
  1008. pins = "gpio14\0gpio15";
  1009. };
  1010.  
  1011. rp1_i2c3_22_23 {
  1012. bias-pull-up;
  1013. drive-strength = <0x0c>;
  1014. function = "i2c3";
  1015. phandle = <0xd8>;
  1016. pins = "gpio22\0gpio23";
  1017. };
  1018.  
  1019. rp1_i2c3_6_7 {
  1020. bias-pull-up;
  1021. drive-strength = <0x0c>;
  1022. function = "i2c3";
  1023. phandle = <0x3d>;
  1024. pins = "gpio6\0gpio7";
  1025. };
  1026.  
  1027. rp1_i2c4_34_35 {
  1028. bias-pull-up;
  1029. drive-strength = <0x0c>;
  1030. function = "i2c4";
  1031. phandle = <0xd2>;
  1032. pins = "gpio34\0gpio35";
  1033. };
  1034.  
  1035. rp1_i2c4_40_41 {
  1036. bias-pull-up;
  1037. drive-strength = <0x0c>;
  1038. function = "i2c4";
  1039. phandle = <0x3e>;
  1040. pins = "gpio40\0gpio41";
  1041. };
  1042.  
  1043. rp1_i2c5_44_45 {
  1044. bias-pull-up;
  1045. drive-strength = <0x0c>;
  1046. function = "i2c5";
  1047. phandle = <0xd3>;
  1048. pins = "gpio44\0gpio45";
  1049. };
  1050.  
  1051. rp1_i2c6_38_39 {
  1052. bias-pull-up;
  1053. drive-strength = <0x0c>;
  1054. function = "i2c6";
  1055. phandle = <0x3f>;
  1056. pins = "gpio38\0gpio39";
  1057. };
  1058.  
  1059. rp1_i2s0_18_21 {
  1060. bias-disable;
  1061. function = "i2s0";
  1062. phandle = <0x41>;
  1063. pins = "gpio18\0gpio19\0gpio20\0gpio21";
  1064. };
  1065.  
  1066. rp1_i2s1_18_21 {
  1067. bias-disable;
  1068. function = "i2s1";
  1069. phandle = <0x42>;
  1070. pins = "gpio18\0gpio19\0gpio20\0gpio21";
  1071. };
  1072.  
  1073. rp1_pwm1_gpio45 {
  1074. bias-pull-down;
  1075. function = "pwm1";
  1076. phandle = <0x40>;
  1077. pins = "gpio45";
  1078. };
  1079.  
  1080. rp1_sdio0_22_27 {
  1081. phandle = <0xd0>;
  1082.  
  1083. pin_clk {
  1084. bias-disable;
  1085. drive-strength = <0x0c>;
  1086. function = "sd0";
  1087. pins = "gpio22";
  1088. slew-rate = <0x01>;
  1089. };
  1090.  
  1091. pin_cmd {
  1092. bias-pull-up;
  1093. drive-strength = <0x0c>;
  1094. function = "sd0";
  1095. pins = "gpio23";
  1096. slew-rate = <0x01>;
  1097. };
  1098.  
  1099. pins_dat {
  1100. bias-pull-up;
  1101. drive-strength = <0x0c>;
  1102. function = "sd0";
  1103. pins = "gpio24\0gpio25\0gpio26\0gpio27";
  1104. slew-rate = <0x01>;
  1105. };
  1106. };
  1107.  
  1108. rp1_sdio1_28_33 {
  1109. phandle = <0xd1>;
  1110.  
  1111. pin_clk {
  1112. bias-disable;
  1113. drive-strength = <0x0c>;
  1114. function = "sd1";
  1115. pins = "gpio28";
  1116. slew-rate = <0x01>;
  1117. };
  1118.  
  1119. pin_cmd {
  1120. bias-pull-up;
  1121. drive-strength = <0x0c>;
  1122. function = "sd1";
  1123. pins = "gpio29";
  1124. slew-rate = <0x01>;
  1125. };
  1126.  
  1127. pins_dat {
  1128. bias-pull-up;
  1129. drive-strength = <0x0c>;
  1130. function = "sd1";
  1131. pins = "gpio30\0gpio31\0gpio32\0gpio33";
  1132. slew-rate = <0x01>;
  1133. };
  1134. };
  1135.  
  1136. rp1_spi0_cs_gpio7 {
  1137. bias-pull-up;
  1138. function = "spi0";
  1139. phandle = <0x34>;
  1140. pins = "gpio7\0gpio8";
  1141. };
  1142.  
  1143. rp1_spi0_gpio9 {
  1144. bias-disable;
  1145. drive-strength = <0x0c>;
  1146. function = "spi0";
  1147. phandle = <0x33>;
  1148. pins = "gpio9\0gpio10\0gpio11";
  1149. slew-rate = <0x01>;
  1150. };
  1151.  
  1152. rp1_spi1_gpio19 {
  1153. bias-disable;
  1154. drive-strength = <0x0c>;
  1155. function = "spi1";
  1156. phandle = <0xe6>;
  1157. pins = "gpio19\0gpio20\0gpio21";
  1158. slew-rate = <0x01>;
  1159. };
  1160.  
  1161. rp1_spi2_gpio1 {
  1162. bias-disable;
  1163. drive-strength = <0x0c>;
  1164. function = "spi2";
  1165. phandle = <0x36>;
  1166. pins = "gpio1\0gpio2\0gpio3";
  1167. slew-rate = <0x01>;
  1168. };
  1169.  
  1170. rp1_spi3_gpio5 {
  1171. bias-disable;
  1172. drive-strength = <0x0c>;
  1173. function = "spi3";
  1174. phandle = <0x37>;
  1175. pins = "gpio5\0gpio6\0gpio7";
  1176. slew-rate = <0x01>;
  1177. };
  1178.  
  1179. rp1_spi4_gpio9 {
  1180. bias-disable;
  1181. drive-strength = <0x0c>;
  1182. function = "spi4";
  1183. phandle = <0x38>;
  1184. pins = "gpio9\0gpio10\0gpio11";
  1185. slew-rate = <0x01>;
  1186. };
  1187.  
  1188. rp1_spi5_gpio13 {
  1189. bias-disable;
  1190. drive-strength = <0x0c>;
  1191. function = "spi5";
  1192. phandle = <0x39>;
  1193. pins = "gpio13\0gpio14\0gpio15";
  1194. slew-rate = <0x01>;
  1195. };
  1196.  
  1197. rp1_spi8_cs_gpio52 {
  1198. bias-pull-up;
  1199. function = "spi0";
  1200. phandle = <0xe8>;
  1201. pins = "gpio52\0gpio53";
  1202. };
  1203.  
  1204. rp1_spi8_gpio49 {
  1205. bias-disable;
  1206. drive-strength = <0x0c>;
  1207. function = "spi8";
  1208. phandle = <0xe7>;
  1209. pins = "gpio49\0gpio50\0gpio51";
  1210. slew-rate = <0x01>;
  1211. };
  1212.  
  1213. rp1_uart0_14_15 {
  1214. phandle = <0x32>;
  1215.  
  1216. pin_rxd {
  1217. bias-pull-up;
  1218. function = "uart0";
  1219. pins = "gpio15";
  1220. };
  1221.  
  1222. pin_txd {
  1223. bias-disable;
  1224. function = "uart0";
  1225. pins = "gpio14";
  1226. };
  1227. };
  1228.  
  1229. rp1_uart0_ctsrts_16_17 {
  1230. phandle = <0xc7>;
  1231.  
  1232. pin_cts {
  1233. bias-pull-up;
  1234. function = "uart0";
  1235. pins = "gpio16";
  1236. };
  1237.  
  1238. pin_rts {
  1239. bias-disable;
  1240. function = "uart0";
  1241. pins = "gpio17";
  1242. };
  1243. };
  1244.  
  1245. rp1_uart1_0_1 {
  1246. phandle = <0xc8>;
  1247.  
  1248. pin_rxd {
  1249. bias-pull-up;
  1250. function = "uart1";
  1251. pins = "gpio1";
  1252. };
  1253.  
  1254. pin_txd {
  1255. bias-disable;
  1256. function = "uart1";
  1257. pins = "gpio0";
  1258. };
  1259. };
  1260.  
  1261. rp1_uart1_ctsrts_2_3 {
  1262. phandle = <0xc9>;
  1263.  
  1264. pin_cts {
  1265. bias-pull-up;
  1266. function = "uart1";
  1267. pins = "gpio2";
  1268. };
  1269.  
  1270. pin_rts {
  1271. bias-disable;
  1272. function = "uart1";
  1273. pins = "gpio3";
  1274. };
  1275. };
  1276.  
  1277. rp1_uart2_4_5 {
  1278. phandle = <0xca>;
  1279.  
  1280. pin_rxd {
  1281. bias-pull-up;
  1282. function = "uart2";
  1283. pins = "gpio5";
  1284. };
  1285.  
  1286. pin_txd {
  1287. bias-disable;
  1288. function = "uart2";
  1289. pins = "gpio4";
  1290. };
  1291. };
  1292.  
  1293. rp1_uart2_ctsrts_6_7 {
  1294. phandle = <0xcb>;
  1295.  
  1296. pin_cts {
  1297. bias-pull-up;
  1298. function = "uart2";
  1299. pins = "gpio6";
  1300. };
  1301.  
  1302. pin_rts {
  1303. bias-disable;
  1304. function = "uart2";
  1305. pins = "gpio7";
  1306. };
  1307. };
  1308.  
  1309. rp1_uart3_8_9 {
  1310. phandle = <0xcc>;
  1311.  
  1312. pin_rxd {
  1313. bias-pull-up;
  1314. function = "uart3";
  1315. pins = "gpio9";
  1316. };
  1317.  
  1318. pin_txd {
  1319. bias-disable;
  1320. function = "uart3";
  1321. pins = "gpio8";
  1322. };
  1323. };
  1324.  
  1325. rp1_uart3_ctsrts_10_11 {
  1326. phandle = <0xcd>;
  1327.  
  1328. pin_cts {
  1329. bias-pull-up;
  1330. function = "uart3";
  1331. pins = "gpio10";
  1332. };
  1333.  
  1334. pin_rts {
  1335. bias-disable;
  1336. function = "uart3";
  1337. pins = "gpio11";
  1338. };
  1339. };
  1340.  
  1341. rp1_uart4_12_13 {
  1342. phandle = <0xce>;
  1343.  
  1344. pin_rxd {
  1345. bias-pull-up;
  1346. function = "uart4";
  1347. pins = "gpio13";
  1348. };
  1349.  
  1350. pin_txd {
  1351. bias-disable;
  1352. function = "uart4";
  1353. pins = "gpio12";
  1354. };
  1355. };
  1356.  
  1357. rp1_uart4_ctsrts_14_15 {
  1358. phandle = <0xcf>;
  1359.  
  1360. pin_cts {
  1361. bias-pull-up;
  1362. function = "uart4";
  1363. pins = "gpio14";
  1364. };
  1365.  
  1366. pin_rts {
  1367. bias-disable;
  1368. function = "uart4";
  1369. pins = "gpio15";
  1370. };
  1371. };
  1372.  
  1373. usb_vbus_pins {
  1374. function = "vbus1";
  1375. phandle = <0x4c>;
  1376. pins = "gpio42\0gpio43";
  1377. };
  1378. };
  1379.  
  1380. gpiomem@d0000 {
  1381. chardev-name = "gpiomem0";
  1382. compatible = "raspberrypi,gpiomem";
  1383. reg = <0xc0 0x400d0000 0x00 0x30000>;
  1384. };
  1385.  
  1386. i2c@70000 {
  1387. clock-frequency = <0x186a0>;
  1388. clocks = <0x30 0x0c>;
  1389. compatible = "snps,designware-i2c";
  1390. i2c-scl-falling-time-ns = <0x64>;
  1391. i2c-scl-rising-time-ns = <0x41>;
  1392. i2c-sda-hold-time-ns = <0x12c>;
  1393. interrupts = <0x07 0x04>;
  1394. phandle = <0x63>;
  1395. pinctrl-0 = <0x3a>;
  1396. pinctrl-names = "default";
  1397. reg = <0xc0 0x40070000 0x00 0x1000>;
  1398. status = "disabled";
  1399. };
  1400.  
  1401. i2c@74000 {
  1402. clock-frequency = <0x186a0>;
  1403. clocks = <0x30 0x0c>;
  1404. compatible = "snps,designware-i2c";
  1405. i2c-scl-falling-time-ns = <0x64>;
  1406. i2c-scl-rising-time-ns = <0x41>;
  1407. i2c-sda-hold-time-ns = <0x12c>;
  1408. interrupts = <0x08 0x04>;
  1409. phandle = <0x64>;
  1410. pinctrl-0 = <0x3b>;
  1411. pinctrl-names = "default";
  1412. reg = <0xc0 0x40074000 0x00 0x1000>;
  1413. status = "okay";
  1414. };
  1415.  
  1416. i2c@78000 {
  1417. clocks = <0x30 0x0c>;
  1418. compatible = "snps,designware-i2c";
  1419. i2c-scl-falling-time-ns = <0x64>;
  1420. i2c-scl-rising-time-ns = <0x41>;
  1421. i2c-sda-hold-time-ns = <0x12c>;
  1422. interrupts = <0x09 0x04>;
  1423. phandle = <0xbf>;
  1424. pinctrl-0 = <0x3c>;
  1425. pinctrl-names = "default";
  1426. reg = <0xc0 0x40078000 0x00 0x1000>;
  1427. status = "disabled";
  1428. };
  1429.  
  1430. i2c@7c000 {
  1431. clocks = <0x30 0x0c>;
  1432. compatible = "snps,designware-i2c";
  1433. i2c-scl-falling-time-ns = <0x64>;
  1434. i2c-scl-rising-time-ns = <0x41>;
  1435. i2c-sda-hold-time-ns = <0x12c>;
  1436. interrupts = <0x0a 0x04>;
  1437. phandle = <0xc0>;
  1438. pinctrl-0 = <0x3d>;
  1439. pinctrl-names = "default";
  1440. reg = <0xc0 0x4007c000 0x00 0x1000>;
  1441. status = "disabled";
  1442. };
  1443.  
  1444. i2c@80000 {
  1445. clock-frequency = <0x186a0>;
  1446. clocks = <0x30 0x0c>;
  1447. compatible = "snps,designware-i2c";
  1448. i2c-scl-falling-time-ns = <0x64>;
  1449. i2c-scl-rising-time-ns = <0x41>;
  1450. i2c-sda-hold-time-ns = <0x12c>;
  1451. interrupts = <0x0b 0x04>;
  1452. phandle = <0x65>;
  1453. pinctrl-0 = <0x3e>;
  1454. pinctrl-names = "default";
  1455. reg = <0xc0 0x40080000 0x00 0x1000>;
  1456. status = "okay";
  1457. };
  1458.  
  1459. i2c@84000 {
  1460. clocks = <0x30 0x0c>;
  1461. compatible = "snps,designware-i2c";
  1462. i2c-scl-falling-time-ns = <0x64>;
  1463. i2c-scl-rising-time-ns = <0x41>;
  1464. i2c-sda-hold-time-ns = <0x12c>;
  1465. interrupts = <0x0c 0x04>;
  1466. phandle = <0xc1>;
  1467. reg = <0xc0 0x40084000 0x00 0x1000>;
  1468. status = "disabled";
  1469. };
  1470.  
  1471. i2c@88000 {
  1472. clock-frequency = <0x186a0>;
  1473. clocks = <0x30 0x0c>;
  1474. compatible = "snps,designware-i2c";
  1475. i2c-scl-falling-time-ns = <0x64>;
  1476. i2c-scl-rising-time-ns = <0x41>;
  1477. i2c-sda-hold-time-ns = <0x12c>;
  1478. interrupts = <0x0d 0x04>;
  1479. phandle = <0x66>;
  1480. pinctrl-0 = <0x3f>;
  1481. pinctrl-names = "default";
  1482. reg = <0xc0 0x40088000 0x00 0x1000>;
  1483. status = "okay";
  1484. };
  1485.  
  1486. i2s@a0000 {
  1487. #sound-dai-cells = <0x00>;
  1488. clock-names = "i2sclk";
  1489. clocks = <0x30 0x15>;
  1490. compatible = "snps,designware-i2s";
  1491. dma-names = "tx\0rx";
  1492. dmas = <0x31 0x20 0x31 0x1f>;
  1493. phandle = <0xc3>;
  1494. pinctrl-0 = <0x41>;
  1495. pinctrl-names = "default";
  1496. reg = <0xc0 0x400a0000 0x00 0x1000>;
  1497. status = "disabled";
  1498. };
  1499.  
  1500. i2s@a4000 {
  1501. #sound-dai-cells = <0x00>;
  1502. clock-names = "i2sclk";
  1503. clocks = <0x30 0x15>;
  1504. compatible = "snps,designware-i2s";
  1505. dma-names = "tx\0rx";
  1506. dmas = <0x31 0x22 0x31 0x21>;
  1507. phandle = <0xc4>;
  1508. pinctrl-0 = <0x42>;
  1509. pinctrl-names = "default";
  1510. reg = <0xc0 0x400a4000 0x00 0x1000>;
  1511. status = "disabled";
  1512. };
  1513.  
  1514. i2s@a8000 {
  1515. clocks = <0x30 0x15>;
  1516. compatible = "snps,designware-i2s";
  1517. phandle = <0xc5>;
  1518. reg = <0xc0 0x400a8000 0x00 0x1000>;
  1519. status = "disabled";
  1520. };
  1521.  
  1522. mmc@180000 {
  1523. broken-cd;
  1524. bus-width = <0x04>;
  1525. clock-names = "bus\0core\0timeout\0sdio";
  1526. clocks = <0x30 0x0c 0x44 0x30 0x1f 0x4a>;
  1527. compatible = "raspberrypi,rp1-dwcmshc";
  1528. interrupts = <0x11 0x04>;
  1529. no-1-8-v;
  1530. phandle = <0xec>;
  1531. reg = <0xc0 0x40180000 0x00 0x100>;
  1532. status = "disabled";
  1533. vmmc-supply = <0x45>;
  1534. };
  1535.  
  1536. mmc@184000 {
  1537. broken-cd;
  1538. bus-width = <0x04>;
  1539. clock-names = "bus\0core\0timeout\0sdio";
  1540. clocks = <0x30 0x0c 0x44 0x30 0x1f 0x4b>;
  1541. compatible = "raspberrypi,rp1-dwcmshc";
  1542. interrupts = <0x12 0x04>;
  1543. phandle = <0xed>;
  1544. reg = <0xc0 0x40184000 0x00 0x100>;
  1545. sdhci-caps-mask = <0x03 0x00>;
  1546. status = "disabled";
  1547. vmmc-supply = <0x45>;
  1548. };
  1549.  
  1550. pwm@98000 {
  1551. #pwm-cells = <0x03>;
  1552. assigned-clock-rates = <0x5dc000>;
  1553. assigned-clocks = <0x30 0x11>;
  1554. clocks = <0x30 0x11>;
  1555. compatible = "raspberrypi,rp1-pwm";
  1556. phandle = <0xc2>;
  1557. reg = <0xc0 0x40098000 0x00 0x100>;
  1558. status = "disabled";
  1559. };
  1560.  
  1561. pwm@9c000 {
  1562. #pwm-cells = <0x03>;
  1563. assigned-clock-rates = <0x5dc000>;
  1564. assigned-clocks = <0x30 0x12>;
  1565. clocks = <0x30 0x12>;
  1566. compatible = "raspberrypi,rp1-pwm";
  1567. phandle = <0x60>;
  1568. pinctrl-0 = <0x40>;
  1569. pinctrl-names = "default";
  1570. reg = <0xc0 0x4009c000 0x00 0x100>;
  1571. status = "okay";
  1572. };
  1573.  
  1574. sdio_clk0@b0004 {
  1575. #clock-cells = <0x00>;
  1576. clock-names = "src\0base";
  1577. clocks = <0x43 0x44>;
  1578. compatible = "raspberrypi,rp1-sdio-clk";
  1579. phandle = <0x4a>;
  1580. reg = <0xc0 0x400b0004 0x00 0x1c>;
  1581. status = "disabled";
  1582. };
  1583.  
  1584. sdio_clk1@b4004 {
  1585. #clock-cells = <0x00>;
  1586. clock-names = "src\0base";
  1587. clocks = <0x43 0x44>;
  1588. compatible = "raspberrypi,rp1-sdio-clk";
  1589. phandle = <0x4b>;
  1590. reg = <0xc0 0x400b4004 0x00 0x1c>;
  1591. status = "disabled";
  1592. };
  1593.  
  1594. serial@30000 {
  1595. arm,primecell-periphid = <0x541011>;
  1596. clock-names = "uartclk\0apb_pclk";
  1597. clocks = <0x30 0x0f 0x30 0x06>;
  1598. compatible = "arm,pl011-axi";
  1599. cts-event-workaround;
  1600. dma-names = "tx\0rx";
  1601. dmas = <0x31 0x1a 0x31 0x19>;
  1602. interrupts = <0x19 0x04>;
  1603. phandle = <0x61>;
  1604. pinctrl-0 = <0x32>;
  1605. pinctrl-names = "default";
  1606. reg = <0xc0 0x40030000 0x00 0x100>;
  1607. skip-init;
  1608. status = "disabled";
  1609. uart-has-rtscts;
  1610. };
  1611.  
  1612. serial@34000 {
  1613. arm,primecell-periphid = <0x541011>;
  1614. clock-names = "uartclk\0apb_pclk";
  1615. clocks = <0x30 0x0f 0x30 0x06>;
  1616. compatible = "arm,pl011-axi";
  1617. cts-event-workaround;
  1618. interrupts = <0x2a 0x04>;
  1619. phandle = <0xb0>;
  1620. pinctrl-names = "default";
  1621. reg = <0xc0 0x40034000 0x00 0x100>;
  1622. skip-init;
  1623. status = "disabled";
  1624. uart-has-rtscts;
  1625. };
  1626.  
  1627. serial@38000 {
  1628. arm,primecell-periphid = <0x541011>;
  1629. clock-names = "uartclk\0apb_pclk";
  1630. clocks = <0x30 0x0f 0x30 0x06>;
  1631. compatible = "arm,pl011-axi";
  1632. cts-event-workaround;
  1633. interrupts = <0x2b 0x04>;
  1634. phandle = <0xb1>;
  1635. pinctrl-names = "default";
  1636. reg = <0xc0 0x40038000 0x00 0x100>;
  1637. skip-init;
  1638. status = "disabled";
  1639. uart-has-rtscts;
  1640. };
  1641.  
  1642. serial@3c000 {
  1643. arm,primecell-periphid = <0x541011>;
  1644. clock-names = "uartclk\0apb_pclk";
  1645. clocks = <0x30 0x0f 0x30 0x06>;
  1646. compatible = "arm,pl011-axi";
  1647. cts-event-workaround;
  1648. interrupts = <0x2c 0x04>;
  1649. phandle = <0xb2>;
  1650. pinctrl-names = "default";
  1651. reg = <0xc0 0x4003c000 0x00 0x100>;
  1652. skip-init;
  1653. status = "disabled";
  1654. uart-has-rtscts;
  1655. };
  1656.  
  1657. serial@40000 {
  1658. arm,primecell-periphid = <0x541011>;
  1659. clock-names = "uartclk\0apb_pclk";
  1660. clocks = <0x30 0x0f 0x30 0x06>;
  1661. compatible = "arm,pl011-axi";
  1662. cts-event-workaround;
  1663. interrupts = <0x2d 0x04>;
  1664. phandle = <0xb3>;
  1665. pinctrl-names = "default";
  1666. reg = <0xc0 0x40040000 0x00 0x100>;
  1667. skip-init;
  1668. status = "disabled";
  1669. uart-has-rtscts;
  1670. };
  1671.  
  1672. serial@44000 {
  1673. arm,primecell-periphid = <0x541011>;
  1674. clock-names = "uartclk\0apb_pclk";
  1675. clocks = <0x30 0x0f 0x30 0x06>;
  1676. compatible = "arm,pl011-axi";
  1677. cts-event-workaround;
  1678. interrupts = <0x2e 0x04>;
  1679. phandle = <0xb4>;
  1680. pinctrl-names = "default";
  1681. reg = <0xc0 0x40044000 0x00 0x100>;
  1682. skip-init;
  1683. status = "disabled";
  1684. uart-has-rtscts;
  1685. };
  1686.  
  1687. spi@4c000 {
  1688. #address-cells = <0x01>;
  1689. #size-cells = <0x00>;
  1690. clock-names = "ssi_clk";
  1691. clocks = <0x30 0x0c>;
  1692. compatible = "snps,dw-apb-ssi";
  1693. dma-names = "tx\0rx";
  1694. dmas = <0x31 0x37 0x31 0x36>;
  1695. interrupts = <0x38 0x04>;
  1696. num-cs = <0x02>;
  1697. phandle = <0xb5>;
  1698. reg = <0xc0 0x4004c000 0x00 0x130>;
  1699. status = "disabled";
  1700. };
  1701.  
  1702. spi@50000 {
  1703. #address-cells = <0x01>;
  1704. #size-cells = <0x00>;
  1705. clock-names = "ssi_clk";
  1706. clocks = <0x30 0x0c>;
  1707. compatible = "snps,dw-apb-ssi";
  1708. cs-gpios = <0x35 0x08 0x01 0x35 0x07 0x01>;
  1709. dma-names = "tx\0rx";
  1710. dmas = <0x31 0x0d 0x31 0x0c>;
  1711. interrupts = <0x13 0x04>;
  1712. num-cs = <0x02>;
  1713. phandle = <0x6a>;
  1714. pinctrl-0 = <0x33 0x34>;
  1715. pinctrl-names = "default";
  1716. reg = <0xc0 0x40050000 0x00 0x130>;
  1717. status = "disabled";
  1718.  
  1719. spidev@0 {
  1720. #address-cells = <0x01>;
  1721. #size-cells = <0x00>;
  1722. compatible = "spidev";
  1723. phandle = <0xb6>;
  1724. reg = <0x00>;
  1725. spi-max-frequency = <0x7735940>;
  1726. };
  1727.  
  1728. spidev@1 {
  1729. #address-cells = <0x01>;
  1730. #size-cells = <0x00>;
  1731. compatible = "spidev";
  1732. phandle = <0xb7>;
  1733. reg = <0x01>;
  1734. spi-max-frequency = <0x7735940>;
  1735. };
  1736. };
  1737.  
  1738. spi@54000 {
  1739. #address-cells = <0x01>;
  1740. #size-cells = <0x00>;
  1741. clock-names = "ssi_clk";
  1742. clocks = <0x30 0x0c>;
  1743. compatible = "snps,dw-apb-ssi";
  1744. dma-names = "tx\0rx";
  1745. dmas = <0x31 0x0f 0x31 0x0e>;
  1746. interrupts = <0x14 0x04>;
  1747. num-cs = <0x02>;
  1748. phandle = <0xb8>;
  1749. reg = <0xc0 0x40054000 0x00 0x130>;
  1750. status = "disabled";
  1751. };
  1752.  
  1753. spi@58000 {
  1754. #address-cells = <0x01>;
  1755. #size-cells = <0x00>;
  1756. clock-names = "ssi_clk";
  1757. clocks = <0x30 0x0c>;
  1758. compatible = "snps,dw-apb-ssi";
  1759. dma-names = "tx\0rx";
  1760. dmas = <0x31 0x11 0x31 0x10>;
  1761. interrupts = <0x15 0x04>;
  1762. num-cs = <0x02>;
  1763. phandle = <0xb9>;
  1764. pinctrl-0 = <0x36>;
  1765. pinctrl-names = "default";
  1766. reg = <0xc0 0x40058000 0x00 0x130>;
  1767. status = "disabled";
  1768. };
  1769.  
  1770. spi@5c000 {
  1771. #address-cells = <0x01>;
  1772. #size-cells = <0x00>;
  1773. clock-names = "ssi_clk";
  1774. clocks = <0x30 0x0c>;
  1775. compatible = "snps,dw-apb-ssi";
  1776. dma-names = "tx\0rx";
  1777. dmas = <0x31 0x13 0x31 0x12>;
  1778. interrupts = <0x16 0x04>;
  1779. num-cs = <0x02>;
  1780. phandle = <0xba>;
  1781. pinctrl-0 = <0x37>;
  1782. pinctrl-names = "default";
  1783. reg = <0xc0 0x4005c000 0x00 0x130>;
  1784. status = "disabled";
  1785. };
  1786.  
  1787. spi@60000 {
  1788. #address-cells = <0x00>;
  1789. #size-cells = <0x00>;
  1790. clock-names = "ssi_clk";
  1791. clocks = <0x30 0x0c>;
  1792. compatible = "snps,dw-apb-ssi";
  1793. dma-names = "tx\0rx";
  1794. dmas = <0x31 0x15 0x31 0x14>;
  1795. interrupts = <0x17 0x04>;
  1796. num-cs = <0x01>;
  1797. phandle = <0xbb>;
  1798. pinctrl-0 = <0x38>;
  1799. pinctrl-names = "default";
  1800. reg = <0xc0 0x40060000 0x00 0x130>;
  1801. spi-slave;
  1802. status = "disabled";
  1803.  
  1804. slave {
  1805. compatible = "spidev";
  1806. spi-max-frequency = <0xf4240>;
  1807. };
  1808. };
  1809.  
  1810. spi@64000 {
  1811. #address-cells = <0x01>;
  1812. #size-cells = <0x00>;
  1813. clock-names = "ssi_clk";
  1814. clocks = <0x30 0x0c>;
  1815. compatible = "snps,dw-apb-ssi";
  1816. dma-names = "tx\0rx";
  1817. dmas = <0x31 0x17 0x31 0x16>;
  1818. interrupts = <0x18 0x04>;
  1819. num-cs = <0x02>;
  1820. phandle = <0xbc>;
  1821. pinctrl-0 = <0x39>;
  1822. pinctrl-names = "default";
  1823. reg = <0xc0 0x40064000 0x00 0x130>;
  1824. status = "disabled";
  1825. };
  1826.  
  1827. spi@68000 {
  1828. #address-cells = <0x01>;
  1829. #size-cells = <0x00>;
  1830. clock-names = "ssi_clk";
  1831. clocks = <0x30 0x0c>;
  1832. compatible = "snps,dw-apb-ssi";
  1833. dma-names = "tx\0rx";
  1834. dmas = <0x31 0x33 0x31 0x32>;
  1835. interrupts = <0x36 0x04>;
  1836. num-cs = <0x02>;
  1837. phandle = <0xbd>;
  1838. reg = <0xc0 0x40068000 0x00 0x130>;
  1839. status = "disabled";
  1840. };
  1841.  
  1842. spi@6c000 {
  1843. #address-cells = <0x00>;
  1844. #size-cells = <0x00>;
  1845. clock-names = "ssi_clk";
  1846. clocks = <0x30 0x0c>;
  1847. compatible = "snps,dw-apb-ssi";
  1848. dma-names = "tx\0rx";
  1849. dmas = <0x31 0x35 0x31 0x34>;
  1850. interrupts = <0x37 0x04>;
  1851. num-cs = <0x01>;
  1852. phandle = <0xbe>;
  1853. reg = <0xc0 0x4006c000 0x00 0x130>;
  1854. spi-slave;
  1855. status = "disabled";
  1856.  
  1857. slave {
  1858. compatible = "spidev";
  1859. spi-max-frequency = <0xf4240>;
  1860. };
  1861. };
  1862.  
  1863. usb@200000 {
  1864. compatible = "snps,dwc3";
  1865. dr_mode = "host";
  1866. interrupts = <0x1f 0x01>;
  1867. phandle = <0xee>;
  1868. pinctrl-0 = <0x4c>;
  1869. pinctrl-names = "default";
  1870. reg = <0xc0 0x40200000 0x00 0x100000>;
  1871. snps,axi-pipe-limit = [08];
  1872. snps,dis_rxdet_inp3_quirk;
  1873. snps,parkmode-disable-fsls-quirk;
  1874. snps,parkmode-disable-hs-quirk;
  1875. snps,parkmode-disable-ss-quirk;
  1876. snps,tx-max-burst-prd = <0x08>;
  1877. snps,tx-thr-num-pkt-prd = <0x02>;
  1878. status = "okay";
  1879. usb3-lpm-capable;
  1880. };
  1881.  
  1882. usb@300000 {
  1883. compatible = "snps,dwc3";
  1884. dr_mode = "host";
  1885. interrupts = <0x24 0x01>;
  1886. phandle = <0xef>;
  1887. reg = <0xc0 0x40300000 0x00 0x100000>;
  1888. snps,axi-pipe-limit = [08];
  1889. snps,dis_rxdet_inp3_quirk;
  1890. snps,parkmode-disable-fsls-quirk;
  1891. snps,parkmode-disable-hs-quirk;
  1892. snps,parkmode-disable-ss-quirk;
  1893. snps,tx-max-burst-prd = <0x08>;
  1894. snps,tx-thr-num-pkt-prd = <0x02>;
  1895. status = "okay";
  1896. usb3-lpm-capable;
  1897. };
  1898.  
  1899. vec@144000 {
  1900. assigned-clock-parents = <0x00 0x30 0x02 0x30 0x0b>;
  1901. assigned-clock-rates = <0x46cf7100 0x66ff300 0x66ff300>;
  1902. assigned-clocks = <0x30 0x02 0x30 0x0b 0x30 0x27>;
  1903. clocks = <0x30 0x27>;
  1904. compatible = "raspberrypi,rp1vec";
  1905. interrupts = <0x31 0x04>;
  1906. iommus = <0x49>;
  1907. phandle = <0xf2>;
  1908. reg = <0xc0 0x40144000 0x00 0x1000 0xc0 0x40140000 0x00 0x1000>;
  1909. status = "disabled";
  1910. };
  1911. };
  1912. };
  1913.  
  1914. pisp_be@880000 {
  1915. clocks = <0x0a 0x07>;
  1916. clocks-names = "isp_be";
  1917. compatible = "raspberrypi,pispbe";
  1918. interrupts = <0x00 0x48 0x04>;
  1919. iommus = <0x52>;
  1920. phandle = <0xfa>;
  1921. reg = <0x10 0x880000 0x00 0x4000>;
  1922. status = "okay";
  1923. };
  1924.  
  1925. reset-controller@119500 {
  1926. #reset-cells = <0x00>;
  1927. compatible = "brcm,bcm7216-pcie-sata-rescal";
  1928. phandle = <0x2a>;
  1929. reg = <0x10 0x119500 0x00 0x10>;
  1930. };
  1931.  
  1932. reset-controller@1504318 {
  1933. #reset-cells = <0x01>;
  1934. compatible = "brcm,brcmstb-reset";
  1935. phandle = <0x29>;
  1936. reg = <0x10 0x1504318 0x00 0x30>;
  1937. };
  1938.  
  1939. syscon@400018 {
  1940. compatible = "brcm,syscon-piarbctl\0syscon\0simple-mfd";
  1941. phandle = <0xf4>;
  1942. reg = <0x10 0x400018 0x00 0x18>;
  1943. };
  1944.  
  1945. usb@480000 {
  1946. #address-cells = <0x01>;
  1947. #size-cells = <0x00>;
  1948. clock-names = "otg";
  1949. clocks = <0x4f>;
  1950. compatible = "brcm,bcm2835-usb";
  1951. interrupts = <0x00 0x49 0x04>;
  1952. phandle = <0xf5>;
  1953. phy-names = "usb2-phy";
  1954. phys = <0x50>;
  1955. power-domains = <0x51 0x06>;
  1956. reg = <0x10 0x480000 0x00 0x10000>;
  1957. status = "disabled";
  1958. };
  1959.  
  1960. v3d@2000000 {
  1961. clocks = <0x0a 0x05>;
  1962. clocks-names = "v3d";
  1963. compatible = "brcm,2712-v3d";
  1964. interrupts = <0x00 0xfa 0x04 0x00 0xf9 0x04>;
  1965. phandle = <0xf9>;
  1966. power-domains = <0x5b 0x01>;
  1967. reg = <0x10 0x2000000 0x00 0x4000 0x10 0x2008000 0x00 0x6000>;
  1968. reg-names = "hub\0core0";
  1969. resets = <0x5b 0x00>;
  1970. status = "disabled";
  1971. };
  1972.  
  1973. vc_mem {
  1974. reg = <0x3fc00000 0x40000000 0xc0000000>;
  1975. };
  1976. };
  1977.  
  1978. cam0_clk {
  1979. #clock-cells = <0x00>;
  1980. compatible = "fixed-clock";
  1981. phandle = <0xfe>;
  1982. status = "disabled";
  1983. };
  1984.  
  1985. cam0_reg {
  1986. compatible = "regulator-fixed";
  1987. enable-active-high;
  1988. gpio = <0x35 0x22 0x00>;
  1989. phandle = <0xff>;
  1990. regulator-name = "cam0_reg";
  1991. status = "okay";
  1992. };
  1993.  
  1994. cam1_clk {
  1995. #clock-cells = <0x00>;
  1996. compatible = "fixed-clock";
  1997. phandle = <0xfd>;
  1998. status = "disabled";
  1999. };
  2000.  
  2001. cam1_reg {
  2002. compatible = "regulator-fixed";
  2003. enable-active-high;
  2004. gpio = <0x35 0x2e 0x00>;
  2005. phandle = <0x100>;
  2006. regulator-name = "cam1_reg";
  2007. status = "okay";
  2008. };
  2009.  
  2010. cam_dummy_reg {
  2011. compatible = "regulator-fixed";
  2012. phandle = <0x101>;
  2013. regulator-name = "cam-dummy-reg";
  2014. status = "okay";
  2015. };
  2016.  
  2017. chosen {
  2018. bootargs = "reboot=w coherent_pool=1M 8250.nr_uarts=1 pci=pcie_bus_safe snd_bcm2835.enable_compat_alsa=0 snd_bcm2835.enable_hdmi=1 bcm2708_fb.fbwidth=640 bcm2708_fb.fbheight=480 bcm2708_fb.fbdepth=16 bcm2708_fb.fbswap=1 smsc95xx.macaddr=2C:CF:67:0E:C9:92 vc_mem.mem_base=0x3fc00000 vc_mem.mem_size=0x40000000 console=ttyAMA10,115200 console=tty1 loglevel=1 root=LABEL=armbi_root rootfstype=ext4 fsck.repair=yes rootwait logo.nologo cgroup_enable=cpuset cgroup_memory=1 cgroup_enable=memory";
  2019. kaslr-seed = <0x00 0x00>;
  2020. linux,initrd-end = <0x2efff61a>;
  2021. linux,initrd-start = <0x2dd29000>;
  2022. log = <0x3ff16000 0x80000>;
  2023. os_prefix = [00];
  2024. overlay_prefix = "slot-A/overlays/";
  2025. phandle = <0x105>;
  2026. rpi-boardrev-ext = <0x00>;
  2027. rpi-duid = "1000911004993312";
  2028. stdout-path = "serial10:115200n8";
  2029.  
  2030. bootloader {
  2031. boot-mode = <0x01>;
  2032. build-timestamp = <0x65cf7f29>;
  2033. capabilities = <0x7f>;
  2034. partition = <0x00>;
  2035. rsts = <0x20>;
  2036. tryboot = <0x00>;
  2037. update-timestamp = <0x65faecb7>;
  2038. version = "4c845bd37c8a7c7ff79173cdc50dd3facf63996f";
  2039. };
  2040.  
  2041. power {
  2042. max_current = <0x1388>;
  2043. power_reset = <0x00>;
  2044. rpi_power_supply = <0x2e8a 0xf0000>;
  2045. usb_max_current_enable = <0x01>;
  2046. usb_over_current_detected = <0x00>;
  2047. usbpd_power_data_objects = <0xa0191f4 0x2d12c 0x3c0e1 0x4b0b4 0x00 0x00 0x00>;
  2048. };
  2049. };
  2050.  
  2051. clk-108M {
  2052. #clock-cells = <0x00>;
  2053. clock-frequency = <0x66ff300>;
  2054. clock-output-names = "108MHz-clock";
  2055. compatible = "fixed-clock";
  2056. phandle = <0x0d>;
  2057. };
  2058.  
  2059. clk-27M {
  2060. #clock-cells = <0x00>;
  2061. clock-frequency = <0x19bfcc0>;
  2062. clock-output-names = "27MHz-clock";
  2063. compatible = "fixed-clock";
  2064. phandle = <0x1b>;
  2065. };
  2066.  
  2067. clocks {
  2068. phandle = <0xfb>;
  2069.  
  2070. clk-osc {
  2071. #clock-cells = <0x00>;
  2072. clock-frequency = <0x337f980>;
  2073. clock-output-names = "osc";
  2074. compatible = "fixed-clock";
  2075. phandle = <0x15>;
  2076. };
  2077.  
  2078. clk-usb {
  2079. #clock-cells = <0x00>;
  2080. clock-frequency = <0x1c9c3800>;
  2081. clock-output-names = "otg";
  2082. compatible = "fixed-clock";
  2083. phandle = <0x4f>;
  2084. };
  2085.  
  2086. clk_emmc2 {
  2087. #clock-cells = <0x00>;
  2088. clock-frequency = <0x337f980>;
  2089. clock-output-names = "emmc2-clock";
  2090. compatible = "fixed-clock";
  2091. phandle = <0x53>;
  2092. };
  2093.  
  2094. clk_uart {
  2095. #clock-cells = <0x00>;
  2096. clock-frequency = <0x2a30000>;
  2097. clock-output-names = "uart-clock";
  2098. compatible = "fixed-clock";
  2099. phandle = <0x0e>;
  2100. };
  2101.  
  2102. clk_vpu {
  2103. #clock-cells = <0x00>;
  2104. clock-frequency = <0x2cb41780>;
  2105. clock-output-names = "vpu-clock";
  2106. compatible = "fixed-clock";
  2107. phandle = <0x0f>;
  2108. };
  2109.  
  2110. clk_xosc {
  2111. #clock-cells = <0x00>;
  2112. clock-frequency = <0x2faf080>;
  2113. clock-output-names = "xosc";
  2114. compatible = "fixed-clock";
  2115. phandle = <0x2f>;
  2116. };
  2117.  
  2118. clksrc_mipi0_dsi_byteclk {
  2119. #clock-cells = <0x00>;
  2120. clock-frequency = <0x44aa200>;
  2121. clock-output-names = "clksrc_mipi0_dsi_byteclk";
  2122. compatible = "fixed-clock";
  2123. phandle = <0x4d>;
  2124. };
  2125.  
  2126. clksrc_mipi1_dsi_byteclk {
  2127. #clock-cells = <0x00>;
  2128. clock-frequency = <0x44aa200>;
  2129. clock-output-names = "clksrc_mipi1_dsi_byteclk";
  2130. compatible = "fixed-clock";
  2131. phandle = <0x4e>;
  2132. };
  2133.  
  2134. macb_hclk {
  2135. #clock-cells = <0x00>;
  2136. clock-frequency = <0xbebc200>;
  2137. clock-output-names = "hclk";
  2138. compatible = "fixed-clock";
  2139. phandle = <0x47>;
  2140. };
  2141.  
  2142. macb_pclk {
  2143. #clock-cells = <0x00>;
  2144. clock-frequency = <0xbebc200>;
  2145. clock-output-names = "pclk";
  2146. compatible = "fixed-clock";
  2147. phandle = <0x46>;
  2148. };
  2149.  
  2150. sdhci_core {
  2151. #clock-cells = <0x00>;
  2152. clock-frequency = <0x2faf080>;
  2153. clock-output-names = "core";
  2154. compatible = "fixed-clock";
  2155. phandle = <0x44>;
  2156. };
  2157.  
  2158. sdio_src {
  2159. #clock-cells = <0x00>;
  2160. clock-frequency = <0x3b9aca00>;
  2161. clock-output-names = "src";
  2162. compatible = "fixed-clock";
  2163. phandle = <0x43>;
  2164. };
  2165. };
  2166.  
  2167. cooling_fan {
  2168. #cooling-cells = <0x02>;
  2169. compatible = "pwm-fan";
  2170. cooling-levels = <0x00 0x4b 0x7d 0xaf 0xfa>;
  2171. cooling-max-state = <0x03>;
  2172. cooling-min-state = <0x00>;
  2173. phandle = <0x04>;
  2174. pwms = <0x60 0x03 0xa25e 0x01>;
  2175. rpm-offset = <0x3c>;
  2176. rpm-regmap = <0x60>;
  2177. status = "okay";
  2178. };
  2179.  
  2180. cpus {
  2181. #address-cells = <0x01>;
  2182. #size-cells = <0x00>;
  2183. enable-method = "brcm,bcm2836-smp";
  2184. phandle = <0xaa>;
  2185.  
  2186. cpu@0 {
  2187. compatible = "arm,cortex-a76";
  2188. device_type = "cpu";
  2189. enable-method = "psci";
  2190. next-level-cache = <0x26>;
  2191. phandle = <0x22>;
  2192. reg = <0x00>;
  2193. };
  2194.  
  2195. cpu@1 {
  2196. compatible = "arm,cortex-a76";
  2197. device_type = "cpu";
  2198. enable-method = "psci";
  2199. next-level-cache = <0x26>;
  2200. phandle = <0x23>;
  2201. reg = <0x100>;
  2202. };
  2203.  
  2204. cpu@2 {
  2205. compatible = "arm,cortex-a76";
  2206. device_type = "cpu";
  2207. enable-method = "psci";
  2208. next-level-cache = <0x26>;
  2209. phandle = <0x24>;
  2210. reg = <0x200>;
  2211. };
  2212.  
  2213. cpu@3 {
  2214. compatible = "arm,cortex-a76";
  2215. device_type = "cpu";
  2216. enable-method = "psci";
  2217. next-level-cache = <0x26>;
  2218. phandle = <0x25>;
  2219. reg = <0x300>;
  2220. };
  2221.  
  2222. l2-cache {
  2223. compatible = "cache";
  2224. next-level-cache = <0x27>;
  2225. phandle = <0x26>;
  2226. };
  2227.  
  2228. l3-cache {
  2229. compatible = "cache";
  2230. phandle = <0x27>;
  2231. };
  2232. };
  2233.  
  2234. dummy {
  2235. phandle = <0x102>;
  2236. };
  2237.  
  2238. hvs@107c580000 {
  2239. clock-names = "core\0disp";
  2240. clocks = <0x0a 0x04 0x0a 0x10>;
  2241. compatible = "brcm,bcm2712-hvs";
  2242. interrupt-names = "ch0-eof\0ch1-eof\0ch2-eof";
  2243. interrupt-parent = <0x09>;
  2244. interrupts = <0x02 0x09 0x10>;
  2245. phandle = <0x75>;
  2246. reg = <0x10 0x7c580000 0x1a000>;
  2247. status = "disabled";
  2248. };
  2249.  
  2250. i2c0if {
  2251. phandle = <0x103>;
  2252. };
  2253.  
  2254. i2c0mux {
  2255. phandle = <0x104>;
  2256. };
  2257.  
  2258. leds {
  2259. compatible = "gpio-leds";
  2260. phandle = <0xfc>;
  2261.  
  2262. led-act {
  2263. default-state = "off";
  2264. gpios = <0x58 0x09 0x01>;
  2265. label = "ACT";
  2266. linux,default-trigger = "mmc0";
  2267. phandle = <0x6c>;
  2268. };
  2269.  
  2270. led-pwr {
  2271. default-state = "off";
  2272. gpios = <0x35 0x2c 0x01>;
  2273. label = "PWR";
  2274. linux,default-trigger = "none";
  2275. phandle = <0x6d>;
  2276. };
  2277. };
  2278.  
  2279. memory@0 {
  2280. device_type = "memory";
  2281. reg = <0x00 0x00 0x3fc00000 0x00 0x40000000 0xc0000000 0x01 0x00 0x80000000 0x01 0x80000000 0x80000000>;
  2282. };
  2283.  
  2284. phy {
  2285. #phy-cells = <0x00>;
  2286. compatible = "usb-nop-xceiv";
  2287. phandle = <0x50>;
  2288. };
  2289.  
  2290. psci {
  2291. compatible = "arm,psci-1.0\0arm,psci-0.2\0arm,psci";
  2292. cpu_off = <0x84000002>;
  2293. cpu_on = <0xc4000003>;
  2294. cpu_suspend = <0xc4000001>;
  2295. method = "smc";
  2296. };
  2297.  
  2298. pwr_button {
  2299. compatible = "gpio-keys";
  2300. pinctrl-0 = <0x6e>;
  2301. pinctrl-names = "default";
  2302. status = "okay";
  2303.  
  2304. pwr {
  2305. debounce-interval = <0x32>;
  2306. gpios = <0x11 0x14 0x01>;
  2307. label = "pwr_button";
  2308. linux,code = <0x74>;
  2309. phandle = <0x5f>;
  2310. };
  2311. };
  2312.  
  2313. reserved-memory {
  2314. #address-cells = <0x02>;
  2315. #size-cells = <0x01>;
  2316. phandle = <0x6f>;
  2317. ranges;
  2318.  
  2319. atf@0 {
  2320. no-map;
  2321. reg = <0x00 0x00 0x80000>;
  2322. };
  2323.  
  2324. linux,cma {
  2325. alloc-ranges = <0x00 0x00 0x40000000>;
  2326. compatible = "shared-dma-pool";
  2327. linux,cma-default;
  2328. phandle = <0x70>;
  2329. reusable;
  2330. size = <0x4000000>;
  2331. };
  2332.  
  2333. nvram@0 {
  2334. #address-cells = <0x01>;
  2335. #size-cells = <0x01>;
  2336. compatible = "raspberrypi,bootloader-config\0nvmem-rmem";
  2337. no-map;
  2338. phandle = <0x71>;
  2339. reg = <0x00 0x3fd16620 0x38>;
  2340. status = "okay";
  2341. };
  2342. };
  2343.  
  2344. rp1_vdd_3v3 {
  2345. compatible = "regulator-fixed";
  2346. phandle = <0x45>;
  2347. regulator-always-on;
  2348. regulator-max-microvolt = <0x325aa0>;
  2349. regulator-min-microvolt = <0x325aa0>;
  2350. regulator-name = "vdd-3v3";
  2351. };
  2352.  
  2353. sd_io_1v8_reg {
  2354. compatible = "regulator-gpio";
  2355. gpios = <0x58 0x03 0x00>;
  2356. phandle = <0x56>;
  2357. regulator-always-on;
  2358. regulator-boot-on;
  2359. regulator-max-microvolt = <0x325aa0>;
  2360. regulator-min-microvolt = <0x1b7740>;
  2361. regulator-name = "vdd-sd-io";
  2362. regulator-settling-time-us = <0x1388>;
  2363. states = <0x1b7740 0x01 0x325aa0 0x00>;
  2364. status = "okay";
  2365. };
  2366.  
  2367. sd_vcc_reg {
  2368. compatible = "regulator-fixed";
  2369. enable-active-high;
  2370. gpios = <0x58 0x04 0x00>;
  2371. phandle = <0x57>;
  2372. regulator-boot-on;
  2373. regulator-max-microvolt = <0x325aa0>;
  2374. regulator-min-microvolt = <0x325aa0>;
  2375. regulator-name = "vcc-sd";
  2376. status = "okay";
  2377. };
  2378.  
  2379. soc {
  2380. #address-cells = <0x01>;
  2381. #size-cells = <0x01>;
  2382. compatible = "simple-bus";
  2383. dma-ranges = <0xc0000000 0x00 0x00 0x40000000 0x7c000000 0x10 0x7c000000 0x4000000>;
  2384. phandle = <0x76>;
  2385. ranges = <0x7c000000 0x10 0x7c000000 0x4000000>;
  2386.  
  2387. _i2s@7d003000 {
  2388. compatible = "brcm,bcm2835-i2s";
  2389. phandle = <0x82>;
  2390. reg = <0x7d003000 0x24>;
  2391. status = "disabled";
  2392. };
  2393.  
  2394. avs-monitor@7d542000 {
  2395. compatible = "brcm,bcm2711-avs-monitor\0syscon\0simple-mfd";
  2396. phandle = <0xa0>;
  2397. reg = <0x7d542000 0xf00>;
  2398. status = "okay";
  2399.  
  2400. thermal {
  2401. #thermal-sensor-cells = <0x00>;
  2402. compatible = "brcm,bcm2711-thermal";
  2403. phandle = <0x02>;
  2404. };
  2405. };
  2406.  
  2407. axiperf {
  2408. compatible = "brcm,bcm2712-axiperf";
  2409. firmware = <0x0c>;
  2410. phandle = <0x5d>;
  2411. reg = <0x7c012800 0x100 0x7e000000 0x100>;
  2412. status = "disabled";
  2413. };
  2414.  
  2415. clock@7c700000 {
  2416. #clock-cells = <0x01>;
  2417. #reset-cells = <0x01>;
  2418. clocks = <0x0d>;
  2419. compatible = "brcm,brcm2711-dvp";
  2420. phandle = <0x1d>;
  2421. reg = <0x7c700000 0x10>;
  2422. };
  2423.  
  2424. cprman@7d202000 {
  2425. #clock-cells = <0x01>;
  2426. clocks = <0x15>;
  2427. compatible = "brcm,bcm2711-cprman";
  2428. phandle = <0x91>;
  2429. reg = "} \0\0\0 ";
  2430. status = "disabled";
  2431. };
  2432.  
  2433. fb {
  2434. compatible = "brcm,bcm2708-fb";
  2435. firmware = <0x0c>;
  2436. phandle = <0xa7>;
  2437. status = "okay";
  2438. };
  2439.  
  2440. firmware {
  2441. #address-cells = <0x01>;
  2442. #size-cells = <0x01>;
  2443. compatible = "raspberrypi,bcm2835-firmware\0simple-mfd";
  2444. dma-ranges;
  2445. mboxes = <0x21>;
  2446. phandle = <0x0c>;
  2447.  
  2448. clocks {
  2449. #clock-cells = <0x01>;
  2450. compatible = "raspberrypi,firmware-clocks";
  2451. phandle = <0x0a>;
  2452. };
  2453.  
  2454. reset {
  2455. #reset-cells = <0x01>;
  2456. compatible = "raspberrypi,firmware-reset";
  2457. phandle = <0xa5>;
  2458. };
  2459.  
  2460. vcio {
  2461. compatible = "raspberrypi,vcio";
  2462. phandle = <0xa6>;
  2463. };
  2464. };
  2465.  
  2466. firmwarekms@7d503000 {
  2467. brcm,firmware = <0x0c>;
  2468. compatible = "raspberrypi,rpi-firmware-kms-2712";
  2469. interrupt-parent = <0x0b>;
  2470. interrupts = <0x13>;
  2471. phandle = <0x78>;
  2472. reg = <0x7d503000 0x18>;
  2473. status = "disabled";
  2474. };
  2475.  
  2476. fixedregulator_3v3 {
  2477. compatible = "regulator-fixed";
  2478. phandle = <0xa8>;
  2479. regulator-always-on;
  2480. regulator-max-microvolt = <0x325aa0>;
  2481. regulator-min-microvolt = <0x325aa0>;
  2482. regulator-name = "3v3";
  2483. };
  2484.  
  2485. fixedregulator_5v0 {
  2486. compatible = "regulator-fixed";
  2487. phandle = <0xa9>;
  2488. regulator-always-on;
  2489. regulator-max-microvolt = <0x4c4b40>;
  2490. regulator-min-microvolt = <0x4c4b40>;
  2491. regulator-name = "5v0";
  2492. };
  2493.  
  2494. gpio@7d508500 {
  2495. #gpio-cells = <0x02>;
  2496. #interrupt-cells = <0x02>;
  2497. brcm,gpio-bank-widths = <0x20 0x04>;
  2498. brcm,gpio-direct;
  2499. compatible = "brcm,brcmstb-gpio";
  2500. gpio-controller;
  2501. gpio-line-names = "-\02712_BOOT_CS_N\02712_BOOT_MISO\02712_BOOT_MOSI\02712_BOOT_SCLK\0-\0-\0-\0-\0-\0-\0-\0-\0-\0PCIE_SDA\0PCIE_SCL\0-\0-\0-\0-\0PWR_GPIO\02712_G21_FS\0-\0-\0BT_RTS\0BT_CTS\0BT_TXD\0BT_RXD\0WL_ON\0BT_ON\0WIFI_SDIO_CLK\0WIFI_SDIO_CMD\0WIFI_SDIO_D0\0WIFI_SDIO_D1\0WIFI_SDIO_D2\0WIFI_SDIO_D3";
  2502. interrupt-controller;
  2503. interrupt-parent = <0x17>;
  2504. interrupts = <0x00>;
  2505. phandle = <0x11>;
  2506. reg = <0x7d508500 0x40>;
  2507. };
  2508.  
  2509. gpio@7d517c00 {
  2510. #gpio-cells = <0x02>;
  2511. #interrupt-cells = <0x02>;
  2512. brcm,gpio-bank-widths = <0x11 0x06>;
  2513. brcm,gpio-direct;
  2514. compatible = "brcm,brcmstb-gpio";
  2515. gpio-controller;
  2516. gpio-line-names = "RP1_SDA\0RP1_SCL\0RP1_RUN\0SD_IOVDD_SEL\0SD_PWR_ON\0SD_CDET_N\0SD_FLG_N\0-\02712_WAKE\02712_STAT_LED\0-\0-\0PMIC_INT\0UART_TX_FS\0UART_RX_FS\0-\0-\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0HDMI0_SCL\0HDMI0_SDA\0HDMI1_SCL\0HDMI1_SDA\0PMIC_SCL\0PMIC_SDA";
  2517. interrupt-parent = <0x1c>;
  2518. interrupts = <0x00>;
  2519. phandle = <0x58>;
  2520. reg = <0x7d517c00 0x40>;
  2521.  
  2522. rp1_run_hog {
  2523. gpio-hog;
  2524. gpios = <0x02 0x00>;
  2525. line-name = "RP1 RUN pin";
  2526. output-high;
  2527. };
  2528. };
  2529.  
  2530. gpiomem@7d504100 {
  2531. chardev-name = "gpiomem3";
  2532. compatible = "raspberrypi,gpiomem";
  2533. reg = <0x7d504100 0x20>;
  2534. };
  2535.  
  2536. gpiomem@7d508500 {
  2537. chardev-name = "gpiomem1";
  2538. compatible = "raspberrypi,gpiomem";
  2539. reg = <0x7d508500 0x40>;
  2540. };
  2541.  
  2542. gpiomem@7d510700 {
  2543. chardev-name = "gpiomem4";
  2544. compatible = "raspberrypi,gpiomem";
  2545. reg = <0x7d510700 0x20>;
  2546. };
  2547.  
  2548. gpiomem@7d517c00 {
  2549. chardev-name = "gpiomem2";
  2550. compatible = "raspberrypi,gpiomem";
  2551. reg = <0x7d517c00 0x40>;
  2552. };
  2553.  
  2554. hdmi@7ef00700 {
  2555. clock-names = "hdmi\0bvb\0audio\0cec";
  2556. clocks = <0x0a 0x0d 0x0a 0x0e 0x1d 0x00 0x1b>;
  2557. compatible = "brcm,bcm2712-hdmi0";
  2558. ddc = <0x1f>;
  2559. dma-names = "audio-rx";
  2560. dmas = <0x10 0x41fa000a>;
  2561. interrupt-names = "cec-tx\0cec-rx\0cec-low\0hpd-connected\0hpd-removed";
  2562. interrupt-parent = <0x1e>;
  2563. interrupts = <0x01 0x02 0x03 0x07 0x08>;
  2564. phandle = <0xa2>;
  2565. reg = <0x7c701400 0x300 0x7c701000 0x200 0x7c701d00 0x300 0x7c702000 0x80 0x7c703800 0x200 0x7c704000 0x800 0x7c700100 0x80 0x7d510800 0x100 0x7c720000 0x100>;
  2566. reg-names = "hdmi\0dvp\0phy\0rm\0packet\0metadata\0csc\0cec\0hd";
  2567. resets = <0x1d 0x01>;
  2568. status = "disabled";
  2569. };
  2570.  
  2571. hdmi@7ef05700 {
  2572. clock-names = "hdmi\0bvb\0audio\0cec";
  2573. clocks = <0x0a 0x0d 0x0a 0x0e 0x1d 0x01 0x1b>;
  2574. compatible = "brcm,bcm2712-hdmi1";
  2575. ddc = <0x20>;
  2576. dma-names = "audio-rx";
  2577. dmas = <0x10 0x41fa0011>;
  2578. interrupt-names = "cec-tx\0cec-rx\0cec-low\0hpd-connected\0hpd-removed";
  2579. interrupt-parent = <0x1e>;
  2580. interrupts = <0x0b 0x0c 0x0d 0x0e 0x0f>;
  2581. phandle = <0xa3>;
  2582. reg = <0x7c706400 0x300 0x7c706000 0x200 0x7c706d00 0x300 0x7c707000 0x80 0x7c708800 0x200 0x7c709000 0x800 0x7c700180 0x80 0x7d511000 0x100 0x7c720000 0x100>;
  2583. reg-names = "hdmi\0dvp\0phy\0rm\0packet\0metadata\0csc\0cec\0hd";
  2584. resets = <0x1d 0x02>;
  2585. status = "disabled";
  2586. };
  2587.  
  2588. i2c@7d005000 {
  2589. #address-cells = <0x01>;
  2590. #size-cells = <0x00>;
  2591. clocks = <0x0f>;
  2592. compatible = "brcm,bcm2711-i2c\0brcm,bcm2835-i2c";
  2593. interrupts = <0x00 0x75 0x04>;
  2594. phandle = <0x89>;
  2595. reg = <0x7d005000 0x20>;
  2596. status = "disabled";
  2597. };
  2598.  
  2599. i2c@7d005600 {
  2600. #address-cells = <0x01>;
  2601. #size-cells = <0x00>;
  2602. clock-frequency = <0x61a80>;
  2603. clocks = <0x0f>;
  2604. compatible = "brcm,bcm2711-i2c\0brcm,bcm2835-i2c";
  2605. interrupts = <0x00 0x75 0x04>;
  2606. phandle = <0x8a>;
  2607. pinctrl-0 = <0x14>;
  2608. pinctrl-names = "default";
  2609. reg = <0x7d005600 0x20>;
  2610. status = "disabled";
  2611. };
  2612.  
  2613. i2c@7d005800 {
  2614. #address-cells = <0x01>;
  2615. #size-cells = <0x00>;
  2616. clocks = <0x0f>;
  2617. compatible = "brcm,bcm2711-i2c\0brcm,bcm2835-i2c";
  2618. interrupts = <0x00 0x75 0x04>;
  2619. phandle = <0x8b>;
  2620. reg = <0x7d005800 0x20>;
  2621. status = "disabled";
  2622. };
  2623.  
  2624. i2c@7d005a00 {
  2625. #address-cells = <0x01>;
  2626. #size-cells = <0x00>;
  2627. clocks = <0x0f>;
  2628. compatible = "brcm,bcm2711-i2c\0brcm,bcm2835-i2c";
  2629. interrupts = <0x00 0x75 0x04>;
  2630. phandle = <0x8c>;
  2631. reg = <0x7d005a00 0x20>;
  2632. status = "disabled";
  2633. };
  2634.  
  2635. i2c@7d005c00 {
  2636. #address-cells = <0x01>;
  2637. #size-cells = <0x00>;
  2638. clocks = <0x0f>;
  2639. compatible = "brcm,bcm2711-i2c\0brcm,bcm2835-i2c";
  2640. interrupts = <0x00 0x75 0x04>;
  2641. phandle = <0x8d>;
  2642. reg = <0x7d005c00 0x20>;
  2643. status = "disabled";
  2644. };
  2645.  
  2646. i2c@7d005e00 {
  2647. #address-cells = <0x01>;
  2648. #size-cells = <0x00>;
  2649. clocks = <0x0f>;
  2650. compatible = "brcm,bcm2711-i2c\0brcm,bcm2835-i2c";
  2651. interrupts = <0x00 0x75 0x04>;
  2652. phandle = <0x8e>;
  2653. reg = <0x7d005e00 0x20>;
  2654. status = "disabled";
  2655. };
  2656.  
  2657. i2c@7d508200 {
  2658. #address-cells = <0x01>;
  2659. #size-cells = <0x00>;
  2660. clock-frequency = <0x17cdc>;
  2661. compatible = "brcm,brcmstb-i2c";
  2662. interrupt-parent = <0x16>;
  2663. interrupts = <0x01>;
  2664. phandle = <0x1f>;
  2665. reg = <0x7d508200 0x58>;
  2666. status = "disabled";
  2667. };
  2668.  
  2669. i2c@7d508280 {
  2670. #address-cells = <0x01>;
  2671. #size-cells = <0x00>;
  2672. clock-frequency = <0x17cdc>;
  2673. compatible = "brcm,brcmstb-i2c";
  2674. interrupt-parent = <0x16>;
  2675. interrupts = <0x02>;
  2676. phandle = <0x20>;
  2677. reg = <0x7d508280 0x58>;
  2678. status = "disabled";
  2679. };
  2680.  
  2681. i2c@7d508300 {
  2682. #address-cells = <0x01>;
  2683. #size-cells = <0x00>;
  2684. clock-frequency = <0x30d40>;
  2685. compatible = "brcm,brcmstb-i2c";
  2686. interrupt-parent = <0x16>;
  2687. interrupts = <0x00>;
  2688. phandle = <0x93>;
  2689. reg = <0x7d508300 0x58>;
  2690. status = "disabled";
  2691. };
  2692.  
  2693. i2c@7d517a00 {
  2694. #address-cells = <0x01>;
  2695. #size-cells = <0x00>;
  2696. clock-frequency = <0x30d40>;
  2697. compatible = "brcm,brcmstb-i2c";
  2698. interrupt-parent = <0x1a>;
  2699. interrupts = <0x00>;
  2700. phandle = <0x9e>;
  2701. reg = <0x7d517a00 0x58>;
  2702. status = "disabled";
  2703. };
  2704.  
  2705. i2c@7d544000 {
  2706. clock-frequency = <0x30d40>;
  2707. compatible = "brcm,brcmstb-i2c";
  2708. interrupt-parent = <0x1a>;
  2709. interrupts = <0x01>;
  2710. phandle = <0xa1>;
  2711. reg = <0x7d544000 0x58>;
  2712. status = "disabled";
  2713. };
  2714.  
  2715. intc@7d503000 {
  2716. #interrupt-cells = <0x01>;
  2717. compatible = "brcm,l2-intc";
  2718. interrupt-controller;
  2719. interrupts = <0x00 0xee 0x04>;
  2720. phandle = <0x0b>;
  2721. reg = <0x7d503000 0x18>;
  2722. };
  2723.  
  2724. intc@7d508380 {
  2725. #interrupt-cells = <0x01>;
  2726. compatible = "brcm,bcm7271-l2-intc";
  2727. interrupt-controller;
  2728. interrupts = <0x00 0xf2 0x04>;
  2729. phandle = <0x16>;
  2730. reg = <0x7d508380 0x10>;
  2731. };
  2732.  
  2733. intc@7d508400 {
  2734. #interrupt-cells = <0x01>;
  2735. compatible = "brcm,bcm7271-l2-intc";
  2736. interrupt-controller;
  2737. interrupts = <0x00 0xf4 0x04>;
  2738. phandle = <0x17>;
  2739. reg = <0x7d508400 0x10>;
  2740. };
  2741.  
  2742. intc@7d517000 {
  2743. #interrupt-cells = <0x01>;
  2744. compatible = "brcm,bcm7271-l2-intc";
  2745. interrupt-controller;
  2746. interrupts = <0x00 0xf7 0x04>;
  2747. reg = <0x7d517000 0x10>;
  2748. status = "disabled";
  2749. };
  2750.  
  2751. intc@7d517ac0 {
  2752. #interrupt-cells = <0x01>;
  2753. compatible = "brcm,bcm7271-l2-intc";
  2754. interrupt-controller;
  2755. interrupts = <0x00 0xf5 0x04>;
  2756. phandle = <0x1c>;
  2757. reg = <0x7d517ac0 0x10>;
  2758. status = "disabled";
  2759. };
  2760.  
  2761. intc@7d517b00 {
  2762. #interrupt-cells = <0x01>;
  2763. compatible = "brcm,bcm7271-l2-intc";
  2764. interrupt-controller;
  2765. interrupts = <0x00 0xf3 0x04>;
  2766. phandle = <0x1a>;
  2767. reg = <0x7d517b00 0x10>;
  2768. };
  2769.  
  2770. interrupt-controller@7c502000 {
  2771. #interrupt-cells = <0x01>;
  2772. compatible = "brcm,bcm2711-l2-intc\0brcm,l2-intc";
  2773. interrupt-controller;
  2774. interrupts = <0x00 0x61 0x04>;
  2775. phandle = <0x09>;
  2776. reg = <0x7c502000 0x30>;
  2777. status = "disabled";
  2778. };
  2779.  
  2780. interrupt-controller@7d510600 {
  2781. #interrupt-cells = <0x01>;
  2782. compatible = "brcm,bcm2711-l2-intc\0brcm,l2-intc";
  2783. interrupt-controller;
  2784. interrupts = <0x00 0xef 0x04>;
  2785. phandle = <0x1e>;
  2786. reg = <0x7d510600 0x30>;
  2787. status = "disabled";
  2788. };
  2789.  
  2790. local_intc@7cd00000 {
  2791. compatible = "brcm,bcm2836-l1-intc";
  2792. phandle = <0x7d>;
  2793. reg = <0x7cd00000 0x100>;
  2794. };
  2795.  
  2796. mailbox@7c013880 {
  2797. #mbox-cells = <0x00>;
  2798. compatible = "brcm,bcm2835-mbox";
  2799. interrupts = <0x00 0x21 0x04>;
  2800. phandle = <0x21>;
  2801. reg = <0x7c013880 0x40>;
  2802. };
  2803.  
  2804. mmc@7d002000 {
  2805. clocks = <0x0f>;
  2806. compatible = "brcm,bcm2835-sdhost";
  2807. phandle = <0x81>;
  2808. reg = <0x7d002000 0x100>;
  2809. status = "disabled";
  2810. };
  2811.  
  2812. mop@7c500000 {
  2813. compatible = "brcm,bcm2712-mop";
  2814. interrupt-parent = <0x09>;
  2815. interrupts = <0x01>;
  2816. phandle = <0x7b>;
  2817. reg = <0x7c500000 0x28>;
  2818. status = "disabled";
  2819. };
  2820.  
  2821. moplet@7c501000 {
  2822. compatible = "brcm,bcm2712-moplet";
  2823. interrupt-parent = <0x09>;
  2824. interrupts = <0x00>;
  2825. phandle = <0x7c>;
  2826. reg = <0x7c501000 0x20>;
  2827. status = "disabled";
  2828. };
  2829.  
  2830. pinctrl@7d504100 {
  2831. compatible = "brcm,bcm2712-pinctrl";
  2832. phandle = <0x92>;
  2833. reg = <0x7d504100 0x30>;
  2834.  
  2835. bt_shutdown_pins {
  2836. function = "gpio";
  2837. phandle = <0x19>;
  2838. pins = "gpio29";
  2839. };
  2840.  
  2841. emmc_sd_pulls {
  2842. bias-pull-up;
  2843. phandle = <0x54>;
  2844. pins = "emmc_cmd\0emmc_dat0\0emmc_dat1\0emmc_dat2\0emmc_dat3";
  2845. };
  2846.  
  2847. pwr_button_pins {
  2848. bias-pull-up;
  2849. function = "gpio";
  2850. phandle = <0x6e>;
  2851. pins = "gpio20";
  2852. };
  2853.  
  2854. sdio2_30_pins {
  2855. phandle = <0x59>;
  2856.  
  2857. pin_clk {
  2858. bias-disable;
  2859. function = "sd2";
  2860. pins = "gpio30";
  2861. };
  2862.  
  2863. pin_cmd {
  2864. bias-pull-up;
  2865. function = "sd2";
  2866. pins = "gpio31";
  2867. };
  2868.  
  2869. pins_dat {
  2870. bias-pull-up;
  2871. function = "sd2";
  2872. pins = "gpio32\0gpio33\0gpio34\0gpio35";
  2873. };
  2874. };
  2875.  
  2876. spi10_cs_gpio1 {
  2877. bias-pull-up;
  2878. function = "gpio";
  2879. phandle = <0x13>;
  2880. pins = "gpio1";
  2881. };
  2882.  
  2883. spi10_gpio2 {
  2884. bias-disable;
  2885. function = "vc_spi0";
  2886. phandle = <0x12>;
  2887. pins = "gpio2\0gpio3\0gpio4";
  2888. };
  2889.  
  2890. uarta_24_pins {
  2891. phandle = <0x18>;
  2892.  
  2893. pin_cts {
  2894. bias-pull-up;
  2895. function = "uart0";
  2896. pins = "gpio25";
  2897. };
  2898.  
  2899. pin_rts {
  2900. bias-disable;
  2901. function = "uart0";
  2902. pins = "gpio24";
  2903. };
  2904.  
  2905. pin_rxd {
  2906. bias-pull-up;
  2907. function = "uart0";
  2908. pins = "gpio27";
  2909. };
  2910.  
  2911. pin_txd {
  2912. bias-disable;
  2913. function = "uart0";
  2914. pins = "gpio26";
  2915. };
  2916. };
  2917.  
  2918. wl_on_pins {
  2919. function = "gpio";
  2920. phandle = <0x5c>;
  2921. pins = "gpio28";
  2922. };
  2923. };
  2924.  
  2925. pinctrl@7d510700 {
  2926. compatible = "brcm,bcm2712-aon-pinctrl";
  2927. phandle = <0x96>;
  2928. reg = <0x7d510700 0x20>;
  2929.  
  2930. aon_pwm_1pin {
  2931. function = "aon_pwm";
  2932. phandle = <0x9d>;
  2933. pins = "aon_gpio9";
  2934. };
  2935.  
  2936. bsc_m1_agpio13_pins {
  2937. bias-pull-up;
  2938. function = "bsc_m1";
  2939. phandle = <0x97>;
  2940. pins = "aon_gpio13\0aon_gpio14";
  2941. };
  2942.  
  2943. bsc_m2_sgpio4_pins {
  2944. function = "bsc_m2";
  2945. phandle = <0x99>;
  2946. pins = "aon_sgpio4\0aon_sgpio5";
  2947. };
  2948.  
  2949. bsc_pmu_sgpio4_pins {
  2950. function = "avs_pmu_bsc";
  2951. phandle = <0x98>;
  2952. pins = "aon_sgpio4\0aon_sgpio5";
  2953. };
  2954.  
  2955. emmc_aon_cd_pins {
  2956. bias-pull-up;
  2957. function = "sd_card_g";
  2958. phandle = <0x55>;
  2959. pins = "aon_gpio5";
  2960. };
  2961.  
  2962. i2c3_m4_agpio0_pins {
  2963. bias-pull-up;
  2964. function = "vc_i2c3";
  2965. phandle = <0x14>;
  2966. pins = "aon_gpio0\0aon_gpio1";
  2967. };
  2968.  
  2969. pwm_aon_agpio1_pins {
  2970. function = "aon_pwm";
  2971. phandle = <0x9a>;
  2972. pins = "aon_gpio1\0aon_gpio2";
  2973. };
  2974.  
  2975. pwm_aon_agpio4_pins {
  2976. function = "vc_pwm0";
  2977. phandle = <0x9b>;
  2978. pins = "aon_gpio4\0aon_gpio5";
  2979. };
  2980.  
  2981. pwm_aon_agpio7_pins {
  2982. function = "aon_pwm";
  2983. phandle = <0x9c>;
  2984. pins = "aon_gpio7\0aon_gpio9";
  2985. };
  2986. };
  2987.  
  2988. pixelvalve@7c410000 {
  2989. compatible = "brcm,bcm2712-pixelvalve0";
  2990. interrupts = <0x00 0x65 0x04>;
  2991. phandle = <0x79>;
  2992. reg = <0x7c410000 0x100>;
  2993. status = "disabled";
  2994. };
  2995.  
  2996. pixelvalve@7c411000 {
  2997. compatible = "brcm,bcm2712-pixelvalve1";
  2998. interrupts = <0x00 0x6e 0x04>;
  2999. phandle = <0x7a>;
  3000. reg = <0x7c411000 0x100>;
  3001. status = "disabled";
  3002. };
  3003.  
  3004. power {
  3005. #power-domain-cells = <0x01>;
  3006. compatible = "raspberrypi,bcm2835-power";
  3007. firmware = <0x0c>;
  3008. phandle = <0x51>;
  3009. };
  3010.  
  3011. pwm@7d00c000 {
  3012. #pwm-cells = <0x03>;
  3013. assigned-clock-rates = <0x989680>;
  3014. compatible = "brcm,bcm2835-pwm";
  3015. phandle = <0x8f>;
  3016. reg = <0x7d00c000 0x28>;
  3017. status = "disabled";
  3018. };
  3019.  
  3020. pwm@7d00c800 {
  3021. #pwm-cells = <0x03>;
  3022. assigned-clock-rates = <0x989680>;
  3023. compatible = "brcm,bcm2835-pwm";
  3024. phandle = <0x90>;
  3025. reg = <0x7d00c800 0x28>;
  3026. status = "disabled";
  3027. };
  3028.  
  3029. pwm@7d517a80 {
  3030. #pwm-cells = <0x03>;
  3031. clocks = <0x1b>;
  3032. compatible = "brcm,bcm7038-pwm";
  3033. phandle = <0x9f>;
  3034. reg = <0x7d517a80 0x28>;
  3035. };
  3036.  
  3037. rng@7d208000 {
  3038. compatible = "brcm,bcm2711-rng200";
  3039. phandle = <0x68>;
  3040. reg = <0x7d208000 0x28>;
  3041. status = "okay";
  3042. };
  3043.  
  3044. rpi_rtc {
  3045. compatible = "raspberrypi,rpi-rtc";
  3046. firmware = <0x0c>;
  3047. phandle = <0x69>;
  3048. status = "okay";
  3049. trickle-charge-microvolt = <0x00>;
  3050. };
  3051.  
  3052. serial@7d001000 {
  3053. arm,primecell-periphid = <0x241011>;
  3054. clock-names = "uartclk\0apb_pclk";
  3055. clocks = <0x0e 0x0f>;
  3056. compatible = "arm,pl011\0arm,primecell";
  3057. interrupts = <0x00 0x79 0x04>;
  3058. phandle = <0x7e>;
  3059. reg = <0x7d001000 0x200>;
  3060. status = "okay";
  3061. };
  3062.  
  3063. serial@7d001400 {
  3064. arm,primecell-periphid = <0x241011>;
  3065. clock-names = "uartclk\0apb_pclk";
  3066. clocks = <0x0e 0x0f>;
  3067. compatible = "arm,pl011\0arm,primecell";
  3068. interrupts = <0x00 0x79 0x04>;
  3069. phandle = <0x7f>;
  3070. reg = <0x7d001400 0x200>;
  3071. status = "disabled";
  3072. };
  3073.  
  3074. serial@7d001a00 {
  3075. arm,primecell-periphid = <0x241011>;
  3076. clock-names = "uartclk\0apb_pclk";
  3077. clocks = <0x0e 0x0f>;
  3078. compatible = "arm,pl011\0arm,primecell";
  3079. interrupts = <0x00 0x79 0x04>;
  3080. phandle = <0x80>;
  3081. reg = <0x7d001a00 0x200>;
  3082. status = "disabled";
  3083. };
  3084.  
  3085. serial@7d50c000 {
  3086. auto-flow-control;
  3087. clock-frequency = <0x5b8d800>;
  3088. compatible = "brcm,bcm7271-uart";
  3089. interrupts = <0x00 0x114 0x04>;
  3090. phandle = <0x94>;
  3091. pinctrl-0 = <0x18 0x19>;
  3092. pinctrl-names = "default";
  3093. reg = <0x7d50c000 0x20>;
  3094. reg-io-width = <0x04>;
  3095. reg-names = "uart";
  3096. reg-shift = <0x02>;
  3097. skip-init;
  3098. status = "okay";
  3099. uart-has-rtscts;
  3100.  
  3101. bluetooth {
  3102. compatible = "brcm,bcm43438-bt";
  3103. local-bd-address = [97 c9 0e 67 cf 2c];
  3104. max-speed = <0x2dc6c0>;
  3105. phandle = <0x5e>;
  3106. shutdown-gpios = <0x11 0x1d 0x00>;
  3107. };
  3108. };
  3109.  
  3110. serial@7d50d000 {
  3111. compatible = "brcm,bcm7271-uart";
  3112. interrupts = <0x00 0x115 0x04>;
  3113. phandle = <0x95>;
  3114. reg = <0x7d50d000 0x20>;
  3115. reg-io-width = <0x04>;
  3116. reg-names = "uart";
  3117. reg-shift = <0x02>;
  3118. skip-init;
  3119. status = "disabled";
  3120. };
  3121.  
  3122. sound {
  3123. phandle = <0xa4>;
  3124. };
  3125.  
  3126. spi@7d004000 {
  3127. #address-cells = <0x01>;
  3128. #size-cells = <0x00>;
  3129. clocks = <0x0f>;
  3130. compatible = "brcm,bcm2835-spi";
  3131. cs-gpios = <0x11 0x01 0x01>;
  3132. dma-names = "tx\0rx";
  3133. dmas = <0x10 0x06 0x10 0x07>;
  3134. interrupts = <0x00 0x76 0x04>;
  3135. num-cs = <0x01>;
  3136. phandle = <0x83>;
  3137. pinctrl-0 = <0x12 0x13>;
  3138. pinctrl-names = "default";
  3139. reg = <0x7d004000 0x200>;
  3140. status = "okay";
  3141.  
  3142. spidev@0 {
  3143. #address-cells = <0x01>;
  3144. #size-cells = <0x00>;
  3145. compatible = "spidev";
  3146. phandle = <0x84>;
  3147. reg = <0x00>;
  3148. spi-max-frequency = <0x1312d00>;
  3149. status = "okay";
  3150. };
  3151. };
  3152.  
  3153. spi@7d004600 {
  3154. #address-cells = <0x01>;
  3155. #size-cells = <0x00>;
  3156. clocks = <0x0f>;
  3157. compatible = "brcm,bcm2835-spi";
  3158. interrupts = <0x00 0x76 0x04>;
  3159. phandle = <0x85>;
  3160. reg = <0x7d004600 0x200>;
  3161. status = "disabled";
  3162. };
  3163.  
  3164. spi@7d004800 {
  3165. #address-cells = <0x01>;
  3166. #size-cells = <0x00>;
  3167. clocks = <0x0f>;
  3168. compatible = "brcm,bcm2835-spi";
  3169. interrupts = <0x00 0x76 0x04>;
  3170. phandle = <0x86>;
  3171. reg = <0x7d004800 0x200>;
  3172. status = "disabled";
  3173. };
  3174.  
  3175. spi@7d004a00 {
  3176. #address-cells = <0x01>;
  3177. #size-cells = <0x00>;
  3178. clocks = <0x0f>;
  3179. compatible = "brcm,bcm2835-spi";
  3180. interrupts = <0x00 0x76 0x04>;
  3181. phandle = <0x87>;
  3182. reg = <0x7d004a00 0x200>;
  3183. status = "disabled";
  3184. };
  3185.  
  3186. spi@7d004c00 {
  3187. #address-cells = <0x01>;
  3188. #size-cells = <0x00>;
  3189. clocks = <0x0f>;
  3190. compatible = "brcm,bcm2835-spi";
  3191. interrupts = <0x00 0x76 0x04>;
  3192. phandle = <0x88>;
  3193. reg = <0x7d004c00 0x200>;
  3194. status = "disabled";
  3195. };
  3196.  
  3197. timer@7c003000 {
  3198. clock-frequency = <0xf4240>;
  3199. compatible = "brcm,bcm2835-system-timer";
  3200. interrupts = <0x00 0x40 0x04 0x00 0x41 0x04 0x00 0x42 0x04 0x00 0x43 0x04>;
  3201. phandle = <0x77>;
  3202. reg = <0x7c003000 0x1000>;
  3203. };
  3204.  
  3205. watchdog@7d200000 {
  3206. #power-domain-cells = <0x01>;
  3207. #reset-cells = <0x01>;
  3208. clock-names = "v3d\0peri_image\0h264\0isp";
  3209. compatible = "brcm,bcm2712-pm";
  3210. phandle = <0x5b>;
  3211. reg = <0x7d200000 0x308>;
  3212. reg-names = "pm";
  3213. system-power-controller;
  3214. };
  3215. };
  3216.  
  3217. system {
  3218. linux,revision = <0xd04170>;
  3219. linux,serial = <0xf0141a7b 0x43378f25>;
  3220. };
  3221.  
  3222. thermal-zones {
  3223.  
  3224. cpu-thermal {
  3225. coefficients = <0xfffffdda 0x6ddd0>;
  3226. phandle = <0x72>;
  3227. polling-delay = <0x3e8>;
  3228. polling-delay-passive = <0x7d0>;
  3229. thermal-sensors = <0x02>;
  3230.  
  3231. cooling-maps {
  3232. phandle = <0x74>;
  3233.  
  3234. hot {
  3235. cooling-device = <0x04 0x03 0x03>;
  3236. trip = <0x06>;
  3237. };
  3238.  
  3239. melt {
  3240. cooling-device = <0x04 0x04 0x04>;
  3241. trip = <0x08>;
  3242. };
  3243.  
  3244. tepid {
  3245. cooling-device = <0x04 0x01 0x01>;
  3246. trip = <0x03>;
  3247. };
  3248.  
  3249. vhot {
  3250. cooling-device = <0x04 0x04 0x04>;
  3251. trip = <0x07>;
  3252. };
  3253.  
  3254. warm {
  3255. cooling-device = <0x04 0x02 0x02>;
  3256. trip = <0x05>;
  3257. };
  3258. };
  3259.  
  3260. trips {
  3261. phandle = <0x73>;
  3262.  
  3263. cpu-crit {
  3264. hysteresis = <0x00>;
  3265. phandle = <0x08>;
  3266. temperature = <0x1adb0>;
  3267. type = "critical";
  3268. };
  3269.  
  3270. cpu-hot {
  3271. hysteresis = <0x1388>;
  3272. phandle = <0x06>;
  3273. temperature = <0x107ac>;
  3274. type = "active";
  3275. };
  3276.  
  3277. cpu-tepid {
  3278. hysteresis = <0x1388>;
  3279. phandle = <0x03>;
  3280. temperature = <0xc350>;
  3281. type = "active";
  3282. };
  3283.  
  3284. cpu-vhot {
  3285. hysteresis = <0x1388>;
  3286. phandle = <0x07>;
  3287. temperature = <0x124f8>;
  3288. type = "active";
  3289. };
  3290.  
  3291. cpu-warm {
  3292. hysteresis = <0x1388>;
  3293. phandle = <0x05>;
  3294. temperature = <0xea60>;
  3295. type = "active";
  3296. };
  3297. };
  3298. };
  3299. };
  3300.  
  3301. timer {
  3302. arm,cpu-registers-not-fw-configured;
  3303. compatible = "arm,armv8-timer";
  3304. interrupts = <0x01 0x0d 0xf08 0x01 0x0e 0xf08 0x01 0x0b 0xf08 0x01 0x0a 0xf08>;
  3305. };
  3306.  
  3307. wl_on_reg {
  3308. compatible = "regulator-fixed";
  3309. enable-active-high;
  3310. gpio = <0x11 0x1c 0x00>;
  3311. phandle = <0x5a>;
  3312. pinctrl-0 = <0x5c>;
  3313. pinctrl-names = "default";
  3314. regulator-max-microvolt = <0x325aa0>;
  3315. regulator-min-microvolt = <0x325aa0>;
  3316. regulator-name = "wl-on-regulator";
  3317. startup-delay-us = <0x249f0>;
  3318. };
  3319. };
Tags: armbian
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