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  1. Initializing VGA without OPROM.
  2. [0.097488] HW.GFX.GMA.Initialize
  3. [0.097491] HW.GFX.GMA.Registers.Read: 0x80862805 <- 0x000e5020:PCH_AUD_VID_DID
  4. [0.097493] HW.GFX.GMA.Panel.Setup_PP_Sequencer
  5. [0.097495] HW.GFX.GMA.Registers.Read: 0x00640834 <- 0x000c7208:PCH_PP_ON_DELAYS
  6. [0.097497] HW.GFX.GMA.Registers.Read: 0x00640834 <- 0x000c720c:PCH_PP_OFF_DELAYS
  7. [0.097499] HW.GFX.GMA.Registers.Read: 0x00186906 <- 0x000c7210:PCH_PP_DIVISOR
  8. [0.097500] HW.GFX.GMA.Registers.Unset_And_Set_Mask: PCH_PP_CONTROL
  9. [0.097502] HW.GFX.GMA.Registers.Read: 0x00000000 <- 0x000c7204:PCH_PP_CONTROL
  10. [0.097503] HW.GFX.GMA.Registers.Write: 0xabcd0002 -> 0x000c7204:PCH_PP_CONTROL
  11. [0.097505] HW.GFX.GMA.Registers.Is_Set_Mask: PCH_LVDS
  12. [0.097506] HW.GFX.GMA.Registers.Read: 0x00000002 <- 0x000e1180:PCH_LVDS
  13. [0.097507] HW.GFX.GMA.Registers.Is_Set_Mask: PCH_HDMIB
  14. [0.097508] HW.GFX.GMA.Registers.Read: 0x0000001c <- 0x000e1140:PCH_HDMIB
  15. [0.097509] HW.GFX.GMA.Registers.Is_Set_Mask: PCH_DP_B
  16. [0.097510] HW.GFX.GMA.Registers.Read: 0x00000004 <- 0x000e4100:PCH_DP_B
  17. [0.097511] HW.GFX.GMA.Registers.Unset_And_Set_Mask: SHOTPLUG_CTL
  18. [0.097512] HW.GFX.GMA.Registers.Read: 0x00180000 <- 0x000c4030:SHOTPLUG_CTL
  19. [0.097513] HW.GFX.GMA.Registers.Write: 0x00180013 -> 0x000c4030:SHOTPLUG_CTL
  20. [0.097515] HW.GFX.GMA.Registers.Is_Set_Mask: PCH_HDMIC
  21. [0.097516] HW.GFX.GMA.Registers.Read: 0x0000001c <- 0x000e1150:PCH_HDMIC
  22. [0.097517] HW.GFX.GMA.Registers.Is_Set_Mask: PCH_DP_C
  23. [0.097518] HW.GFX.GMA.Registers.Read: 0x00000004 <- 0x000e4200:PCH_DP_C
  24. [0.097519] HW.GFX.GMA.Registers.Unset_And_Set_Mask: SHOTPLUG_CTL
  25. [0.097520] HW.GFX.GMA.Registers.Read: 0x00180010 <- 0x000c4030:SHOTPLUG_CTL
  26. [0.097521] HW.GFX.GMA.Registers.Write: 0x00181310 -> 0x000c4030:SHOTPLUG_CTL
  27. [0.097523] HW.GFX.GMA.Registers.Is_Set_Mask: PCH_HDMID
  28. [0.097524] HW.GFX.GMA.Registers.Read: 0x0000001c <- 0x000e1160:PCH_HDMID
  29. [0.097525] HW.GFX.GMA.Registers.Is_Set_Mask: PCH_DP_D
  30. [0.097526] HW.GFX.GMA.Registers.Read: 0x00000004 <- 0x000e4300:PCH_DP_D
  31. [0.097527] HW.GFX.GMA.Registers.Unset_And_Set_Mask: SHOTPLUG_CTL
  32. [0.097528] HW.GFX.GMA.Registers.Read: 0x00181010 <- 0x000c4030:SHOTPLUG_CTL
  33. [0.097529] HW.GFX.GMA.Registers.Write: 0x00131010 -> 0x000c4030:SHOTPLUG_CTL
  34. [0.097632] HW.GFX.GMA.Registers.Set_Mask: 0x80000000 .S VGACNTRL
  35. [0.097633] HW.GFX.GMA.Registers.Read: 0x00002900 <- 0x00041000:VGACNTRL
  36. [0.097634] HW.GFX.GMA.Registers.Write: 0x80002900 -> 0x00041000:VGACNTRL
  37. [0.097635] HW.GFX.GMA.Registers.Write: 0x00001402 -> 0x000c6200:PCH_DREF_CONTROL
  38. [0.097637] HW.GFX.GMA.Registers.Read: 0x00001402 <- 0x000c6200:PCH_DREF_CONTROL
  39. [0.097640] HW.GFX.GMA.Registers.Unset_And_Set_Mask: PCH_RAWCLK_FREQ
  40. [0.097642] HW.GFX.GMA.Registers.Read: 0x0000007d <- 0x000c6204:PCH_RAWCLK_FREQ
  41. [0.097643] HW.GFX.GMA.Registers.Write: 0x0000007d -> 0x000c6204:PCH_RAWCLK_FREQ
  42. [0.097645] HW.GFX.GMA.Panel.On
  43. [0.097645] HW.GFX.GMA.Registers.Is_Set_Mask: PCH_PP_CONTROL
  44. [0.097647] HW.GFX.GMA.Registers.Read: 0xabcd0002 <- 0x000c7204:PCH_PP_CONTROL
  45. [0.097648] HW.GFX.GMA.Registers.Set_Mask: 0x00000001 .S PCH_PP_CONTROL
  46. [0.097650] HW.GFX.GMA.Registers.Read: 0xabcd0002 <- 0x000c7204:PCH_PP_CONTROL
  47. [0.097651] HW.GFX.GMA.Registers.Write: 0xabcd0003 -> 0x000c7204:PCH_PP_CONTROL
  48. [0.097653] HW.GFX.GMA.Display_Probing.Read_EDID
  49. [0.097654] HW.GFX.GMA.Registers.Is_Set_Mask: PCH_DP_AUX_CTL_B
  50. [0.097655] HW.GFX.GMA.Registers.Read: 0x00050000 <- 0x000e4110:PCH_DP_AUX_CTL_B
  51. [0.097656] HW.GFX.GMA.Registers.Write: 0x40005000 -> 0x000e4114:PCH_DP_AUX_DATA_B_1
  52. [0.097658] HW.GFX.GMA.Registers.Unset_And_Set_Mask: PCH_DP_AUX_CTL_B
  53. [0.097659] HW.GFX.GMA.Registers.Read: 0x00050000 <- 0x000e4110:PCH_DP_AUX_CTL_B
  54. [0.097660] HW.GFX.GMA.Registers.Write: 0xd635003f -> 0x000e4110:PCH_DP_AUX_CTL_B
  55. [0.097662] HW.GFX.GMA.Registers.Wait: 0x00000000 <- 0x80000000 & 0x000e4110:PCH_DP_AUX_CTL_B
  56. [0.098157] HW.GFX.GMA.Registers.Read: 0x5545003f <- 0x000e4110:PCH_DP_AUX_CTL_B
  57. [0.098158] HW.GFX.GMA.Registers.Is_Set_Mask: PCH_DP_AUX_CTL_B
  58. [0.098159] HW.GFX.GMA.Registers.Read: 0x5545003f <- 0x000e4110:PCH_DP_AUX_CTL_B
  59. [0.098160] HW.GFX.GMA.Registers.Write: 0x40005000 -> 0x000e4114:PCH_DP_AUX_DATA_B_1
  60. [0.098162] HW.GFX.GMA.Registers.Unset_And_Set_Mask: PCH_DP_AUX_CTL_B
  61. [0.098163] HW.GFX.GMA.Registers.Read: 0x5545003f <- 0x000e4110:PCH_DP_AUX_CTL_B
  62. [0.098164] HW.GFX.GMA.Registers.Write: 0xd635003f -> 0x000e4110:PCH_DP_AUX_CTL_B
  63. [0.098165] HW.GFX.GMA.Registers.Wait: 0x00000000 <- 0x80000000 & 0x000e4110:PCH_DP_AUX_CTL_B
  64. [0.098661] HW.GFX.GMA.Registers.Read: 0x5545003f <- 0x000e4110:PCH_DP_AUX_CTL_B
  65. [0.098662] HW.GFX.GMA.Registers.Is_Set_Mask: PCH_DP_AUX_CTL_B
  66. [0.098663] HW.GFX.GMA.Registers.Read: 0x5545003f <- 0x000e4110:PCH_DP_AUX_CTL_B
  67. [0.098664] HW.GFX.GMA.Registers.Write: 0x40005000 -> 0x000e4114:PCH_DP_AUX_DATA_B_1
  68. [0.098666] HW.GFX.GMA.Registers.Unset_And_Set_Mask: PCH_DP_AUX_CTL_B
  69. [0.098667] HW.GFX.GMA.Registers.Read: 0x5545003f <- 0x000e4110:PCH_DP_AUX_CTL_B
  70. [0.098668] HW.GFX.GMA.Registers.Write: 0xd635003f -> 0x000e4110:PCH_DP_AUX_CTL_B
  71. [0.098670] HW.GFX.GMA.Registers.Wait: 0x00000000 <- 0x80000000 & 0x000e4110:PCH_DP_AUX_CTL_B
  72. [0.099166] HW.GFX.GMA.Registers.Read: 0x5545003f <- 0x000e4110:PCH_DP_AUX_CTL_B
  73. [0.099167] HW.GFX.GMA.Display_Probing.Read_EDID
  74. [0.099167] HW.GFX.GMA.Registers.Is_Set_Mask: PCH_DP_AUX_CTL_C
  75. [0.099169] HW.GFX.GMA.Registers.Read: 0x00050000 <- 0x000e4210:PCH_DP_AUX_CTL_C
  76. [0.099170] HW.GFX.GMA.Registers.Write: 0x40005000 -> 0x000e4214:PCH_DP_AUX_DATA_C_1
  77. [0.099172] HW.GFX.GMA.Registers.Unset_And_Set_Mask: PCH_DP_AUX_CTL_C
  78. [0.099173] HW.GFX.GMA.Registers.Read: 0x00050000 <- 0x000e4210:PCH_DP_AUX_CTL_C
  79. [0.099174] HW.GFX.GMA.Registers.Write: 0xd635003f -> 0x000e4210:PCH_DP_AUX_CTL_C
  80. [0.099176] HW.GFX.GMA.Registers.Wait: 0x00000000 <- 0x80000000 & 0x000e4210:PCH_DP_AUX_CTL_C
  81. [0.099671] HW.GFX.GMA.Registers.Read: 0x5545003f <- 0x000e4210:PCH_DP_AUX_CTL_C
  82. [0.099672] HW.GFX.GMA.Registers.Is_Set_Mask: PCH_DP_AUX_CTL_C
  83. [0.099673] HW.GFX.GMA.Registers.Read: 0x5545003f <- 0x000e4210:PCH_DP_AUX_CTL_C
  84. [0.099674] HW.GFX.GMA.Registers.Write: 0x40005000 -> 0x000e4214:PCH_DP_AUX_DATA_C_1
  85. [0.099676] HW.GFX.GMA.Registers.Unset_And_Set_Mask: PCH_DP_AUX_CTL_C
  86. [0.099677] HW.GFX.GMA.Registers.Read: 0x5545003f <- 0x000e4210:PCH_DP_AUX_CTL_C
  87. [0.099678] HW.GFX.GMA.Registers.Write: 0xd635003f -> 0x000e4210:PCH_DP_AUX_CTL_C
  88. [0.099680] HW.GFX.GMA.Registers.Wait: 0x00000000 <- 0x80000000 & 0x000e4210:PCH_DP_AUX_CTL_C
  89. [0.100175] HW.GFX.GMA.Registers.Read: 0x5545003f <- 0x000e4210:PCH_DP_AUX_CTL_C
  90. [0.100176] HW.GFX.GMA.Registers.Is_Set_Mask: PCH_DP_AUX_CTL_C
  91. [0.100177] HW.GFX.GMA.Registers.Read: 0x5545003f <- 0x000e4210:PCH_DP_AUX_CTL_C
  92. [0.100178] HW.GFX.GMA.Registers.Write: 0x40005000 -> 0x000e4214:PCH_DP_AUX_DATA_C_1
  93. [0.100180] HW.GFX.GMA.Registers.Unset_And_Set_Mask: PCH_DP_AUX_CTL_C
  94. [0.100181] HW.GFX.GMA.Registers.Read: 0x5545003f <- 0x000e4210:PCH_DP_AUX_CTL_C
  95. [0.100182] HW.GFX.GMA.Registers.Write: 0xd635003f -> 0x000e4210:PCH_DP_AUX_CTL_C
  96. [0.100184] HW.GFX.GMA.Registers.Wait: 0x00000000 <- 0x80000000 & 0x000e4210:PCH_DP_AUX_CTL_C
  97. [0.100680] HW.GFX.GMA.Registers.Read: 0x5545003f <- 0x000e4210:PCH_DP_AUX_CTL_C
  98. [0.100681] HW.GFX.GMA.Display_Probing.Read_EDID
  99. [0.100681] HW.GFX.GMA.Registers.Is_Set_Mask: PCH_DP_AUX_CTL_D
  100. [0.100683] HW.GFX.GMA.Registers.Read: 0x00050000 <- 0x000e4310:PCH_DP_AUX_CTL_D
  101. [0.100684] HW.GFX.GMA.Registers.Write: 0x40005000 -> 0x000e4314:PCH_DP_AUX_DATA_D_1
  102. [0.100686] HW.GFX.GMA.Registers.Unset_And_Set_Mask: PCH_DP_AUX_CTL_D
  103. [0.100687] HW.GFX.GMA.Registers.Read: 0x00050000 <- 0x000e4310:PCH_DP_AUX_CTL_D
  104. [0.100688] HW.GFX.GMA.Registers.Write: 0xd635003f -> 0x000e4310:PCH_DP_AUX_CTL_D
  105. [0.100690] HW.GFX.GMA.Registers.Wait: 0x00000000 <- 0x80000000 & 0x000e4310:PCH_DP_AUX_CTL_D
  106. [0.101185] HW.GFX.GMA.Registers.Read: 0x5545003f <- 0x000e4310:PCH_DP_AUX_CTL_D
  107. [0.101186] HW.GFX.GMA.Registers.Is_Set_Mask: PCH_DP_AUX_CTL_D
  108. [0.101187] HW.GFX.GMA.Registers.Read: 0x5545003f <- 0x000e4310:PCH_DP_AUX_CTL_D
  109. [0.101188] HW.GFX.GMA.Registers.Write: 0x40005000 -> 0x000e4314:PCH_DP_AUX_DATA_D_1
  110. [0.101190] HW.GFX.GMA.Registers.Unset_And_Set_Mask: PCH_DP_AUX_CTL_D
  111. [0.101192] HW.GFX.GMA.Registers.Read: 0x5545003f <- 0x000e4310:PCH_DP_AUX_CTL_D
  112. [0.101193] HW.GFX.GMA.Registers.Write: 0xd635003f -> 0x000e4310:PCH_DP_AUX_CTL_D
  113. [0.101195] HW.GFX.GMA.Registers.Wait: 0x00000000 <- 0x80000000 & 0x000e4310:PCH_DP_AUX_CTL_D
  114. [0.101691] HW.GFX.GMA.Registers.Read: 0x5545003f <- 0x000e4310:PCH_DP_AUX_CTL_D
  115. [0.101692] HW.GFX.GMA.Registers.Is_Set_Mask: PCH_DP_AUX_CTL_D
  116. [0.101693] HW.GFX.GMA.Registers.Read: 0x5545003f <- 0x000e4310:PCH_DP_AUX_CTL_D
  117. [0.101694] HW.GFX.GMA.Registers.Write: 0x40005000 -> 0x000e4314:PCH_DP_AUX_DATA_D_1
  118. [0.101696] HW.GFX.GMA.Registers.Unset_And_Set_Mask: PCH_DP_AUX_CTL_D
  119. [0.101697] HW.GFX.GMA.Registers.Read: 0x5545003f <- 0x000e4310:PCH_DP_AUX_CTL_D
  120. [0.101698] HW.GFX.GMA.Registers.Write: 0xd635003f -> 0x000e4310:PCH_DP_AUX_CTL_D
  121. [0.101700] HW.GFX.GMA.Registers.Wait: 0x00000000 <- 0x80000000 & 0x000e4310:PCH_DP_AUX_CTL_D
  122. [0.102196] HW.GFX.GMA.Registers.Read: 0x5545003f <- 0x000e4310:PCH_DP_AUX_CTL_D
  123. [0.102197] HW.GFX.GMA.Display_Probing.Read_EDID
  124. [0.102197] HW.GFX.GMA.I2C.I2C_Read
  125. [0.102198] HW.GFX.GMA.I2C.Init_GMBUS
  126. [0.102198] HW.GFX.GMA.Registers.Wait: 0x00000000 <- 0x00008000 & 0x000c5108:PCH_GMBUS2
  127. [0.102200] HW.GFX.GMA.Registers.Read: 0x00008800 <- 0x000c5108:PCH_GMBUS2
  128. [0.102201] HW.GFX.GMA.Registers.Write: 0x00000005 -> 0x000c5100:PCH_GMBUS0
  129. [0.102203] HW.GFX.GMA.Registers.Write: 0x00000000 -> 0x000c5110:PCH_GMBUS4
  130. [0.102205] HW.GFX.GMA.Registers.Write: 0x00000000 -> 0x000c5120:PCH_GMBUS5
  131. [0.102207] HW.GFX.GMA.Registers.Write: 0x468000a1 -> 0x000c5104:PCH_GMBUS1
  132. [0.102208] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  133. [0.102759] HW.GFX.GMA.Registers.Read: 0x00008a04 <- 0x000c5108:PCH_GMBUS2
  134. [0.102761] HW.GFX.GMA.Registers.Read: 0xffffff00 <- 0x000c510c:PCH_GMBUS3
  135. [0.102762] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  136. [0.103051] HW.GFX.GMA.Registers.Read: 0x00008a08 <- 0x000c5108:PCH_GMBUS2
  137. [0.103053] HW.GFX.GMA.Registers.Read: 0x00ffffff <- 0x000c510c:PCH_GMBUS3
  138. [0.103054] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  139. [0.103343] HW.GFX.GMA.Registers.Read: 0x00008a0c <- 0x000c5108:PCH_GMBUS2
  140. [0.103345] HW.GFX.GMA.Registers.Read: 0xa0b2ac10 <- 0x000c510c:PCH_GMBUS3
  141. [0.103346] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  142. [0.103635] HW.GFX.GMA.Registers.Read: 0x00008a10 <- 0x000c5108:PCH_GMBUS2
  143. [0.103637] HW.GFX.GMA.Registers.Read: 0x3854394c <- 0x000c510c:PCH_GMBUS3
  144. [0.103638] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  145. [0.103928] HW.GFX.GMA.Registers.Read: 0x00008a14 <- 0x000c5108:PCH_GMBUS2
  146. [0.103930] HW.GFX.GMA.Registers.Read: 0x03011a02 <- 0x000c510c:PCH_GMBUS3
  147. [0.103931] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  148. [0.104219] HW.GFX.GMA.Registers.Read: 0x00008a18 <- 0x000c5108:PCH_GMBUS2
  149. [0.104221] HW.GFX.GMA.Registers.Read: 0x781e3580 <- 0x000c510c:PCH_GMBUS3
  150. [0.104222] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  151. [0.104510] HW.GFX.GMA.Registers.Read: 0x00008a1c <- 0x000c5108:PCH_GMBUS2
  152. [0.104512] HW.GFX.GMA.Registers.Read: 0xa7757eee <- 0x000c510c:PCH_GMBUS3
  153. [0.104513] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  154. [0.104802] HW.GFX.GMA.Registers.Read: 0x00008a20 <- 0x000c5108:PCH_GMBUS2
  155. [0.104804] HW.GFX.GMA.Registers.Read: 0x279c5255 <- 0x000c510c:PCH_GMBUS3
  156. [0.104805] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  157. [0.105094] HW.GFX.GMA.Registers.Read: 0x00008a24 <- 0x000c5108:PCH_GMBUS2
  158. [0.105096] HW.GFX.GMA.Registers.Read: 0xa554500f <- 0x000c510c:PCH_GMBUS3
  159. [0.105097] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  160. [0.105386] HW.GFX.GMA.Registers.Read: 0x00008a28 <- 0x000c5108:PCH_GMBUS2
  161. [0.105387] HW.GFX.GMA.Registers.Read: 0x4f71004b <- 0x000c510c:PCH_GMBUS3
  162. [0.105388] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  163. [0.105678] HW.GFX.GMA.Registers.Read: 0x00008a2c <- 0x000c5108:PCH_GMBUS2
  164. [0.105680] HW.GFX.GMA.Registers.Read: 0xc0a98081 <- 0x000c510c:PCH_GMBUS3
  165. [0.105681] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  166. [0.105970] HW.GFX.GMA.Registers.Read: 0x00008a30 <- 0x000c5108:PCH_GMBUS2
  167. [0.105972] HW.GFX.GMA.Registers.Read: 0xc0d140a9 <- 0x000c510c:PCH_GMBUS3
  168. [0.105973] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  169. [0.106263] HW.GFX.GMA.Registers.Read: 0x00008a34 <- 0x000c5108:PCH_GMBUS2
  170. [0.106265] HW.GFX.GMA.Registers.Read: 0x01010101 <- 0x000c510c:PCH_GMBUS3
  171. [0.106266] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  172. [0.106554] HW.GFX.GMA.Registers.Read: 0x00008a38 <- 0x000c5108:PCH_GMBUS2
  173. [0.106555] HW.GFX.GMA.Registers.Read: 0x3a020101 <- 0x000c510c:PCH_GMBUS3
  174. [0.106556] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  175. [0.106846] HW.GFX.GMA.Registers.Read: 0x00008a3c <- 0x000c5108:PCH_GMBUS2
  176. [0.106848] HW.GFX.GMA.Registers.Read: 0x38711880 <- 0x000c510c:PCH_GMBUS3
  177. [0.106849] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  178. [0.107137] HW.GFX.GMA.Registers.Read: 0x00008a40 <- 0x000c5108:PCH_GMBUS2
  179. [0.107139] HW.GFX.GMA.Registers.Read: 0x2c58402d <- 0x000c510c:PCH_GMBUS3
  180. [0.107140] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  181. [0.107431] HW.GFX.GMA.Registers.Read: 0x00008a44 <- 0x000c5108:PCH_GMBUS2
  182. [0.107433] HW.GFX.GMA.Registers.Read: 0x280f0045 <- 0x000c510c:PCH_GMBUS3
  183. [0.107434] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  184. [0.107723] HW.GFX.GMA.Registers.Read: 0x00008a48 <- 0x000c5108:PCH_GMBUS2
  185. [0.107725] HW.GFX.GMA.Registers.Read: 0x1e000021 <- 0x000c510c:PCH_GMBUS3
  186. [0.107726] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  187. [0.108014] HW.GFX.GMA.Registers.Read: 0x00008a4c <- 0x000c5108:PCH_GMBUS2
  188. [0.108016] HW.GFX.GMA.Registers.Read: 0xff000000 <- 0x000c510c:PCH_GMBUS3
  189. [0.108017] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  190. [0.108307] HW.GFX.GMA.Registers.Read: 0x00008a50 <- 0x000c5108:PCH_GMBUS2
  191. [0.108309] HW.GFX.GMA.Registers.Read: 0x57433400 <- 0x000c510c:PCH_GMBUS3
  192. [0.108310] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  193. [0.108598] HW.GFX.GMA.Registers.Read: 0x00008a54 <- 0x000c5108:PCH_GMBUS2
  194. [0.108600] HW.GFX.GMA.Registers.Read: 0x31363758 <- 0x000c510c:PCH_GMBUS3
  195. [0.108601] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  196. [0.108890] HW.GFX.GMA.Registers.Read: 0x00008a58 <- 0x000c5108:PCH_GMBUS2
  197. [0.108892] HW.GFX.GMA.Registers.Read: 0x39543835 <- 0x000c510c:PCH_GMBUS3
  198. [0.108893] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  199. [0.109183] HW.GFX.GMA.Registers.Read: 0x00008a5c <- 0x000c5108:PCH_GMBUS2
  200. [0.109185] HW.GFX.GMA.Registers.Read: 0x00000a4c <- 0x000c510c:PCH_GMBUS3
  201. [0.109186] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  202. [0.109476] HW.GFX.GMA.Registers.Read: 0x00008a60 <- 0x000c5108:PCH_GMBUS2
  203. [0.109478] HW.GFX.GMA.Registers.Read: 0x4400fc00 <- 0x000c510c:PCH_GMBUS3
  204. [0.109479] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  205. [0.109769] HW.GFX.GMA.Registers.Read: 0x00008a64 <- 0x000c5108:PCH_GMBUS2
  206. [0.109771] HW.GFX.GMA.Registers.Read: 0x204c4c45 <- 0x000c510c:PCH_GMBUS3
  207. [0.109772] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  208. [0.110060] HW.GFX.GMA.Registers.Read: 0x00008a68 <- 0x000c5108:PCH_GMBUS2
  209. [0.110062] HW.GFX.GMA.Registers.Read: 0x31343255 <- 0x000c510c:PCH_GMBUS3
  210. [0.110063] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  211. [0.110353] HW.GFX.GMA.Registers.Read: 0x00008a6c <- 0x000c5108:PCH_GMBUS2
  212. [0.110355] HW.GFX.GMA.Registers.Read: 0x200a4834 <- 0x000c510c:PCH_GMBUS3
  213. [0.110356] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  214. [0.110647] HW.GFX.GMA.Registers.Read: 0x00008a70 <- 0x000c5108:PCH_GMBUS2
  215. [0.110649] HW.GFX.GMA.Registers.Read: 0xfd000000 <- 0x000c510c:PCH_GMBUS3
  216. [0.110650] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  217. [0.110939] HW.GFX.GMA.Registers.Read: 0x00008a74 <- 0x000c5108:PCH_GMBUS2
  218. [0.110941] HW.GFX.GMA.Registers.Read: 0x1e4c3800 <- 0x000c510c:PCH_GMBUS3
  219. [0.110942] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  220. [0.111230] HW.GFX.GMA.Registers.Read: 0x00008a78 <- 0x000c5108:PCH_GMBUS2
  221. [0.111232] HW.GFX.GMA.Registers.Read: 0x0a001153 <- 0x000c510c:PCH_GMBUS3
  222. [0.111233] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  223. [0.111523] HW.GFX.GMA.Registers.Read: 0x00008a7c <- 0x000c5108:PCH_GMBUS2
  224. [0.111525] HW.GFX.GMA.Registers.Read: 0x20202020 <- 0x000c510c:PCH_GMBUS3
  225. [0.111526] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  226. [0.111815] HW.GFX.GMA.Registers.Read: 0x0000ca80 <- 0x000c5108:PCH_GMBUS2
  227. [0.111817] HW.GFX.GMA.Registers.Read: 0x64012020 <- 0x000c510c:PCH_GMBUS3
  228. [0.111818] HW.GFX.GMA.Registers.Wait: 0x00004000 <- 0x00004000 & 0x000c5108:PCH_GMBUS2
  229. [0.111820] HW.GFX.GMA.Registers.Write: 0x48000000 -> 0x000c5104:PCH_GMBUS1
  230. [0.111822] HW.GFX.GMA.Registers.Wait: 0x00000000 <- 0x00000200 & 0x000c5108:PCH_GMBUS2
  231. [0.111847] HW.GFX.GMA.I2C.Release_GMBUS
  232. [0.111848] HW.GFX.GMA.Registers.Write: 0x00000000 -> 0x000c5100:PCH_GMBUS0
  233. [0.111850] HW.GFX.GMA.Registers.Write: 0x00008000 -> 0x000c5108:PCH_GMBUS2
  234. [0.111852] EDID+0x0000: 00 ff ff ff ff ff ff 00 10 ac b2 a0 4c 39 54 38
  235. [0.111854] EDID+0x0010: 02 1a 01 03 80 35 1e 78 ee 7e 75 a7 55 52 9c 27
  236. [0.111856] EDID+0x0020: 0f 50 54 a5 4b 00 71 4f 81 80 a9 c0 a9 40 d1 c0
  237. [0.111858] EDID+0x0030: 01 01 01 01 01 01 02 3a 80 18 71 38 2d 40 58 2c
  238. [0.111859] EDID+0x0040: 45 00 0f 28 21 00 00 1e 00 00 00 ff 00 34 43 57
  239. [0.111860] EDID+0x0050: 58 37 36 31 35 38 54 39 4c 0a 00 00 00 fc 00 44
  240. [0.111861] EDID+0x0060: 45 4c 4c 20 55 32 34 31 34 48 0a 20 00 00 00 fd
  241. [0.111862] EDID+0x0070: 00 38 4c 1e 53 11 00 0a 20 20 20 20 20 20 01 64
  242. [0.111864] HW.GFX.GMA.Display_Probing.Read_EDID
  243. [0.111864] HW.GFX.GMA.Registers.Is_Set_Mask: PCH_DP_AUX_CTL_B
  244. [0.111866] HW.GFX.GMA.Registers.Read: 0x5545003f <- 0x000e4110:PCH_DP_AUX_CTL_B
  245. [0.111867] HW.GFX.GMA.Registers.Write: 0x40005000 -> 0x000e4114:PCH_DP_AUX_DATA_B_1
  246. [0.111869] HW.GFX.GMA.Registers.Unset_And_Set_Mask: PCH_DP_AUX_CTL_B
  247. [0.111870] HW.GFX.GMA.Registers.Read: 0x5545003f <- 0x000e4110:PCH_DP_AUX_CTL_B
  248. [0.111871] HW.GFX.GMA.Registers.Write: 0xd635003f -> 0x000e4110:PCH_DP_AUX_CTL_B
  249. [0.111873] HW.GFX.GMA.Registers.Wait: 0x00000000 <- 0x80000000 & 0x000e4110:PCH_DP_AUX_CTL_B
  250. [0.112368] HW.GFX.GMA.Registers.Read: 0x5545003f <- 0x000e4110:PCH_DP_AUX_CTL_B
  251. [0.112369] HW.GFX.GMA.Registers.Is_Set_Mask: PCH_DP_AUX_CTL_B
  252. [0.112370] HW.GFX.GMA.Registers.Read: 0x5545003f <- 0x000e4110:PCH_DP_AUX_CTL_B
  253. [0.112371] HW.GFX.GMA.Registers.Write: 0x40005000 -> 0x000e4114:PCH_DP_AUX_DATA_B_1
  254. [0.112373] HW.GFX.GMA.Registers.Unset_And_Set_Mask: PCH_DP_AUX_CTL_B
  255. [0.112374] HW.GFX.GMA.Registers.Read: 0x5545003f <- 0x000e4110:PCH_DP_AUX_CTL_B
  256. [0.112375] HW.GFX.GMA.Registers.Write: 0xd635003f -> 0x000e4110:PCH_DP_AUX_CTL_B
  257. [0.112377] HW.GFX.GMA.Registers.Wait: 0x00000000 <- 0x80000000 & 0x000e4110:PCH_DP_AUX_CTL_B
  258. [0.112872] HW.GFX.GMA.Registers.Read: 0x5545003f <- 0x000e4110:PCH_DP_AUX_CTL_B
  259. [0.112873] HW.GFX.GMA.Registers.Is_Set_Mask: PCH_DP_AUX_CTL_B
  260. [0.112874] HW.GFX.GMA.Registers.Read: 0x5545003f <- 0x000e4110:PCH_DP_AUX_CTL_B
  261. [0.112875] HW.GFX.GMA.Registers.Write: 0x40005000 -> 0x000e4114:PCH_DP_AUX_DATA_B_1
  262. [0.112877] HW.GFX.GMA.Registers.Unset_And_Set_Mask: PCH_DP_AUX_CTL_B
  263. [0.112878] HW.GFX.GMA.Registers.Read: 0x5545003f <- 0x000e4110:PCH_DP_AUX_CTL_B
  264. [0.112879] HW.GFX.GMA.Registers.Write: 0xd635003f -> 0x000e4110:PCH_DP_AUX_CTL_B
  265. [0.112880] HW.GFX.GMA.Registers.Wait: 0x00000000 <- 0x80000000 & 0x000e4110:PCH_DP_AUX_CTL_B
  266. [0.113376] HW.GFX.GMA.Registers.Read: 0x5545003f <- 0x000e4110:PCH_DP_AUX_CTL_B
  267. [0.113377] HW.GFX.GMA.Display_Probing.Read_EDID
  268. [0.113377] HW.GFX.GMA.I2C.I2C_Read
  269. [0.113378] HW.GFX.GMA.I2C.Init_GMBUS
  270. [0.113378] HW.GFX.GMA.Registers.Wait: 0x00000000 <- 0x00008000 & 0x000c5108:PCH_GMBUS2
  271. [0.113381] HW.GFX.GMA.Registers.Read: 0x00008800 <- 0x000c5108:PCH_GMBUS2
  272. [0.113382] HW.GFX.GMA.Registers.Write: 0x00000004 -> 0x000c5100:PCH_GMBUS0
  273. [0.113383] HW.GFX.GMA.Registers.Write: 0x00000000 -> 0x000c5110:PCH_GMBUS4
  274. [0.113385] HW.GFX.GMA.Registers.Write: 0x00000000 -> 0x000c5120:PCH_GMBUS5
  275. [0.113387] HW.GFX.GMA.Registers.Write: 0x468000a1 -> 0x000c5104:PCH_GMBUS1
  276. [0.113389] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  277. [0.113491] HW.GFX.GMA.Registers.Read: 0x00008c00 <- 0x000c5108:PCH_GMBUS2
  278. [0.113492] HW.GFX.GMA.I2C.Release_GMBUS
  279. [0.113492] HW.GFX.GMA.Registers.Write: 0x00000000 -> 0x000c5100:PCH_GMBUS0
  280. [0.113494] HW.GFX.GMA.Registers.Write: 0x00008000 -> 0x000c5108:PCH_GMBUS2
  281. [0.113496] HW.GFX.GMA.Display_Probing.Read_EDID
  282. [0.113496] HW.GFX.GMA.I2C.I2C_Read
  283. [0.113497] HW.GFX.GMA.I2C.Init_GMBUS
  284. [0.113497] HW.GFX.GMA.Registers.Wait: 0x00000000 <- 0x00008000 & 0x000c5108:PCH_GMBUS2
  285. [0.113500] HW.GFX.GMA.Registers.Read: 0x00008c00 <- 0x000c5108:PCH_GMBUS2
  286. [0.113501] HW.GFX.GMA.I2C.Reset_GMBUS
  287. [0.113501] HW.GFX.GMA.Registers.Write: 0x80000000 -> 0x000c5104:PCH_GMBUS1
  288. [0.113503] HW.GFX.GMA.Registers.Write: 0x00000000 -> 0x000c5104:PCH_GMBUS1
  289. [0.113505] HW.GFX.GMA.Registers.Write: 0x00000000 -> 0x000c5100:PCH_GMBUS0
  290. [0.113507] HW.GFX.GMA.Registers.Read: 0x00008000 <- 0x000c5108:PCH_GMBUS2
  291. [0.113508] HW.GFX.GMA.Registers.Write: 0x00000006 -> 0x000c5100:PCH_GMBUS0
  292. [0.113510] HW.GFX.GMA.Registers.Write: 0x00000000 -> 0x000c5110:PCH_GMBUS4
  293. [0.113512] HW.GFX.GMA.Registers.Write: 0x00000000 -> 0x000c5120:PCH_GMBUS5
  294. [0.113514] HW.GFX.GMA.Registers.Write: 0x468000a1 -> 0x000c5104:PCH_GMBUS1
  295. [0.113516] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  296. [0.113619] HW.GFX.GMA.Registers.Read: 0x00008c00 <- 0x000c5108:PCH_GMBUS2
  297. [0.113620] HW.GFX.GMA.I2C.Release_GMBUS
  298. [0.113620] HW.GFX.GMA.Registers.Write: 0x00000000 -> 0x000c5100:PCH_GMBUS0
  299. [0.113622] HW.GFX.GMA.Registers.Write: 0x00008000 -> 0x000c5108:PCH_GMBUS2
  300. [0.113624] HW.GFX.GMA.Display_Probing.Read_EDID
  301. [0.113624] HW.GFX.GMA.I2C.I2C_Read
  302. [0.113625] HW.GFX.GMA.I2C.Init_GMBUS
  303. [0.113625] HW.GFX.GMA.Registers.Wait: 0x00000000 <- 0x00008000 & 0x000c5108:PCH_GMBUS2
  304. [0.113627] HW.GFX.GMA.Registers.Read: 0x00008c00 <- 0x000c5108:PCH_GMBUS2
  305. [0.113628] HW.GFX.GMA.I2C.Reset_GMBUS
  306. [0.113628] HW.GFX.GMA.Registers.Write: 0x80000000 -> 0x000c5104:PCH_GMBUS1
  307. [0.113630] HW.GFX.GMA.Registers.Write: 0x00000000 -> 0x000c5104:PCH_GMBUS1
  308. [0.113632] HW.GFX.GMA.Registers.Write: 0x00000000 -> 0x000c5100:PCH_GMBUS0
  309. [0.113634] HW.GFX.GMA.Registers.Read: 0x00008000 <- 0x000c5108:PCH_GMBUS2
  310. [0.113635] HW.GFX.GMA.Registers.Write: 0x00000002 -> 0x000c5100:PCH_GMBUS0
  311. [0.113637] HW.GFX.GMA.Registers.Write: 0x00000000 -> 0x000c5110:PCH_GMBUS4
  312. [0.113639] HW.GFX.GMA.Registers.Write: 0x00000000 -> 0x000c5120:PCH_GMBUS5
  313. [0.113641] HW.GFX.GMA.Registers.Write: 0x468000a1 -> 0x000c5104:PCH_GMBUS1
  314. [0.113643] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  315. [0.113744] HW.GFX.GMA.Registers.Read: 0x00008c00 <- 0x000c5108:PCH_GMBUS2
  316. [0.113745] HW.GFX.GMA.I2C.Release_GMBUS
  317. [0.113745] HW.GFX.GMA.Registers.Write: 0x00000000 -> 0x000c5100:PCH_GMBUS0
  318. [0.113747] HW.GFX.GMA.Registers.Write: 0x00008000 -> 0x000c5108:PCH_GMBUS2
  319. [0.113749] HW.GFX.GMA.Panel.Wait_On
  320. [0.113749] HW.GFX.GMA.Registers.Wait: 0x00000000 <- 0x30000000 & 0x000c7200:PCH_PP_STATUS
  321. [0.113752] HW.GFX.GMA.Registers.Unset_Mask: 0x00000008 !S PCH_PP_CONTROL
  322. [0.113754] HW.GFX.GMA.Registers.Read: 0xabcd0003 <- 0x000c7204:PCH_PP_CONTROL
  323. [0.113755] HW.GFX.GMA.Registers.Write: 0xabcd0003 -> 0x000c7204:PCH_PP_CONTROL
  324. [0.113757] HW.GFX.GMA.Display_Probing.Read_EDID
  325. [0.113757] HW.GFX.GMA.I2C.I2C_Read
  326. [0.113758] HW.GFX.GMA.I2C.Init_GMBUS
  327. [0.113758] HW.GFX.GMA.Registers.Wait: 0x00000000 <- 0x00008000 & 0x000c5108:PCH_GMBUS2
  328. [0.113760] HW.GFX.GMA.Registers.Read: 0x00008c00 <- 0x000c5108:PCH_GMBUS2
  329. [0.113761] HW.GFX.GMA.I2C.Reset_GMBUS
  330. [0.113761] HW.GFX.GMA.Registers.Write: 0x80000000 -> 0x000c5104:PCH_GMBUS1
  331. [0.113763] HW.GFX.GMA.Registers.Write: 0x00000000 -> 0x000c5104:PCH_GMBUS1
  332. [0.113765] HW.GFX.GMA.Registers.Write: 0x00000000 -> 0x000c5100:PCH_GMBUS0
  333. [0.113767] HW.GFX.GMA.Registers.Read: 0x00008000 <- 0x000c5108:PCH_GMBUS2
  334. [0.113768] HW.GFX.GMA.Registers.Write: 0x00000003 -> 0x000c5100:PCH_GMBUS0
  335. [0.113770] HW.GFX.GMA.Registers.Write: 0x00000000 -> 0x000c5110:PCH_GMBUS4
  336. [0.113772] HW.GFX.GMA.Registers.Write: 0x00000000 -> 0x000c5120:PCH_GMBUS5
  337. [0.113774] HW.GFX.GMA.Registers.Write: 0x468000a1 -> 0x000c5104:PCH_GMBUS1
  338. [0.113776] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  339. [0.114292] HW.GFX.GMA.Registers.Read: 0x00008a04 <- 0x000c5108:PCH_GMBUS2
  340. [0.114294] HW.GFX.GMA.Registers.Read: 0xffffff00 <- 0x000c510c:PCH_GMBUS3
  341. [0.114295] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  342. [0.114564] HW.GFX.GMA.Registers.Read: 0x00008a08 <- 0x000c5108:PCH_GMBUS2
  343. [0.114566] HW.GFX.GMA.Registers.Read: 0x00ffffff <- 0x000c510c:PCH_GMBUS3
  344. [0.114567] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  345. [0.114836] HW.GFX.GMA.Registers.Read: 0x00008a0c <- 0x000c5108:PCH_GMBUS2
  346. [0.114838] HW.GFX.GMA.Registers.Read: 0x324ca34c <- 0x000c510c:PCH_GMBUS3
  347. [0.114839] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  348. [0.115108] HW.GFX.GMA.Registers.Read: 0x00008a10 <- 0x000c5108:PCH_GMBUS2
  349. [0.115110] HW.GFX.GMA.Registers.Read: 0x00000000 <- 0x000c510c:PCH_GMBUS3
  350. [0.115111] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  351. [0.115379] HW.GFX.GMA.Registers.Read: 0x00008a14 <- 0x000c5108:PCH_GMBUS2
  352. [0.115381] HW.GFX.GMA.Registers.Read: 0x03011400 <- 0x000c510c:PCH_GMBUS3
  353. [0.115382] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  354. [0.115650] HW.GFX.GMA.Registers.Read: 0x00008a18 <- 0x000c5108:PCH_GMBUS2
  355. [0.115652] HW.GFX.GMA.Registers.Read: 0x78111f80 <- 0x000c510c:PCH_GMBUS3
  356. [0.115653] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  357. [0.115922] HW.GFX.GMA.Registers.Read: 0x00008a1c <- 0x000c5108:PCH_GMBUS2
  358. [0.115924] HW.GFX.GMA.Registers.Read: 0x91851dea <- 0x000c510c:PCH_GMBUS3
  359. [0.115925] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  360. [0.116193] HW.GFX.GMA.Registers.Read: 0x00008a20 <- 0x000c5108:PCH_GMBUS2
  361. [0.116195] HW.GFX.GMA.Registers.Read: 0x268f5956 <- 0x000c510c:PCH_GMBUS3
  362. [0.116196] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  363. [0.116464] HW.GFX.GMA.Registers.Read: 0x00008a24 <- 0x000c5108:PCH_GMBUS2
  364. [0.116466] HW.GFX.GMA.Registers.Read: 0x00545018 <- 0x000c510c:PCH_GMBUS3
  365. [0.116467] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  366. [0.116737] HW.GFX.GMA.Registers.Read: 0x00008a28 <- 0x000c5108:PCH_GMBUS2
  367. [0.116738] HW.GFX.GMA.Registers.Read: 0x01010000 <- 0x000c510c:PCH_GMBUS3
  368. [0.116739] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  369. [0.117009] HW.GFX.GMA.Registers.Read: 0x00008a2c <- 0x000c5108:PCH_GMBUS2
  370. [0.117011] HW.GFX.GMA.Registers.Read: 0x01010101 <- 0x000c510c:PCH_GMBUS3
  371. [0.117012] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  372. [0.117280] HW.GFX.GMA.Registers.Read: 0x00008a30 <- 0x000c5108:PCH_GMBUS2
  373. [0.117282] HW.GFX.GMA.Registers.Read: 0x01010101 <- 0x000c510c:PCH_GMBUS3
  374. [0.117283] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  375. [0.117552] HW.GFX.GMA.Registers.Read: 0x00008a34 <- 0x000c5108:PCH_GMBUS2
  376. [0.117554] HW.GFX.GMA.Registers.Read: 0x01010101 <- 0x000c510c:PCH_GMBUS3
  377. [0.117555] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  378. [0.117823] HW.GFX.GMA.Registers.Read: 0x00008a38 <- 0x000c5108:PCH_GMBUS2
  379. [0.117825] HW.GFX.GMA.Registers.Read: 0x265d0101 <- 0x000c510c:PCH_GMBUS3
  380. [0.117826] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  381. [0.118095] HW.GFX.GMA.Registers.Read: 0x00008a3c <- 0x000c5108:PCH_GMBUS2
  382. [0.118097] HW.GFX.GMA.Registers.Read: 0x8460a040 <- 0x000c510c:PCH_GMBUS3
  383. [0.118098] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  384. [0.118367] HW.GFX.GMA.Registers.Read: 0x00008a40 <- 0x000c5108:PCH_GMBUS2
  385. [0.118369] HW.GFX.GMA.Registers.Read: 0x2030301e <- 0x000c510c:PCH_GMBUS3
  386. [0.118370] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  387. [0.118640] HW.GFX.GMA.Registers.Read: 0x00008a44 <- 0x000c5108:PCH_GMBUS2
  388. [0.118642] HW.GFX.GMA.Registers.Read: 0xae360025 <- 0x000c510c:PCH_GMBUS3
  389. [0.118643] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  390. [0.118912] HW.GFX.GMA.Registers.Read: 0x00008a48 <- 0x000c5108:PCH_GMBUS2
  391. [0.118914] HW.GFX.GMA.Registers.Read: 0x19000010 <- 0x000c510c:PCH_GMBUS3
  392. [0.118915] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  393. [0.119183] HW.GFX.GMA.Registers.Read: 0x00008a4c <- 0x000c5108:PCH_GMBUS2
  394. [0.119185] HW.GFX.GMA.Registers.Read: 0x0f000000 <- 0x000c510c:PCH_GMBUS3
  395. [0.119186] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  396. [0.119455] HW.GFX.GMA.Registers.Read: 0x00008a50 <- 0x000c5108:PCH_GMBUS2
  397. [0.119457] HW.GFX.GMA.Registers.Read: 0x00000000 <- 0x000c510c:PCH_GMBUS3
  398. [0.119458] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  399. [0.119730] HW.GFX.GMA.Registers.Read: 0x00008a54 <- 0x000c5108:PCH_GMBUS2
  400. [0.119732] HW.GFX.GMA.Registers.Read: 0x00000000 <- 0x000c510c:PCH_GMBUS3
  401. [0.119733] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  402. [0.120003] HW.GFX.GMA.Registers.Read: 0x00008a58 <- 0x000c5108:PCH_GMBUS2
  403. [0.120005] HW.GFX.GMA.Registers.Read: 0x04c83200 <- 0x000c510c:PCH_GMBUS3
  404. [0.120006] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  405. [0.120274] HW.GFX.GMA.Registers.Read: 0x00008a5c <- 0x000c5108:PCH_GMBUS2
  406. [0.120276] HW.GFX.GMA.Registers.Read: 0x00000032 <- 0x000c510c:PCH_GMBUS3
  407. [0.120277] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  408. [0.120545] HW.GFX.GMA.Registers.Read: 0x00008a60 <- 0x000c5108:PCH_GMBUS2
  409. [0.120547] HW.GFX.GMA.Registers.Read: 0x5300fe00 <- 0x000c510c:PCH_GMBUS3
  410. [0.120548] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  411. [0.120816] HW.GFX.GMA.Registers.Read: 0x00008a64 <- 0x000c5108:PCH_GMBUS2
  412. [0.120818] HW.GFX.GMA.Registers.Read: 0x55534d41 <- 0x000c510c:PCH_GMBUS3
  413. [0.120819] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  414. [0.121087] HW.GFX.GMA.Registers.Read: 0x00008a68 <- 0x000c5108:PCH_GMBUS2
  415. [0.121089] HW.GFX.GMA.Registers.Read: 0x200a474e <- 0x000c510c:PCH_GMBUS3
  416. [0.121090] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  417. [0.121358] HW.GFX.GMA.Registers.Read: 0x00008a6c <- 0x000c5108:PCH_GMBUS2
  418. [0.121360] HW.GFX.GMA.Registers.Read: 0x544ba34c <- 0x000c510c:PCH_GMBUS3
  419. [0.121361] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  420. [0.121630] HW.GFX.GMA.Registers.Read: 0x00008a70 <- 0x000c5108:PCH_GMBUS2
  421. [0.121632] HW.GFX.GMA.Registers.Read: 0xfe000000 <- 0x000c510c:PCH_GMBUS3
  422. [0.121633] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  423. [0.121902] HW.GFX.GMA.Registers.Read: 0x00008a74 <- 0x000c5108:PCH_GMBUS2
  424. [0.121903] HW.GFX.GMA.Registers.Read: 0x4e544c00 <- 0x000c510c:PCH_GMBUS3
  425. [0.121904] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  426. [0.122172] HW.GFX.GMA.Registers.Read: 0x00008a78 <- 0x000c5108:PCH_GMBUS2
  427. [0.122174] HW.GFX.GMA.Registers.Read: 0x4b303431 <- 0x000c510c:PCH_GMBUS3
  428. [0.122175] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  429. [0.122444] HW.GFX.GMA.Registers.Read: 0x00008a7c <- 0x000c5108:PCH_GMBUS2
  430. [0.122446] HW.GFX.GMA.Registers.Read: 0x34333054 <- 0x000c510c:PCH_GMBUS3
  431. [0.122447] HW.GFX.GMA.Registers.Wait: 0x00000800 <- 0x00000800 & 0x000c5108:PCH_GMBUS2
  432. [0.122715] HW.GFX.GMA.Registers.Read: 0x0000ca80 <- 0x000c5108:PCH_GMBUS2
  433. [0.122716] HW.GFX.GMA.Registers.Read: 0xca003130 <- 0x000c510c:PCH_GMBUS3
  434. [0.122717] HW.GFX.GMA.Registers.Wait: 0x00004000 <- 0x00004000 & 0x000c5108:PCH_GMBUS2
  435. [0.122718] HW.GFX.GMA.Registers.Write: 0x48000000 -> 0x000c5104:PCH_GMBUS1
  436. [0.122720] HW.GFX.GMA.Registers.Wait: 0x00000000 <- 0x00000200 & 0x000c5108:PCH_GMBUS2
  437. [0.122745] HW.GFX.GMA.I2C.Release_GMBUS
  438. [0.122745] HW.GFX.GMA.Registers.Write: 0x00000000 -> 0x000c5100:PCH_GMBUS0
  439. [0.122747] HW.GFX.GMA.Registers.Write: 0x00008000 -> 0x000c5108:PCH_GMBUS2
  440. [0.122749] EDID+0x0000: 00 ff ff ff ff ff ff 00 4c a3 4c 32 00 00 00 00
  441. [0.122750] EDID+0x0010: 00 14 01 03 80 1f 11 78 ea 1d 85 91 56 59 8f 26
  442. [0.122752] EDID+0x0020: 18 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01
  443. [0.122753] EDID+0x0030: 01 01 01 01 01 01 5d 26 40 a0 60 84 1e 30 30 20
  444. [0.122754] EDID+0x0040: 25 00 36 ae 10 00 00 19 00 00 00 0f 00 00 00 00
  445. [0.122755] EDID+0x0050: 00 00 00 00 00 32 c8 04 32 00 00 00 00 fe 00 53
  446. [0.122756] EDID+0x0060: 41 4d 53 55 4e 47 0a 20 4c a3 4b 54 00 00 00 fe
  447. [0.122757] EDID+0x0070: 00 4c 54 4e 31 34 30 4b 54 30 33 34 30 31 00 ca
  448.  
  449. [0.122759] CONFIG =>
  450. [0.122759] (Primary =>
  451. [0.122760] (Port => HDMI1 ,
  452. [0.122760] Framebuffer =>
  453. [0.122761] (Width => 1600,
  454. [0.122761] Height => 900,
  455. [0.122762] Stride => 1600,
  456. [0.122762] Offset => 0x00000000,
  457. [0.122763] BPC => 8),
  458. [0.122763] Mode =>
  459. [0.122764] (Dotclock => 148500000,
  460. [0.122764] H_Visible => 1920,
  461. [0.122765] H_Sync_Begin => 2008,
  462. [0.122765] H_Sync_End => 2052,
  463. [0.122766] H_Total => 2200,
  464. [0.122766] V_Visible => 1080,
  465. [0.122767] V_Sync_Begin => 1084,
  466. [0.122767] V_Sync_End => 1089,
  467. [0.122768] V_Total => 1125,
  468. [0.122768] H_Sync_Active_High => True,
  469. [0.122769] V_Sync_Active_High => True,
  470. [0.122769] BPC => 5)),
  471. [0.122770] Secondary =>
  472. [0.122770] (Port => Internal,
  473. [0.122771] Framebuffer =>
  474. [0.122771] (Width => 1600,
  475. [0.122772] Height => 900,
  476. [0.122772] Stride => 1600,
  477. [0.122773] Offset => 0x00000000,
  478. [0.122773] BPC => 8),
  479. [0.122774] Mode =>
  480. [0.122774] (Dotclock => 98210000,
  481. [0.122775] H_Visible => 1600,
  482. [0.122775] H_Sync_Begin => 1648,
  483. [0.122776] H_Sync_End => 1680,
  484. [0.122776] H_Total => 1760,
  485. [0.122777] V_Visible => 900,
  486. [0.122777] V_Sync_Begin => 902,
  487. [0.122778] V_Sync_End => 907,
  488. [0.122778] V_Total => 930,
  489. [0.122779] H_Sync_Active_High => False,
  490. [0.122779] V_Sync_Active_High => False,
  491. [0.122780] BPC => 5)),
  492. [0.122780] Tertiary =>
  493. [0.122781] (Port => Disabled,
  494. [0.122781] Framebuffer =>
  495. [0.122782] (Width => 1,
  496. [0.122782] Height => 1,
  497. [0.122783] Stride => 1,
  498. [0.122783] Offset => 0x00000000,
  499. [0.122784] BPC => 8),
  500. [0.122784] Mode =>
  501. [0.122785] (Dotclock => 24000000,
  502. [0.122785] H_Visible => 1,
  503. [0.122786] H_Sync_Begin => 1,
  504. [0.122786] H_Sync_End => 1,
  505. [0.122787] H_Total => 1,
  506. [0.122787] V_Visible => 1,
  507. [0.122788] V_Sync_Begin => 1,
  508. [0.122788] V_Sync_End => 1,
  509. [0.122789] V_Total => 1,
  510. [0.122789] H_Sync_Active_High => False,
  511. [0.122790] V_Sync_Active_High => False,
  512. [0.122790] BPC => 5)));
  513.  
  514. [0.123589] Trying to enable port HDMI1
  515. [0.123590] HW.GFX.GMA.Connector_Info.Preferred_Link_Setting
  516. [0.123590] HW.GFX.GMA.PLLs.Alloc
  517. [0.123591] HW.GFX.GMA.PLLs.On
  518. [0.123667] Valid clock found.
  519. [0.123667] Best/Target/Delta: 148500000/148500000/0.
  520. [0.123668] HW.GFX.GMA.PLLs.Program_DPLL
  521. [0.123668] HW.GFX.GMA.Registers.Write: 0x00021007 -> 0x000c6040:PCH_FPA0
  522. [0.123670] HW.GFX.GMA.Registers.Write: 0x00021007 -> 0x000c6044:PCH_FPA1
  523. [0.123672] HW.GFX.GMA.Registers.Write: 0x44020002 -> 0x000c6014:PCH_DPLL_A
  524. [0.123674] HW.GFX.GMA.Registers.Set_Mask: 0x80000000 .S PCH_DPLL_A
  525. [0.123676] HW.GFX.GMA.Registers.Read: 0x44020002 <- 0x000c6014:PCH_DPLL_A
  526. [0.123677] HW.GFX.GMA.Registers.Write: 0xc4020002 -> 0x000c6014:PCH_DPLL_A
  527. [0.123679] HW.GFX.GMA.Registers.Read: 0xc4020002 <- 0x000c6014:PCH_DPLL_A
  528. [0.123831] HW.GFX.GMA.Connectors.Pre_On
  529. [0.123832] HW.GFX.GMA.Connectors.FDI.Pre_On
  530. [0.123832] HW.GFX.GMA.Registers.Write: 0x00200090 -> 0x000f0010:FDI_RX_MISC_A
  531. [0.123835] HW.GFX.GMA.Registers.Write: 0x7e000000 -> 0x000f0030:FDI_RXA_TUSIZE1
  532. [0.123837] HW.GFX.GMA.Registers.Unset_Mask: 0x00000700 !S FDI_RXA_IMR
  533. [0.123839] HW.GFX.GMA.Registers.Read: 0x00000fff <- 0x000f0018:FDI_RXA_IMR
  534. [0.123840] HW.GFX.GMA.Registers.Write: 0x000008ff -> 0x000f0018:FDI_RXA_IMR
  535. [0.123842] HW.GFX.GMA.Registers.Read: 0x000008ff <- 0x000f0018:FDI_RXA_IMR
  536. [0.123843] HW.GFX.GMA.Registers.Write: 0x00000700 -> 0x000f0014:FDI_RXA_IIR
  537. [0.123845] HW.GFX.GMA.Registers.Write: 0x00082840 -> 0x000f000c:FDI_RXA_CTL
  538. [0.123847] HW.GFX.GMA.Registers.Read: 0x00082840 <- 0x000f000c:FDI_RXA_CTL
  539. [0.124069] HW.GFX.GMA.Registers.Set_Mask: 0x00000010 .S FDI_RXA_CTL
  540. [0.124071] HW.GFX.GMA.Registers.Read: 0x00082840 <- 0x000f000c:FDI_RXA_CTL
  541. [0.124072] HW.GFX.GMA.Registers.Write: 0x00082850 -> 0x000f000c:FDI_RXA_CTL
  542. [0.124074] HW.GFX.GMA.Registers.Write: 0x000c4800 -> 0x00060100:FDI_TX_CTL_A
  543. [0.124075] HW.GFX.GMA.Registers.Read: 0x000c4800 <- 0x00060100:FDI_TX_CTL_A
  544. [0.124177] HW.GFX.GMA.Pipe_Setup.On
  545. [0.124177] HW.GFX.GMA.Transcoder.Setup
  546. [0.124178] HW.GFX.GMA.Transcoder.Setup_Link
  547. [0.124178] HW.GFX.GMA.DP_Info.Calculate_M_N
  548. [0.124179] HW.GFX.GMA.Registers.Write: 0x7e699999 -> 0x00060030:PIPEA_DATA_M1
  549. [0.124180] HW.GFX.GMA.Registers.Write: 0x00800000 -> 0x00060034:PIPEA_DATA_N1
  550. [0.124181] HW.GFX.GMA.Registers.Write: 0x0008cccc -> 0x00060040:PIPEA_LINK_M1
  551. [0.124182] HW.GFX.GMA.Registers.Write: 0x00100000 -> 0x00060044:PIPEA_LINK_N1
  552. [0.124183] HW.GFX.GMA.Registers.Write: 0x0897077f -> 0x00060000:HTOTAL_A
  553. [0.124184] HW.GFX.GMA.Registers.Write: 0x0897077f -> 0x00060004:HBLANK_A
  554. [0.124185] HW.GFX.GMA.Registers.Write: 0x080307d7 -> 0x00060008:HSYNC_A
  555. [0.124186] HW.GFX.GMA.Registers.Write: 0x04640437 -> 0x0006000c:VTOTAL_A
  556. [0.124187] HW.GFX.GMA.Registers.Write: 0x04640437 -> 0x00060010:VBLANK_A
  557. [0.124188] HW.GFX.GMA.Registers.Write: 0x0440043b -> 0x00060014:VSYNC_A
  558. [0.124189] HW.GFX.GMA.Pipe_Setup.Setup_Display
  559. [0.124189] HW.GFX.GMA.Pipe_Setup.Setup_Hires_Plane
  560. [0.124190] HW.GFX.GMA.Registers.Unset_And_Set_Mask: DSPACNTR
  561. [0.124191] HW.GFX.GMA.Registers.Read: 0x00000000 <- 0x00070180:DSPACNTR
  562. [0.124192] HW.GFX.GMA.Registers.Write: 0x98004000 -> 0x00070180:DSPACNTR
  563. [0.124193] HW.GFX.GMA.Registers.Write: 0x00001900 -> 0x00070188:DSPASTRIDE
  564. [0.124194] HW.GFX.GMA.Registers.Write: 0x00000000 -> 0x0007019c:DSPASURF
  565. [0.124195] HW.GFX.GMA.Registers.Write: 0x00000000 -> 0x00070184:DSPALINOFF
  566. [0.124196] HW.GFX.GMA.Registers.Write: 0x00000000 -> 0x000701a4:DSPATILEOFF
  567. [0.124197] HW.GFX.GMA.Registers.Write: 0x063f0383 -> 0x0006001c:PIPEASRC
  568. [0.124198] HW.GFX.GMA.Registers.Write: 0x80800000 -> 0x00068080:PFA_CTL_1
  569. [0.124199] HW.GFX.GMA.Registers.Write: 0x00000000 -> 0x00068070:PFA_WIN_POS
  570. [0.124200] HW.GFX.GMA.Registers.Write: 0x07800438 -> 0x00068074:PFA_WIN_SZ
  571. [0.124201] HW.GFX.GMA.Registers.Write: 0x80000000 -> 0x00070008:PIPEACONF
  572. [0.124202] HW.GFX.GMA.Registers.Read: 0x80000000 <- 0x00070008:PIPEACONF
  573. [0.124203] HW.GFX.GMA.Connectors.Post_On
  574. [0.124203] HW.GFX.GMA.Connectors.FDI.Post_On
  575. [0.124204] HW.GFX.GMA.Connectors.FDI.Auto_Training
  576. [0.124204] HW.GFX.GMA.Registers.Unset_And_Set_Mask: FDI_TX_CTL_A
  577. [0.124205] HW.GFX.GMA.Registers.Read: 0x000c4800 <- 0x00060100:FDI_TX_CTL_A
  578. [0.124206] HW.GFX.GMA.Registers.Write: 0x800c4c00 -> 0x00060100:FDI_TX_CTL_A
  579. [0.124207] HW.GFX.GMA.Registers.Read: 0x800c4c00 <- 0x00060100:FDI_TX_CTL_A
  580. [0.124208] HW.GFX.GMA.Registers.Set_Mask: 0x80000400 .S FDI_RXA_CTL
  581. [0.124210] HW.GFX.GMA.Registers.Read: 0x00082850 <- 0x000f000c:FDI_RXA_CTL
  582. [0.124211] HW.GFX.GMA.Registers.Write: 0x80082c50 -> 0x000f000c:FDI_RXA_CTL
  583. [0.124213] HW.GFX.GMA.Registers.Read: 0x80082c50 <- 0x000f000c:FDI_RXA_CTL
  584. [0.124220] HW.GFX.GMA.Registers.Is_Set_Mask: FDI_TX_CTL_A
  585. [0.124220] HW.GFX.GMA.Registers.Read: 0x800c4c02 <- 0x00060100:FDI_TX_CTL_A
  586. [0.124222] HW.GFX.GMA.Registers.Set_Mask: 0x0c000000 .S FDI_RXA_CTL
  587. [0.124224] HW.GFX.GMA.Registers.Read: 0x80082c50 <- 0x000f000c:FDI_RXA_CTL
  588. [0.124225] HW.GFX.GMA.Registers.Write: 0x8c082c50 -> 0x000f000c:FDI_RXA_CTL
  589. [0.124227] HW.GFX.GMA.PCH.Transcoder.On
  590. [0.124227] HW.GFX.GMA.Registers.Unset_And_Set_Mask: PCH_DPLL_SEL
  591. [0.124229] HW.GFX.GMA.Registers.Read: 0x00000000 <- 0x000c7000:PCH_DPLL_SEL
  592. [0.124230] HW.GFX.GMA.Registers.Write: 0x00000008 -> 0x000c7000:PCH_DPLL_SEL
  593. [0.124232] HW.GFX.GMA.Registers.Write: 0x0897077f -> 0x000e0000:TRANS_HTOTAL_A
  594. [0.124234] HW.GFX.GMA.Registers.Write: 0x0897077f -> 0x000e0004:TRANS_HBLANK_A
  595. [0.124236] HW.GFX.GMA.Registers.Write: 0x080307d7 -> 0x000e0008:TRANS_HSYNC_A
  596. [0.124238] HW.GFX.GMA.Registers.Write: 0x04640437 -> 0x000e000c:TRANS_VTOTAL_A
  597. [0.124240] HW.GFX.GMA.Registers.Write: 0x04640437 -> 0x000e0010:TRANS_VBLANK_A
  598. [0.124242] HW.GFX.GMA.Registers.Write: 0x0440043b -> 0x000e0014:TRANS_VSYNC_A
  599. [0.124244] HW.GFX.GMA.Registers.Set_Mask: 0x80000000 .S TRANSA_CHICKEN2
  600. [0.124246] HW.GFX.GMA.Registers.Read: 0x00000000 <- 0x000f0064:TRANSA_CHICKEN2
  601. [0.124247] HW.GFX.GMA.Registers.Write: 0x80000000 -> 0x000f0064:TRANSA_CHICKEN2
  602. [0.124249] HW.GFX.GMA.Registers.Write: 0x80000000 -> 0x000f0008:TRANSACONF
  603. [0.124251] HW.GFX.GMA.PCH.HDMI.On
  604. [0.124251] HW.GFX.GMA.Registers.Unset_And_Set_Mask: PCH_HDMIB
  605. [0.124253] HW.GFX.GMA.Registers.Read: 0x0000001c <- 0x000e1140:PCH_HDMIB
  606. [0.124254] HW.GFX.GMA.Registers.Write: 0x8000081c -> 0x000e1140:PCH_HDMIB
  607. [0.124256] Enabled port HDMI1
  608.  
  609. [0.124256] Trying to enable port Internal
  610. [0.124257] HW.GFX.GMA.Registers.Is_Set_Mask: FDI_TX_CTL_C
  611. [0.124257] HW.GFX.GMA.Registers.Read: 0x00040000 <- 0x00062100:FDI_TX_CTL_C
  612. [0.124259] HW.GFX.GMA.Connector_Info.Preferred_Link_Setting
  613. [0.124259] HW.GFX.GMA.PLLs.Alloc
  614. [0.124260] HW.GFX.GMA.PLLs.On
  615. [0.124300] Valid clock found.
  616. [0.124300] Best/Target/Delta: 98285714/98210000/75714.
  617. [0.124301] HW.GFX.GMA.PLLs.Program_DPLL
  618. [0.124301] HW.GFX.GMA.Registers.Write: 0x00010d09 -> 0x000c6048:PCH_FPB0
  619. [0.124303] HW.GFX.GMA.Registers.Write: 0x00010d09 -> 0x000c604c:PCH_FPB1
  620. [0.124305] HW.GFX.GMA.Registers.Write: 0x09106010 -> 0x000c6018:PCH_DPLL_B
  621. [0.124307] HW.GFX.GMA.Registers.Set_Mask: 0x80000000 .S PCH_DPLL_B
  622. [0.124309] HW.GFX.GMA.Registers.Read: 0x09106010 <- 0x000c6018:PCH_DPLL_B
  623. [0.124310] HW.GFX.GMA.Registers.Write: 0x89106010 -> 0x000c6018:PCH_DPLL_B
  624. [0.124312] HW.GFX.GMA.Registers.Read: 0x89106010 <- 0x000c6018:PCH_DPLL_B
  625. [0.124464] HW.GFX.GMA.Connectors.Pre_On
  626. [0.124464] HW.GFX.GMA.Connectors.FDI.Pre_On
  627. [0.124465] HW.GFX.GMA.Registers.Set_Mask: 0x00001000 .S PCH_FDI_CHICKEN_B_C
  628. [0.124467] HW.GFX.GMA.Registers.Read: 0x00000000 <- 0x000c2000:PCH_FDI_CHICKEN_B_C
  629. [0.124468] HW.GFX.GMA.Registers.Write: 0x00001000 -> 0x000c2000:PCH_FDI_CHICKEN_B_C
  630. [0.124470] HW.GFX.GMA.Registers.Write: 0x00200090 -> 0x000f1010:FDI_RX_MISC_B
  631. [0.124472] HW.GFX.GMA.Registers.Write: 0x7e000000 -> 0x000f1030:FDI_RXB_TUSIZE1
  632. [0.124474] HW.GFX.GMA.Registers.Unset_Mask: 0x00000700 !S FDI_RXB_IMR
  633. [0.124476] HW.GFX.GMA.Registers.Read: 0x00000fff <- 0x000f1018:FDI_RXB_IMR
  634. [0.124477] HW.GFX.GMA.Registers.Write: 0x000008ff -> 0x000f1018:FDI_RXB_IMR
  635. [0.124479] HW.GFX.GMA.Registers.Read: 0x000008ff <- 0x000f1018:FDI_RXB_IMR
  636. [0.124480] HW.GFX.GMA.Registers.Write: 0x00000700 -> 0x000f1014:FDI_RXB_IIR
  637. [0.124482] HW.GFX.GMA.Registers.Write: 0x00022840 -> 0x000f100c:FDI_RXB_CTL
  638. [0.124484] HW.GFX.GMA.Registers.Read: 0x00022840 <- 0x000f100c:FDI_RXB_CTL
  639. [0.124706] HW.GFX.GMA.Registers.Set_Mask: 0x00000010 .S FDI_RXB_CTL
  640. [0.124708] HW.GFX.GMA.Registers.Read: 0x00022840 <- 0x000f100c:FDI_RXB_CTL
  641. [0.124709] HW.GFX.GMA.Registers.Write: 0x00022850 -> 0x000f100c:FDI_RXB_CTL
  642. [0.124711] HW.GFX.GMA.Registers.Write: 0x00044800 -> 0x00061100:FDI_TX_CTL_B
  643. [0.124712] HW.GFX.GMA.Registers.Read: 0x00044800 <- 0x00061100:FDI_TX_CTL_B
  644. [0.124814] HW.GFX.GMA.Pipe_Setup.On
  645. [0.124814] HW.GFX.GMA.Transcoder.Setup
  646. [0.124815] HW.GFX.GMA.Transcoder.Setup_Link
  647. [0.124815] HW.GFX.GMA.DP_Info.Calculate_M_N
  648. [0.124816] HW.GFX.GMA.Registers.Write: 0x7e68c1e0 -> 0x00061030:PIPEB_DATA_M1
  649. [0.124817] HW.GFX.GMA.Registers.Write: 0x00800000 -> 0x00061034:PIPEB_DATA_N1
  650. [0.124818] HW.GFX.GMA.Registers.Write: 0x0005d1e1 -> 0x00061040:PIPEB_LINK_M1
  651. [0.124819] HW.GFX.GMA.Registers.Write: 0x00100000 -> 0x00061044:PIPEB_LINK_N1
  652. [0.124820] HW.GFX.GMA.Registers.Write: 0x06df063f -> 0x00061000:HTOTAL_B
  653. [0.124821] HW.GFX.GMA.Registers.Write: 0x06df063f -> 0x00061004:HBLANK_B
  654. [0.124822] HW.GFX.GMA.Registers.Write: 0x068f066f -> 0x00061008:HSYNC_B
  655. [0.124823] HW.GFX.GMA.Registers.Write: 0x03a10383 -> 0x0006100c:VTOTAL_B
  656. [0.124824] HW.GFX.GMA.Registers.Write: 0x03a10383 -> 0x00061010:VBLANK_B
  657. [0.124825] HW.GFX.GMA.Registers.Write: 0x038a0385 -> 0x00061014:VSYNC_B
  658. [0.124826] HW.GFX.GMA.Pipe_Setup.Setup_Display
  659. [0.124826] HW.GFX.GMA.Pipe_Setup.Setup_Hires_Plane
  660. [0.124827] HW.GFX.GMA.Registers.Unset_And_Set_Mask: DSPBCNTR
  661. [0.124827] HW.GFX.GMA.Registers.Read: 0x00000000 <- 0x00071180:DSPBCNTR
  662. [0.124829] HW.GFX.GMA.Registers.Write: 0x98004000 -> 0x00071180:DSPBCNTR
  663. [0.124830] HW.GFX.GMA.Registers.Write: 0x00001900 -> 0x00071188:DSPBSTRIDE
  664. [0.124831] HW.GFX.GMA.Registers.Write: 0x00000000 -> 0x0007119c:DSPBSURF
  665. [0.124832] HW.GFX.GMA.Registers.Write: 0x00000000 -> 0x00071184:DSPBLINOFF
  666. [0.124833] HW.GFX.GMA.Registers.Write: 0x00000000 -> 0x000711a4:DSPBTILEOFF
  667. [0.124834] HW.GFX.GMA.Registers.Write: 0x063f0383 -> 0x0006101c:PIPEBSRC
  668. [0.124835] HW.GFX.GMA.Registers.Write: 0x80000050 -> 0x00071008:PIPEBCONF
  669. [0.124836] HW.GFX.GMA.Registers.Read: 0xc0000050 <- 0x00071008:PIPEBCONF
  670. [0.124837] HW.GFX.GMA.Connectors.Post_On
  671. [0.124837] HW.GFX.GMA.Connectors.FDI.Post_On
  672. [0.124838] HW.GFX.GMA.Connectors.FDI.Auto_Training
  673. [0.124838] HW.GFX.GMA.Registers.Unset_And_Set_Mask: FDI_TX_CTL_B
  674. [0.124839] HW.GFX.GMA.Registers.Read: 0x00044800 <- 0x00061100:FDI_TX_CTL_B
  675. [0.124840] HW.GFX.GMA.Registers.Write: 0x80044c00 -> 0x00061100:FDI_TX_CTL_B
  676. [0.124841] HW.GFX.GMA.Registers.Read: 0x80044c00 <- 0x00061100:FDI_TX_CTL_B
  677. [0.124842] HW.GFX.GMA.Registers.Set_Mask: 0x80000400 .S FDI_RXB_CTL
  678. [0.124843] HW.GFX.GMA.Registers.Read: 0x00022850 <- 0x000f100c:FDI_RXB_CTL
  679. [0.124844] HW.GFX.GMA.Registers.Write: 0x80022c50 -> 0x000f100c:FDI_RXB_CTL
  680. [0.124846] HW.GFX.GMA.Registers.Read: 0x80022c50 <- 0x000f100c:FDI_RXB_CTL
  681. [0.124853] HW.GFX.GMA.Registers.Is_Set_Mask: FDI_TX_CTL_B
  682. [0.124853] HW.GFX.GMA.Registers.Read: 0x80044c02 <- 0x00061100:FDI_TX_CTL_B
  683. [0.124855] HW.GFX.GMA.Registers.Set_Mask: 0x0c000000 .S FDI_RXB_CTL
  684. [0.124857] HW.GFX.GMA.Registers.Read: 0x80022c50 <- 0x000f100c:FDI_RXB_CTL
  685. [0.124858] HW.GFX.GMA.Registers.Write: 0x8c022c50 -> 0x000f100c:FDI_RXB_CTL
  686. [0.124860] HW.GFX.GMA.PCH.Transcoder.On
  687. [0.124860] HW.GFX.GMA.Registers.Unset_And_Set_Mask: PCH_DPLL_SEL
  688. [0.124862] HW.GFX.GMA.Registers.Read: 0x00000008 <- 0x000c7000:PCH_DPLL_SEL
  689. [0.124863] HW.GFX.GMA.Registers.Write: 0x00000098 -> 0x000c7000:PCH_DPLL_SEL
  690. [0.124865] HW.GFX.GMA.Registers.Write: 0x06df063f -> 0x000e1000:TRANS_HTOTAL_B
  691. [0.124867] HW.GFX.GMA.Registers.Write: 0x06df063f -> 0x000e1004:TRANS_HBLANK_B
  692. [0.124869] HW.GFX.GMA.Registers.Write: 0x068f066f -> 0x000e1008:TRANS_HSYNC_B
  693. [0.124870] HW.GFX.GMA.Registers.Write: 0x03a10383 -> 0x000e100c:TRANS_VTOTAL_B
  694. [0.124872] HW.GFX.GMA.Registers.Write: 0x03a10383 -> 0x000e1010:TRANS_VBLANK_B
  695. [0.124874] HW.GFX.GMA.Registers.Write: 0x038a0385 -> 0x000e1014:TRANS_VSYNC_B
  696. [0.124876] HW.GFX.GMA.Registers.Set_Mask: 0x80000000 .S TRANSB_CHICKEN2
  697. [0.124878] HW.GFX.GMA.Registers.Read: 0x00000000 <- 0x000f1064:TRANSB_CHICKEN2
  698. [0.124879] HW.GFX.GMA.Registers.Write: 0x80000000 -> 0x000f1064:TRANSB_CHICKEN2
  699. [0.124881] HW.GFX.GMA.Registers.Write: 0x80000000 -> 0x000f1008:TRANSBCONF
  700. [0.124883] HW.GFX.GMA.PCH.LVDS.On
  701. [0.124883] HW.GFX.GMA.Registers.Write: 0xa030033c -> 0x000e1180:PCH_LVDS
  702. [0.124885] HW.GFX.GMA.Panel.On
  703. [0.124885] HW.GFX.GMA.Registers.Is_Set_Mask: PCH_PP_CONTROL
  704. [0.124887] HW.GFX.GMA.Registers.Read: 0xabcd0003 <- 0x000c7204:PCH_PP_CONTROL
  705. [0.124888] HW.GFX.GMA.Registers.Set_Mask: 0x00000001 .S PCH_PP_CONTROL
  706. [0.124890] HW.GFX.GMA.Registers.Read: 0xabcd0003 <- 0x000c7204:PCH_PP_CONTROL
  707. [0.124891] HW.GFX.GMA.Registers.Write: 0xabcd0003 -> 0x000c7204:PCH_PP_CONTROL
  708. [0.124893] HW.GFX.GMA.Panel.Backlight_On
  709. [0.124893] HW.GFX.GMA.Registers.Set_Mask: 0x00000004 .S PCH_PP_CONTROL
  710. [0.124895] HW.GFX.GMA.Registers.Read: 0xabcd0003 <- 0x000c7204:PCH_PP_CONTROL
  711. [0.124896] HW.GFX.GMA.Registers.Write: 0xabcd0007 -> 0x000c7204:PCH_PP_CONTROL
  712. [0.124898] Enabled port Internal
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