VecAdd64 from packed 32-bit

inline uint32x4_p VecAdd64(const uint32x4_p a, const uint32x4_p b)
{
#if 0
    const uint32x4_p t1 = { 0, 0, -1, -1};
    const uint32x4_p t2 = { 0, 0, -1, -1};
    const uint32x4_p cx = vec_addc(t1, t2);
    const uint32x4_p t3 = vec_add (t1, t2);

    const uint8x16_p m = {16,16,16,16, 0,1,2,3, 16,16,16,16, 12,13,14,15};
    const uint32x4_p z = {0,0,0,0};
    const uint32x4_p o = vec_perm(cx, z, m);
    const uint32x4_p t4 = vec_add(t3, o);
#endif

#if defined(CRYPTOPP_POWER7_AVAILABLE)
    return (uint32x4_p)vec_add((uint64x2_p)a, (uint64x2_p)b);
#else
    // The carry vector has a 1 set if the lane produces a carry.
    // The 32-bit words are word-swapped for 64 bits. If lanes are
    // numbered left to right, then the carries produced by lanes
    // 0 and 2 get carried into lanes 1 and 3.
# if defined(CRYPTOPP_BIG_ENDIAN)
    const uint8x16_p mask = {0,1,2,3, 16,16,16,16, 12,13,14,15, 16,16,16,16};
    const uint32x4_p zero = {0,0,0,0};
# else  // Should this be 0,1,2,3 and 8,9,10,11
    const uint8x16_p mask = {16,16,16,16, 0,1,2,3, 16,16,16,16, 12,13,14,15};
    const uint32x4_p zero = {0,0,0,0};
# endif

    const uint32x4_p cry = vec_addc(a, b);
    const uint32x4_p res = vec_add (a, b);
    const uint32x4_p tt = vec_perm(cry, zero, mask); // Debug
    return (uint32x4_p)vec_add(res, vec_perm(cry, zero, mask));
#endif
}